Electronic Devices and Circuits

BJT Transistor Biasing (cont.)

Dr. Junaid Ahmed

Biasing with collector feedback resistor:
 In this method, one end of RB is connected
to the base and the other end to the
collector.

 Figure-1 shows the circuit diagram of

biasing with feedback resistor.

 The required zero signal base current is

determined not by VCC but by the collector-
base voltage VCB.

 It is clear that VCB forward biases the base-

emitter junction and hence base current IB
flows through RB.

 This causes the zero signal collector current

to flow in the circuit. Figure-1
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Biasing with collector feedback resistor: (cont.)
Circuit analysis: The required value of RB needed to give
the zero signal current IC. The IC and RB can be calculated as
follow by referring circuit in Figure-1:

VCC = ICRC + IBRB +VBE ………Eq-1

RB = (VCC – VBE – ICRC)/IB

As: IC = βIB

RB = (VCC – VBE – βIBRC)/IB

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Biasing with collector feedback resistor: (cont.)
Alternatively,
VCE = VBE + VCB
VCB = VCE – VBE
RB = VCB / IB

RB = (VCE – VBE) / IB; where IB = IC/ β

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Biasing with collector feedback resistor: (cont.)
Q-point values (IC and VCE): The Q-point
values for biasing with feedback resistor are
given as:

IC = [VCC – VBE] / [RB/β + RC]

VCE = VCC – IC RC

*derived from Eq-1

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Biasing with collector feedback resistor: (cont.)
Advantages:
1. It is a simple method as it requires only one resistance RB.

2. This circuit provides some stabilisation of the operating

point as discussed below :
VCE = VBE+ VCB
“Suppose the temperature increases. This will increase collector
leakage current and hence the total collector current. But as
soon as collector current increases, VCE decreases due to greater
drop across RC. The result is that VCB decreases i.e. lesser
voltage is available across RB. Hence the base current IB
decreases. The smaller IB tends to decrease the collector
current to original value.”
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Biasing with collector feedback resistor: (cont.)
Disadvantages:
1. The circuit does not provide good stabilisation
because stability factor is fairly high, though it is
lesser than that of fixed bias. Therefore, the operating
point does change, although to lesser extent, due to
temperature variations and other effects.

2. This circuit provides a negative feedback which

reduces the gain of the amplifier. During the positive
half-cycle of the signal, the collector current increases.
The increased collector current would result in greater
voltage drop across RC This will reduce the base
current and hence collector current.
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Numerical problems:
Problem-1:
Fig:-2

Solution:

Figure:2
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Numerical problems: (cont.)
Problem-2:

Solution:

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Numerical problems: (cont.)
Problem-3:
Fig: -3

Figure:3

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Numerical problems: (cont.)
Solution: Fig:3

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Voltage divider bias method:
 Voltage divider bias method is the most widely used method of providing
biasing and stabilisation to a transistor.

 In this method, two resistances R1 and R2 are connected across the supply
voltage VCC as given in Figure-4 and provide biasing.

 The emitter resistance RE provides stabilisation.

 The name "voltage divider" comes from the voltage divider formed by R1
and R2.

 The voltage drop across R2 forward biases the base-emitter junction.

 This causes the base current and hence collector current flow in the zero
signal conditions.

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Voltage divider bias method:(cont.)

Figure-4 Voltage divider biasing circuit

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Voltage divider bias method:(cont.)
Circuit analysis: Circuit analysis. Suppose that the current flowing through
resistance R1 is I1. As base current IB is very small, therefore, it can be assumed with
reasonable accuracy that current flowing through R2 is also I1.

1. Collector current IC:

I1 = VCC / (R1 + R2)
Voltage across resistance R2 is V2 = I1 R2
V2 = [VCC / (R1 + R2)]R2
Applying Kirchhoff's voltage law to the base circuit of Figure-1
V2 = VBE + VE
or
V2 = VBE + IE RE
or
IE = (V2 – VBE)/ RE

Since IE ≈ IC
IC = (V2 – VBE)/RE ……….Eq:(1)
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Voltage divider bias method:(cont.)
It is clear from Eq:(1) that IC does not at all depend upon β.

Though IC depends upon VBE but in practice V2 >> VBE so

that IC is practically independent of VBE.

Thus IC in this circuit is almost independent of transistor

parameters and hence good stabilisation is ensured.

It is due to this reason that potential divider bias has

become universal method for providing transistor biasing.

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Voltage divider bias method:(cont.)
2. Collector-emitter voltage VCE:
Applying Kirchoff’s voltage law to the collector side,
VCC = IC RC + VCE + IE RE

Since IE ≈ IC

VCC = IC RC + VCE + IC RE

VCC = IC (RC + RE) + VCE

VCE = VCC – IC (RC + RE)

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Numerical problems:
Problem-4:
Fig: 5

Figure-5

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Numerical problems: (Cont.)
Solution:

Fig:6

Figure-6

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Numerical problems: (Cont.)
Solution: (cont.)

Fig:6

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Numerical problems: (Cont.)
Problem-5:

Solution:

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Numerical problems: (Cont.)
Solution: (cont.)

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Numerical problems: (Cont.)
Problem-6:
Fig:7

Figure-7 22
Numerical problems: (Cont.)
Solution:

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Design of transistor biasing circuits:
Practically following steps are taken to design transistor biasing and stabilisation
circuits

Step 1:
 It is a common practice to take RE = 500 — 1000Ω. Greater the value of RE, better is the
stabilisation. However, if RE is very large, higher voltage drop across it leaves reduced
voltage drop across the collector load. Consequently, the output is decreased. Therefore, a
compromise has to be made in the selection of the value of RE.

Step 2:
 The zero signal current IC is chosen according to the signal swing. However, in the initial
stages of most transistor amplifiers, zero signal IC = 1 mA is sufficient. The major advantages
of selecting this value are :

I. The output impedance of a transistor is very high at 1 mA. This increases the voltage
gain.

II. There is little danger of overheating as 1 mA is quite a small collector current. It may
be noted here that working the transistor below zero signal IC = 1 mA is not advisable
because of strongly non-linear transistor characteristics.
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Design of transistor biasing circuits: (cont.)
Step 3:
 The values of resistances R1 and R2 are so selected that current I1 flowing
through R1 and R2 is atleast 10 times IB i.e. (I1 ≥ 10IB). When this
condition is satisfied, good stabilisation is achieved.

Step 4:
 The zero signal IC should be a little more (say 20%) than the maximum
collector current swing due to signal.

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Mid-point biasing:
When an amplifier circuit is so
designed that operating point Q lies
at the center of d.c. load line, the
amplifier is said to be midpoint
biased.

When the amplifier is mid-point

biased, the Q-point provides values
of IC and VCE that are one-half of
their maximum possible values.
Figure-8
Figure-8 shows the mid-point
biased d.c. load line of an amplifier.

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Mid-point biasing: (cont.)
Since the Q-point is centred on the load line;

IC = 0.5 IC (max) ; VCE = 0.5 VCC

When a transistor is used as an amplifier, it is always

designed for mid point bias.

The reason is that midpoint biasing allows optimum

operation of the amplifier.

In other words, midpoint biasing provides the largest

possible output.
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Mid-point biasing: (cont.)
Figure-9 illustrates the centered
Q-point on the d.c. load line.

When an a.c. signal is applied to

the base of the transistor,
collector current and collector-
emitter voltage will both vary
around their Q-point values.

Since Q-point is centered, IC and

VCE can both make the maximum
Figure-9
possible transitions above and
below their initial d.c. values.

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Mid-point biasing: (cont.)
If the Q-point is located above the center on the load
line, the input may cause the transistor to saturate,
as a result, a part of the output wave will be clipped
off.

Similarly, if Q-point is below midpoint on the load

line, the input may cause the transistor to go into cut
off, this can also cause a portion of the output to be
clipped.

The only midpoint biased amplifier circuit allows the

best possible a.c. operation of the circuit.
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Silicon versus germanium:
Both silicon and germanium are used in semiconductor devices, the present day trend is to
use silicon.

The main reasons for this are:

1. Smaller ICBO:
 At room temperature, a silicon crystal has fewer free electrons than a germanium
crystal.

 The silicon will have much smaller collector cut off current (ICBO) than that of germa­
nium.

 With germanium, ICBO is 10 to 100 times greater than with silicon.

 The typical values of ICBO at 25°C for small signal transistors are:

Silicon: 0.01 µA to 1 µA
Germanium : 2 µA to 15 µA
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Silicon versus germanium:(cont.)
2. Smaller variation of ICBO with temperature:
The variation of ICBO with temperature is less in
silicon as compared to germanium.

With germanium ICBO approximately doubles

with each 8 to 10°C rise

With silicon, it approximately doubles with each

12°C rise.

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Silicon versus germanium:(cont.)
3. Greater working temperature:

 The structure of germanium will be destroyed at

a temperature of approximately 100°C.

The maximum normal working temperature of

germanium is 70°C but silicon can be operated
upto 150°C.

Silicon devices are not easily damaged by excess

heat.

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Silicon versus germanium:(cont.)
4. Higher PlV rating:
 The PIV ratings of silicon diodes are
greater than those of germanium diodes.

 The PIV ratings of silicon diodes are

1000V

 The PIV ratings of germanium diodes

are close to 400V.
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Silicon versus germanium:(cont.)
Disadvantages:
The potential barrier of silicon diode (0.7V) is more
than that of germanium diode (0.5V).

Higher bias voltage is required to cause current flow in

a silicon diode circuit.

This drawback of silicon goes to the background in view

of the other advantages of silicon mentioned above.

Consequently, the modern trend is to use silicon in

semiconductor devices.
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Summary of transistor bias circuits:
The summarized biasing circuits with various parameters for
npn transistor are described as:
Base bias:

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Summary of transistor bias circuits: (cont)
Emitter bias:

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Summary of transistor bias circuits: (cont)
Voltage divider bias:

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Summary of transistor bias circuits: (cont)
Collector feedback bias:

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Any Questions ????????

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