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    Lecture 5

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    s231060031-5
    The document discusses different methods of biasing transistor circuits including voltage divider bias, emitter bias, base bias, and collector feedback bias. It explains how to set the DC operating point or Q-point of a transistor circuit and describes how varying the bias can affect the signal and cause clipping or distortion. Key concepts covered include stiff voltage dividers, linear region of operation, and using load lines to determine the Q-point graphically.

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    Lecture 5

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    s231060031-5
    10 views26 pages
    The document discusses different methods of biasing transistor circuits including voltage divider bias, emitter bias, base bias, and collector feedback bias. It explains how to set the DC operating point or Q-point of a transistor circuit and describes how varying the bias can affect the signal and cause clipping or distortion. Key concepts covered include stiff voltage dividers, linear region of operation, and using load lines to determine the Q-point graphically.

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    The document discusses different methods of biasing transistor circuits including voltage divider bias, emitter bias, base bias, and collector feedback bias. It explains how to set the DC operating point or Q-point of a transistor circuit and describes how varying the bias can affect the signal and cause clipping or distortion. Key concepts covered include stiff voltage dividers, linear region of operation, and using load lines to determine the Q-point graphically.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    10 views26 pages

    Lecture 5

    Uploaded by

    s231060031-5
    The document discusses different methods of biasing transistor circuits including voltage divider bias, emitter bias, base bias, and collector feedback bias. It explains how to set the DC operating point or Q-point of a transistor circuit and describes how varying the bias can affect the signal and cause clipping or distortion. Key concepts covered include stiff voltage dividers, linear region of operation, and using load lines to determine the Q-point graphically.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 26

    EMJ17104

    Analog
    Electronics
    CHAPTER 5:
    TRANSISTOR BIAS CIRCUITS
    Chapter Outline
    •The DC Operating Point

    •Voltage-Divider Bias

    •Other Bias Methods


    DC Operating Point
    •The goal of amplification in most cases is to
    increase the amplitude of an ac signal
    without altering it.

    •If not correctly bias, output can go into


    saturation or cutoff.
    DC Operating Point
    • For a transistor circuit to amplify, it must be properly biased with
    dc voltages. The dc operating point between saturation and
    cutoff is called the Q-point. The goal is to set the Q-point such
    that it does not go into saturation or cutoff when an ac signal is
    applied.

    • VBB is adjusted: (To illustrate Q-point adjustment)

    a) If IB = 200μA, so IC = 20mA and


    VCE = VCC – ICRC = 10 – (20mA)(220Ω) = 5.6V

    b) If IB = 300μA, so IC = 30mA and


    VCE = VCC – ICRC = 10 – (30mA)(220Ω) = 3.4V

    c) If IB = 400μA, so IC = 40mA and


    VCE = VCC – ICRC = 10 – (40mA)(220Ω) = 1.2V

    VCC – ICRC – VCE = 0

    IC = – (1 /RC)VCE + VCC /RC


    DC Operating Point
    •Recall that the collector characteristic
    curves graphically show the relationship of IC
    and VCE for different IB.
    •With the DC load line superimposed across
    the collector curves for this particular
    transistor, we see that 30 mA of collector
    current is best for maximum amplification,
    giving equal amount above and below the
    Q-point.
    •Note that this is three different scenarios of
    IC being viewed simultaneously.
    DC Operating Point
    •Region along load-line between saturation
    and cutoff known as linear region. With a
    good Q-point established, IC swings do not
    exceed the limits of operation (saturation
    and cutoff).

    •However, applying too much ac voltage to


    the base would result in driving the collector
    current into saturation or cutoff resulting in
    a distorted or clipped waveform.
    DC Operating
    Point
    Transistor being driven into
    saturation and/or cutoff
    Example 1
    Determine the Q-point and find
    the maximum peak value of the
    base current for linear operation.
    Assume βDC = 200.
    Voltage Divider Bias
    •Voltage-divider bias is the most widely used
    type of bias circuit. Only one power supply is
    needed, and voltage-divider bias is more stable
    (β independent) than other bias types.
    •Two current path to ground, I2 and IE. R1 and R2
    are used to provide the needed voltage to point
    A (base).
    •A voltage divider in which the base current is
    small compared to the current in R2 is said to
    be a stiff voltage divider because the base
    voltage is relatively independent of the
    different transistor and temperature effects.
    Voltage Divider Bias
    RIN(base) =>10R2

    VB = (R2 /(R1 + R2))VCC

    VE = VB – VBE

    IC = IE = VE / R E

    VC = VCC – ICRC
    Voltage Divider Bias
    • In some cases, you need to analyze the circuit with
    more accuracy.
    • If the circuit designer wanted to raise the input
    resistance, the divider string may not be stiff.
    • If IB is not small enough, resistance to ground from
    the base, RIN(base) is significant enough to consider in
    most cases.
    • In the case where base to ground resistance (input
    resistance) RIN(base) is low enough to consider, so
    RIN(base) = βDCRE
    • We can view the voltage at point A of the circuit in
    two ways, with or without the input resistance (point
    A to ground) considered.
    Voltage Divider Bias
    • The original circuit of voltage-divider bias circuit
    shown in (a) with the Thevenin equivalent circuit
    shown in (b).

    • Apply Thevenin’s theorem to the circuit left of point


    A, with VCC replaced by a short to ground and the
    transistor disconnected from the circuit. The voltage
    at point A with respect to ground is

    V TH = (R2 /(R1+R2))VCC

    • and the resistance is

    RTH = R1||R2

    RTH = R1R2 /(R1 + R2)


    Voltage Divider Bias
    • Apply KVL,

    V TH – VRTH – VBE – VRE = 0

    • Substituting, using Ohm’s law, and solving for VTH,

    V TH = IBRTH + VBE + IERE

    = IBRTH + VBE + (βDC + 1) IBRE

    IB = (V TH – VBE)/(RTH + (βDC + 1)RE)

    ICQ = βDC (V TH – VBE)/(RTH + (βDC + 1)RE)

    VCEQ = VCC – ICRC – IERE

    ≈ VCC – (Rc + RE ) ICQ ; βDC >> 1


    Example 2
    Determine VCE and IC in the
    voltage-divider biased transistor
    circuit. Assume βDC = 100 and
    IE ≈ IC.
    Other Bias Methods
    (Emitter Bias)
    • The circuit is independent of βDC making it as stable as
    the voltage-divider type, but it requires two power
    supplies (VCC and VEE).

    IC = IE = (–VEE – VBE) /(RE + RB / βDC)

    VE = VEE + IERE

    VB = VE + VBE

    VC = VCC – ICRC

    • IE depend to VBE and βDC , both change with temperature


    and IB. This can be improved by,

    RE >> RB / β, IE = –(VEE – VBE)/RE

    VEE >> VBE , IE = VEE /RE


    Other Bias Methods
    (Base Bias)
    VCC – VRB – VBE = 0

    VCC – IBRB – VBE = 0

    IB = (VCC – VBE)/RB

    VCC – ICRC – VCE = 0

    VCE = VCC – ICRC

    • Substituting the expression for IB into the formula


    IC = βDC yields

    IC = βDC ((VCC – VBE)/RB)

    • This type of circuit is very unstable since it’s βDC


    changes with temperature and IC also from one
    transistor to another due to manufacturing variations.
    Example 3
    Determine the Q-point values of IC
    and VCE for the circuit in the figure.
    Assume βDC = 100, VCC = 8 V, RB =
    360 kΩ and RC = 2 kΩ. Construct
    the dc load line and plot the Q-
    point.
    Other Bias Methods
    (Emitter-Feedback Bias)
    •An emitter resistor changes base bias into
    emitter-feedback bias, which is more
    predictable. The emitter resistor is a form of
    negative feedback.

    •The equation for emitter current is found by


    writing KVL around the base circuit. The
    result is

    IE = (VCC – VBE)/(RE + RB /βDC)


    Other Bias Methods
    (Collector-Feedback Bias)
    • It kept stable with negative feedback, but not as stable
    as voltage-divider or emitter. If IC, try to increase, VRC
    increase, VC decrease, VRB decrease, IB decrease.

    IB = (VC – VBE)/RB

    VC = VCC – ICRC

    IC = (VCC – VBE)/(RC + RB /βDC)

    • Since emitter is ground, VCE = VC

    VCE = VCC – ICRC

    • IC depend on βDC and VBE, and can minimize by,

    RC >> RB and VCC >> VBE


    Selected Key
    Terms
    1. A signal that swings outside the active area will be

    a. clamped

    b. clipped

    Test yourself… c. unstable

    d. all of the above


    2. A stiff voltage divider is one in which

    a. there is no load current

    b. divider current is small compared to load current

    Test yourself… c. the load is connected directly to the source voltage

    d. loading effects can be ignored


    3. Emitter bias

    a. is not good for linear circuits

    b. uses a voltage-divider on the input

    Test yourself… c. requires dual power supplies

    d. all of the above


    4. The circuit shown is an example of

    a. base bias

    b. collector-feedback bias

    Test yourself… c. emitter bias

    d. voltage-divider bias
    5. The circuit shown is an example of

    a. base bias

    b. collector-feedback bias

    Test yourself… c. emitter bias

    d. voltage-divider bias
    The End

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