BJT Biasing: EIE 323 Analogue Electronics
BJT Biasing: EIE 323 Analogue Electronics
BJT Biasing: EIE 323 Analogue Electronics
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BJT BIASING
EIE 323
ANALOGUE ELECTRONICS
1 OSHIN, O. I. - EIE 323 LECTURE NOTE 2
BIASING
• Transistor biasing is purely a dc operation. It involves setting up the DC
voltages and current in an electronic circuit.
• The mode of operation of each transistor is determined by the biasing
condition.
• Biasing establishes the dc operating point (Q-point) for proper linear
operation of an amplifier
• The purpose of biasing is to establish a Q-point about which variations in
current and voltage can occur in response to an ac input signal.
2
DC LOAD LINE
• The dc load line is the locus of IC and VCE at which BJT remains in active
region
• It represents all the possible combinations of IC and VCE for a given
amplifier.
• The load line is drawn based on the DC operating characteristics of the
circuit.
• It gives a graphical representation of the transistor characteristics.
.
3
DRAWING THE DC LOAD LINE
VCE(max)
The IC(max) and VCE(max) give the end points of the line, these points
are joined together to give the DC load line.
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Example:
Plot the dc load line for the circuit show below;
+12 V
IC
RC
2 k
8 IC(sat)
RB
6
Q1 4
VCE(off)
2
VCE
2 4 6 8 10 12
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5
Easy Example: Find the Q-point values of the transistor below
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Example: Determine the Q-point for the circuit, and draw the dc load line. Find the
maximum peak value of base current for linear operation. Assume βDC = 200.
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Base Bias
• This involves setting up a fixed value of base current (IBQ).
• Q point is extremely β-dependent... hence unreliable
• Rarely used in linear operations, but common in switching circuits
KVL across the base
KVL across the collector
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Example: Determine how much the Q-point (IC and VCE) for the circuit will change
over a temperature range, where βDC increases from 100 to 200
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Base Bias with Emitter Feedback
(Emitter-Feedback Bias)
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10
Base Bias with Collector Feedback
(Collector-Feedback Bias)
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Example: Calculate the Q-point values for the circuit below.
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VOLTAGE-DIVIDER BIAS
• VCC is the single bias source
• VB can be developed by a resistive voltage divider
that consists of R1 and R2,
• Voltage-divider bias circuits are designed so that the
base current (IB) is much smaller than (I2)
• Stiff voltage divider: (IB <I2), neglect loading effect
As long as RIN(BASE) is at least ten times larger than R2, the loading
effect will be 10% or less and the voltage divider is stiff. If RIN(BASE) is less
than ten times R2, it should be combined in parallel with R2
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Easy Example:
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Thevenin’s Theorem Applied to Voltage-Divider Bias
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Example:
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Emitter Bias
• Uses both a positive and a negative supply voltage.
• It provides excellent bias stability in spite of changes in temperature.
VEE 0.7V
IB
RB hFE 1 RE
I C hFE I B
I E hFE 1 I B
Merits: The circuit Q-point
values are stable against VCE VCC I C RC I E RE VEE
changes in hFE.
Demerits: Requires the use of Assume that hFE >> 1.
dual-polarity power supply.
Applications: Used primarily
to bias linear amplifiers. VCE VCC I C RC RE VEE
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Thanks
for
Listening.
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