ADE Unit 01 Notes pdf
ADE Unit 01 Notes pdf
Transistor as an Amplifier
Faithful Amplification
What is Biasing? Need of biasing
Potential Divider Bias Circuit
Numerical [using Method-I and Method-II]
Transistor as an Electronic Switch
How to identify region of operation for transistor?
What is FET? Difference between BJT & FET
Construction and working of N-channel JFET.
Construction of a Transistor
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Unit 01: Introduction to Analog Circuits
Transistor as an Amplifier
500 mV
IE = = 25mA
20Ω
we know that, IC ≅ I𝐸
output voltage = IC × 𝑅C
Transistor Configurations
The transistor has three terminals: Emitter (E), Base (B) & Collector (C). But in the
circuit connections we need four terminals, two terminals for input and another two
terminals for output. To overcome this problem one terminal is used as common for
both input and output actions. Using this property different circuits can be constructed
and these structures are called Transistor Configurations. Generally there are three
different configurations of transistors. They are:
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Unit 01: Introduction to Analog Circuits
▪ Input Current: IB
▪ Input Voltage: VBE
▪ Output Current: IC
▪ Output Voltage: VCE
▪ VBB : Forward Biasing Voltage
▪ VCC : Reverse Biasing Voltage
VCE = VCC − IC R C
IC = β IB
Faithful Amplification
The process of raising the strength of a weak signal without any change in its general
shape is known as a faithful amplification. (OR) The increase in magnitude of the
signal without any change in its shape is known as faithful amplification.
The key factor for achieving the faithful amplification is that the base emitter junction
of transistor remains forward biased and collector junction reverse biased. To ensure
Faithful amplification following conditions must be specified.
1. Proper Zero Signal Collector Current: The value of zero signal collector current
should be at least equal to the maximum collector current due to signal alone.
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Unit 01: Introduction to Analog Circuits
Transistor Biasing
If a signal of very small voltage is given to the input of BJT, it cannot be amplified.
Because, for a BJT, to amplify a signal, two conditions have to be met
1. The input voltage should exceed cut-in voltage (VBE = 0.7V for Silicon transistor)
for the transistor to be ON.
2. The BJT should be in the ACTIVE region, to be operated as an amplifier.
*In short, Biasing of transistor is required to achieve faithful amplification !
The basic purpose of transistor biasing is to keep base-emitter junction properly forward
biased and collector-base junction properly reverse biased during the application of
signal. This can be achieved with bias battery or associating circuit with a transistor.
The latter method is more efficient and frequently employed! The circuit which provides
transistor biasing is known as Biasing Circuit. There are different types of Biasing circuit:
1. Base Resistor Method (or Fixed Biased Method)
2. Emitter Bias Method
3. Biasing with Collector Feedback Resistor
4. Potential Divider Biasing (or Voltage Divider Biasing)
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Unit 01: Introduction to Analog Circuits
VCC
∴ I1 =
R1 + R 2
R2
V2 = ( )V
R1 + R 2 CC
V2 − VBE − VE = 0
i.e.,
V2 = VBE + VE = VBE + IE R E
V2 − VBE
IE =
RE
But, we know that IC ≅ IE
V2 − VBE
∴ IC =
RE
Applying KVL to the output side, we get
VCC − IC R C − VCE − IE R E = 0
i.e.,
VCE = VCC − IC R C − IE R E
VCE = VCC − IC (R C + R E )
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Unit 01: Introduction to Analog Circuits
Solution:
R2 3kΩ
V2 = ( ) VCC = ( ) 15V = 5V
R1 + R 2 6kΩ + 3kΩ
V2 − VBE − VE = 0
i.e.,
V2 = VBE + VE = VBE + IE R E
V2 − VBE 5 − 0.7
IE = = = 4.3 mA
RE 1kΩ
VCC − IC R C − VCE − IE R E = 0
VCE = VCC − IC R C − IE R E
VCE = VCC − IC (R C + R E )
VCE = 8.68 V
Thevenin’s Theorem states that it is possible to simplify any linear circuit, no matter
how complex, to an equivalent circuit with just a single voltage source (VTH ) and series
resistance (R TH ) connected to a load.
R2 R1 . R 2
VTH = ( )V and R TH = R1 ||R 2 =
R1 + R 2 CC R1 + R 2
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Unit 01: Introduction to Analog Circuits
VTH − IB R TH − VBE − IE R E = 0
VTH = VBE + IB (β R E + R TH )
VCC − IC R C − VCE − IE R E = 0
i.e.,
VCE = VCC − IC R C − IE R E
VCE = VCC − IC (R C + R E )
Ex: The circuit shown in the figure uses Silicon transistor having β=100. Find out the
values of IB , IC and VCE .
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Unit 01: Introduction to Analog Circuits
Solution:
3kΩ
VTH = ( ) 15V = 5V
6kΩ + 3kΩ
Also,
R1 . R 2 3 × 6
R TH = = = 2 kΩ
R1 + R 2 6+3
VTH − IB R TH − VBE − IE R E = 0
VTH = IB R TH + VBE + IC R E ∵ IC ≅ IE
VTH = IB R TH + VBE + β IB R E ∵ IC = β IB
VTH = VBE + IB (β R E + R TH )
4.3V
IB = = 0.042 mA
102kΩ
Now,
IC = β IB = 100 × 0.042 mA = 4.2 mA
VCC − IC R C − VCE − IE R E = 0
i.e.,
VCE = VCC − IC R C − IE R E
VCE = VCC − IC (R C + R E )
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Unit 01: Introduction to Analog Circuits
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Unit 01: Introduction to Analog Circuits
Solution:
VCC 10
∴ ICsat = = 4 kΩ = 2.5 mA and IC = βIB = 100 × 15 μA = 1.5 mA
RC
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Unit 01: Introduction to Analog Circuits
VCC 10
∴ ICsat = = 4 kΩ = 2.5 mA and IC = βIB = 100 × 35 μA = 3.5 mA
RC
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Unit 01: Introduction to Analog Circuits
➢ JFET consists of a p-type or n-type silicon bar containing two PN junctions at the
sides as shown in figure. Bar forms conducting channel for charge carriers.
➢ If bar is n-type then it is called as n-channel JFET and if the bar is p-type then it is
called as p-channel JFET. The two PN junction forming diodes are connected
internally and common terminal called GATE is taken out.
N-channel JFET:
The gate is reverse biased. If a voltage applied between the source and drain, the N-type
bar would conduct in either direction because of the doping. Figure (a) shows the
depletion region at the gate junction. The depletion region extends more deeply into
the channel side due to the heavy gate doping and light channel doping.
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Unit 01: Introduction to Analog Circuits
The thickness of the depletion region can be increased by applying moderate reverse
bias (fig. b). This increases the resistance of the source to drain channel by narrowing
the channel. Increasing the reverse bias further increases the depletion region,
decreases the channel width, and increases the channel resistance (fig. c). Finally
increasing the reverse bias voltage VGS will pinch-off the channel current (fig. d). The
channel resistance will be very high. This VGS at which pinch-off occurs is called as
pinch-off voltage (VP). In summation, the channel resistance can be controlled by the
degree of reverse biasing on the gate. It is clear from the discussion that current from
drain to source can be controlled by the application of potential (electric field) on the
gate. Hence, the device is known as Field Effect Transistors.
The drain source voltage VDS, not shown in previous figures, distorts the depletion
region, enlarging it on the drain side of the gate. As drain voltage VDS increased, the
gate depletion region expands toward the drain as shown in figure.
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Unit 01: Introduction to Analog Circuits
▪ In a JFET, there is only one type of carrier (i.e., holes in p-type channel and electrons
in n-type channel). For this reason it is also called Unipolar Transistor. However, in
an ordinary BJT, both electrons and holes play role in conduction. Therefore, it is
called as bipolar transistor.
▪ As the input circuit of a JFET is reverse biased, therefore, it has a high input
impedance. However, the input circuit of a BJT is forward biased and hence has low
input impedance.
▪ The primary functional difference between the JFET and BJT is that no current enters
the gate of JFET (IG = 0). However, in typical BJT base current might be a few µA.
▪ A BJT uses the current into its base to control a large current between collector and
emitter. Whereas, a JFET uses voltage on the gate terminal to control the current
between drain and source.
▪ In JFET, there is no junction. Therefore, noise level in JFET is very small.
Advantages of JFET
Important Questions:
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