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Ec Unit 1

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AMPLIFIERS

v An amplifier is a circuit which can be used to increase the magnitude of the


input current or voltage at the output by means of energy drawn from an
external source.
v When the input signal is so weak as to produce small fluctuations in the
collector current compared to its quiescent value, the amplifier is known as
Small Signal Amplifier.
v when fluctuation in collector current is large i.e., beyond the linear portion of
the characteristics the amplifier, is called as large signal amplifier.
BIASING:
v The transistors are used in a large variety of applications and in many ways.
v To use a transistor in any application, it is necessary to provide the
sufficient voltage and current to switch ON and to operate in linear region
of its transfer characteristics. This process is known as ‘Biasing’.

Different levels of Biasing


v The “biasing” means providing a fixed or minimum amount of the current
which would flow through the transistor with the desired fixed voltage across
the transistor junctions.
v The proper values of these currents and voltages allow a transistor to work in
the linear region and it amplify the weak signal faithfully
v The faithful amplification means, the transistor must increase the magnitude of
the signal without changing its shape.
v Figure (a) shows a properly biased transistor amplifier, in this case, the signal
variation at the input of a transistor are exactly reproduced at the output.
v Figure 14 (b and c) shows the improperly biased transistor amplifiers ie, in
figure 14(b) the transistor is biased nearer to its cutoff region hence the
positive portion of the output signal is clipped. But in the case .of figure 14(c)
the transistor is biased nearer to saturation region, so, the negative peak of the
output signal is clipped.
NEED FOR BIASING:

Transistor as an amplifier

v When an Input ac signal only is supplied to the circuit (without any dc) as
shown in figure , during positive half cycle of input (Vin > Vb) then
input junction becomes forward biased results in current flows from emitter to
base then base to collector circuit
v During negative half cycle of input, the junction becomes reverse biased so, no
current flows in the circuit, results in negative cycle is not amplified as shown
in figure.
v The resultant output is the unfaithful or distorted (i.e., input and output shape
are not same).
Thus, to obtain faithful amplification the following three conditions needs to
be satisfied:

i) the emitter-base junction should be properly forward biased, i.e., whether


the ac input is applied or not input junction needs to be forward biased.

ii) the collector-base junction should be reverse biased, and

iii) there should be proper zero signal (i.e., ac input is present or not) collector
current
v The proper flow of zero signal dc collector current (proper operating point of a
transistor) and the maintenance of proper collector-emitter voltage during the
passage of signal is known as transistor biasing.
v It is important to note that the an input voltage should be smaller than the
biasing voltage, otherwise the above mentioned problem respects at every
cycle.
Stabilisation
v The maintenance of the operating point as constant is known as ‘stabilization’.
There are two techniques used for maintain the Q point as constant.
v (1) Stabilization technique:
This technique consists of a biasing circuit which permits a variation of
base current Ib so as to maintain Ic almost constant in spite of variation of Ico,
and Vbe.

v (ii) Compensation technique:


In this technique, sensitive devices such as diodes, transistors, thermistors
etc are used. Such devices produce compensating voltages and currents in such a
way that the operating point is maintained stable.

Stability Factor:
v There are different compensation and stabilization techniques to compare the
biasing circuit a common factor called stability factor is used.
There are three stability factors
v 1. The stability factor S is defined as the rate of change of collector current
with respect to the reverse saturation current Ico keeping and VBE
constant, i.e.,

2. Stability factor S :This is defined as the rate of change of Ic with respect to


keeping Ico and Vbe constant, i.e.,

3. Stability Factor Sv: This is defined as the rate of change of Ic with respect to
Vbe, keeping Ib and constant i.e.,

Expression for Stability Factor (s)


When a transistor is biased in the active region of its characteristics, the collector
current Ic is related to the base current Ib by the following expression.
Types of BJT Biasing
v The different methods used for providing bias for a transistor are as follows:
1. Base Resistor method or Fixed Bias.
2. Collector to Base Bias
3. Voltage Divider Bias or Self Bias.
v The basic principle involved in all the above methods is to obtain the required
base current from V in zero signal conditions.
v The value of collector load is selected in such a way that the voltage between
collector and emitter should be below O.2V for germanium transistor and
O.3V for Silicon transistor.
BASE RESISTOR METHOD OR FIXED BIAS

Fixed bias method


v In this method a high resistance Rb is connected between positive terminal of
supply Vcc and base of the transistor.
v It should be remembered that if the transistor is PNP, the Rb is connected
between negative terminal of supply Vcc and base of the transistor. Here the
required zero signal base current flows through Rb and is provided by Vcc
v The base-emitter junction is forward biased because the base is positive w.r.t.
emitter. By the proper selection of Rb, the required zero signal base current
(and hence Ic = Ib) can be made to flow.

v To find the value of resistance Rb apply the KVL to the closed circuit (input
circuit) ABKLA, then we have

Stability Factor ‘S
The stability factor ‘S can be defined as rate of change of collector current Ic w.r.t
reverse saturation current Ico, assume and VBE are constants.

T obtain ‘S differentiate the equation (2) w.r.t. Ic


SELF BIAS (OR) VOLTAGE DIVIDER BIAS
v A very commonly used biasing method is self-bias or voltage divider or
emitter bias. This is also called as universal bias stabilization circuit

v In this method two resistances R1 and R2 act as potential divider and


are connected across supply voltage Vcc and to provide proper biasing.
v The emitter resistance Re provides stabilization. The net forward bias across
the emitter junction is Vbe=Vb-Ve.
The improvement in the operating point stability may be explained as follows:
v Let there be a rise in temperature, this causes a rise in Ico i.e. a rise in Ic,.
Now, the current in Re increases, as a result, the voltage drop across Re
increases and consequently the base current decreases.
v Thus the collector current decreases result in which improves the operating
point stability. In case of amplifiers to avoid the loss of ac gain (because of the
feedback caused by RE) a capacitor of large capacitance is connected across
RE. This capacitor offers a very small reactance to ac signal and hence it
passes through it.
Circuit Analysis

INPUT CIRCUIT
Here Ic is almost independent of transistor parameters , Ib and Ico and hence good
stabilization is ensured. The collector emitter voltage Vce can be calculated as
follows:

OUTPUT CIRCUIT

Self Bias Analysis using thevenin’s equivalent circ


Applying KVL to the base emitter circuit ,

v This expression show that S=1 if Rb/Re<<1 ie Re should be much greater


Rb. But there is a limit for increasing Re because the high value of RE means
increased voltage drop across emitter so that Ib get reduced. Hence the dynamic
range of input signal gets reduced. Thus. For accomodating large signal Vcc has
to be increased.
FIXED BIAS:
The fixed biasing arrangement for the n-channel JFET

Fixed bias of JFET dc analysis of fixed bias


v For the dc analysis assume the capacitors are acts as open circuited and it acts
as short circuit for ac analysis.

The zero volt drop across Rg permits replacing Rg by a short circuit equivalent.
Apply KVL to the input circuit

If VGG is fixed then VGS is also fixed in magnitude resulting in “fixed bias
configuration”. The dc levels of voltage VGS and current ID can be determined as
follows.
VDS+IDRD=VDD (2)
VDS=VDD-IDRD (3)
We know
VDS=VD-VS if VS=0

VDS=VD (4)
Hence from equation (3) we get IDQ= VDD- VD/RD
In addition VGS=VG-VS

VGQ =VGS
The graphical analysis of FET biasing as follows

Solution for fixed bias configuration


v The transfer characteristics of JFET as shown in figure .
v To locate the operating point, the fixed level of VGS (for fixed bias we proved
VGS = VGG has been superimposed on the transfer characteristics (as vertical
line). The point where the two curves intersect is the commonly referred as
“Q-point”. The level of ID at ‘Q’ point can be determined from the vertical
axis.
SELF BIAS:

(a)JFET Self bias configuration (b)DC analysis of the self bias configuration

v The self bias configuration of JFET is shown in figure(a) . It eliminates the


need for two dc supplies. The controlling gate to source voltage V GS is
determined by the voltage across the resistor RS connected in the source
terminal.
v For the dc analysis the capacitors can be replaced by “open circuits” and
the resistor RG replaced by a short circuit equivalent since IG = 0. The
modified circuit shown in figure (b)

v In this case VGS is a function of the output current ID and not fixed in
magnitude like fixed bias configuration.
v The equation (1) and Shockkly equation relates the same two variables
ID and V GS permitteng either a mathematical or graphical solution
v . The mathematical analysis can be obtained as follows, Shockkly’s
equation is given by
Small signal analysis of CE arnplifier
v A small signal amplifier can be defined as the amplifier in which
input signal is so weak as to produce small fluctuations in the
collector current compared to its Q’ point value. It has only one
amplifying device.
v Based on the transistor configuration small signal amplifiers are
classified as CE, CC and CB amplifiers. In this chapter we will study
the analysis of small signal amplifier using different biasing.
Need for capacitance coupling in amplifiers
v Assuming all the three capacitors have impedances which are
extremely small at signal frequencies, each capacitor can be
considered as short circuit for ac signal and open circuit for dc.
v If the signal source were directly coupled to the transistor base,
source resistance Rs would be directly in parallel with resistor R2.
This would reduce the bias voltage at the transistor base end and,
consequently alter the collector current.
v Similarly if RL is directly connected to the transistor collector, the
Rc is in parallel with RL thus the dc levels of Vc and Vce would
be affected. Therefore coupling capacitors C1and C2 function as
open circuits to dc and short Circuits to ac.
The following steps are followed to obtain the small
signal equivalent circuit:
v i. Start with complete circuit diagram
v ii. Assume all the capacitors, which are large enough can be
considered to be short circuit such capacitors are used as coupling
capacitors between input, output and bypass capacitor.
v iii. Replace the dc power supply by.a short circuit.
v iv. Replace the transistor by its h parameter model.
v Connect all other circuit elements with h parameter model thus
the small signal equivalent circuit is obtained.
Construction
.1. A common emitter athplifier circuit is shown in fig. .The circuit
coxnsist of biasing tesistorR1 and R2 temperature stabilization
resistor Re, coil load resistor Rc
2. The circuit uses bypass capacitor C to eliminate ac degeneration.
3. The signal source is connected to the transistor base via coupling
capacitcor C1 &capacitor C2 couples external load resistor RL to the
transistor collector.
CE amplifier
fig.(a)

CE amplifier using mall signal ac equivalent circuit


The h-parameter equivalent circuit of common emitter configuration is -
shown ifigure (a).’ It is drawn by simply replacing the transistor common
emitter ac equivalent circuit with its h-parameter circuit assume all the
capacitors acts .as short circuit for ac.
When an unbypassed emitter resistor is included the h-parameter equivalent
circuit becomes’ as shown in figure

CE amplifier using small signal ac equivalent circu


Darlington Amplifier

v Sometimes, the current gain and input impedance of an emitter


follower are insufficient to the requirement. In order to increase the
overall values of circuit current gain (A i) and input impedance, two
transistors are connected in series in emitter follower configuration
Such a circuit is called Darling:on amplifier
v the emitter of first transistor is connected to base of the second
transistor and the collector terminals of the two transistors are
connected together
v The result is that emitter current of the first transistor is the base
current of the second transistor. Therefore, the current gain of the
pair is equal to product of individual current gains i.e.

v High current gain is achieved with a minimum use of


components.
v The biasing analysis is similar to that for one transistor except that
two VBE drops are to considered.
Darlington transistor
In practice, the two transistors are put inside a single transistor housing and three
terminals E, B and C are brought out.This three terminal device is known a
Darlington transistor.
The Darlington transistor acts like single transistor that has high current gain and
high input impedance.
Applications.
When an emitter follower cannot provide e required high input impedance and
current gain, the Darlington amplifier is used.
Power amplifiers:
• The aim in most of the applications is to furnish the required power as
economically as possible.
• It should meet other specifications which includes size, weight, dc supply,
distortion, etc.,

Class A, AB, B, C and D type of operation:


(Classification-power amplifiers)
• They are classified according to the portion of the input sine-wave cycle during
which the load current flows.

Class A: current flows for 360o (or) full cycle.

Class AB: current flows for more than one half cycle but less than full cycle
(180o<θ<360).
Class B: Current flows for one half cycle (180 o)
Class C: Current flows for less than one half cycle (θ<180o)

Uses of Power Amplifiers:


• To achieve low distortion-amplification of audio frequency signals, class A
amplifier is used.
• Class AB and class B amplifiers with complimentary symmetry or Push Pull
arrangement can also be used for linear amplification.
• Class C amplifiers are extensively used at radio frequencies where tuned circuits
remove the distortion resulting from non-linear operation of the circuit.

Figure of Merit and Conversion efficiency:


It is defined as the ratio of the ac power delivered to the load to the dc power
obtained from the supply.
% Efficiency = ( poac / pin dc ) x 100
F = 1/ efficiency.

Transformer Coupled Class-A Amplifier :


v The overall efficiency of a direct coupled class-A amplifier does not exceed
25%. The main reason for this is that load resistance is directly connected in
the output circuit of the amplifier.
v Due to this, the quiescent current (JCQ) passes through the resistance.

Transformer coupled class-A amplifier.


v This current represents a considerable waste of power, whose value is equal to
2
I CQ RL, because it does not contribute to a.c. output power. This problem is
solved by using a suitable transformer for coupling the load to the amplifier
stage.
v Since the primary winding of a transformer has a low resistance, therefore the
power absorbed in the winding is negligible as compared to the resistive load.
v The transformer coupled class-A amplifier is also known as single-ended
class-A amplifier.
v The term ‘single-ended’ is used to differentiate this type from the push-pull
amplifiers. The function of a transformer is to match the low impedance load
(such as loudspeaker) to that of the output impedance of the amplifier.
v The impedance matching property follows from the relations:
v It may be noted that if the value of secondary turns N 2 is less than of primary
turns N1, then the above equations show that the transformer reduces the
voltage in proportion to the turns ratio N2 /N1(equal to n) and steps up the
current in the same ratio.
v The ratio of these two equations gives

v V1/I1 represents the effective load resistance or the resistance seen looking into
the primary of the transformer and is designated as R’L. On the other hand,
V2/I2 represents the value of load resistance (i.e., RL).
v Therefore the equation (i) may be rewritten as,

and is called step down turns ratio.


v Usually, the value of ‘a’ is made much larger than unity.
v It is necessary to make the load resistance appear as a large effective resistance
seen from the transformer primary.
v It may be noted that in an ideal transformer, there is no primary drop. As a
result of this, all the supply voltage appears as the collector-to-emitter voltage
of the transistor (i.e., VCC = VCEQ).
v Therefore total power drawn from the d.c. supply is equal to the d.c. power
developed within the transistor.
v Thus the overall efficiency and collector efficiency becomes equal, i.e.,

§
The maximum value of overall or collector efficiency of a transformer coupled
class-A amplifier is 50%.
Proof:
Average power delivered by the d.c. supply,

and power developed in the transistor under zero-signal condition,


For the largest possible output signal, the peak (or maximum) value of the output
voltage developed across the load resistor,

and the peak value of output current,

Overall efficiency,

and collector efficiency,

Push Pull Amplifier:


v In single ended afiiplifiers, ie, amplifiers using single transistor, provide
distortion due to non linearity of transfer characteristics.
v This distortioamay reduced by pushpull operation.
v

Pushpull operation
v The input signal is applied to the inputs of the two transistors through a tapped
transformer T1 ,The voltages at the base of the two transistors Q1& Q2 are in
pushpull. ie in phase opposition.
v That is when signal on transistor Q1 is positive, the signal at Q2 is negative an
equal amount. It can be easily obtained by centre tapped transformer.
v However, instead of such a centre tapped transformer, we may alter use other
circuit which provides two equal ‘voltages differing in phase
The collector of transistor Q1 (fourier series) is given by

v The currents i1 and i2 are flowing through the primary winding of the output
former T2 in opposite direction.
v Thus the total current in the secondary is proportional to the difference
between the two currents i1 and i2

This expression shows that a pushpull circuit will balances out all even harmonics
in the output and out of odd harmonics only third harmonic term produce
The. Significant contribution of distortion, thus all other higher harmonics are
neglected.

Advantages of Pushpull configuration


v This arrangement gives less distortion because ail even harmonics are
cancelled out only odd haripenics present in the output.
v Because of absence of even harmonics in the output, the circuit given more
output power per transistor for a given amount of distortion.
v The dc components of the collector current of the two transistor oppose each
other magnetically in the core of the transformer, this eliminates the tendency
of the core to saturate and consequent non linear distortion.
v The effect of ripple voltage contained in the power supply caused by
inadequate filtering are balanced out.
Class AB amplifier
v In this case the voltage drop across R is so adjusted that the collector current
flows for less than one cycle but more than half the cycle of input signal. Thus
the distortion in AB anipifier is less than class B amplifier.
v Class AB operation is particularly suitable for minimizing the crossover
distortion caused by non-linearity of input characteristic.
Class AB pushpull Amplifier
v No appreciable base current flows until the emitter junction is forward - bias
by cut in voltageV . Under these circumstances a sinusoidal base-voltage
excitation will not result in a sinusoidal output current.
v The cross over distortion caused by the non linear transistor input
characteristic.
v The output is proportional to the base current.
v The output current is small when Vi < V.Thus the output is deviated from the
linear characteristics. This distortion is called as ‘cross over distortion.
v
CASCADE AMPLIFIER:
v The most popular cascade amplifier is formed by cascading several CE
amplifier stages. The general analysis of a general ‘n’ stage CE amplifier is
shown below.
v Biasing arrangements and coupling elements are omitted for simplicity.

v The expressions for quantities such as voltage gain, current gain, power gain,
input impedance and output impedance of this ‘n’ stage CE amplifier are to be
derived.

VOLTAGE GAIN:
v In a multistage amplifier the output voltage of the first stage acts as the input
v voltage of second stage and so on.
v The voltage gain of the complete cascade amplifier is equal to the product of
the voltage gains of the individual stages.
v The voltage gain of the first stage is:

AV1 is magnitude of the voltage gain


θ1 is the phase angle of outvoltage relative to input voltage

Similar expressions can be written for all ‘n’ stages of the cascade amplifier.
The gain of the overall cascade amplifier is the product of the stage gains Av1 and
Av2.

The input impedance of the cascade amplifier is that of sage 1,


Zi = RG1
While the output impedance is that of stage 2,
Zo = RD2
The main objective of cascaded amplifier is to provide large overall gain.
The resultant voltage gain is:

where

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