Freescale Semiconductor Document Number: MRFE6VP6300H

Technical Data Rev. 1, 7/2011

RF Power Field Effect Transistors

High Ruggedness N--Channel MRFE6VP6300HR3
Enhancement--Mode Lateral MOSFETs MRFE6VP6300HSR3
These high ruggedness devices are designed for use in high VSWR industrial
(including laser and plasma exciters), broadcast (analog and digital), aerospace
and radio/land mobile applications. They are unmatched input and output
designs allowing wide frequency range utilization, between 1.8 and 600 MHz.
1.8--600 MHz, 300 W, 50 V
• Typical Performance: VDD = 50 Volts, IDQ = 100 mA
LATERAL N--CHANNEL
Pout f Gps ηD IRL BROADBAND
Signal Type (W) (MHz) (dB) (%) (dB) RF POWER MOSFETs
Pulsed (100 μsec, 300 Peak 230 26.5 74.0 --16
20% Duty Cycle)
CW 300 Avg. 130 25.0 80.0 --15
• Capable of Handling a Load Mismatch of 65:1 VSWR, @ 50 Vdc, 230 MHz,
at all Phase Angles
• 300 Watts CW Output Power
• 300 Watts Pulsed Peak Power, 20% Duty Cycle, 100 μsec CASE 465M--01, STYLE 1
• Capable of 300 Watts CW Operation NI--780--4
Features MRFE6VP6300HR3
• Unmatched Input and Output Allowing Wide Frequency Range Utilization
• Device can be used Single--Ended or in a Push--Pull Configuration
• Qualified Up to a Maximum of 50 VDD Operation
• Characterized from 30 V to 50 V for Extended Power Range
• Suitable for Linear Application with Appropriate Biasing CASE 465H--02, STYLE 1
• Integrated ESD Protection NI--780S--4
• Greater Negative Gate--Source Voltage Range for Improved Class C Operation MRFE6VP6300HSR3
• Characterized with Series Equivalent Large--Signal Impedance Parameters
• RoHS Compliant
• NI--780--4 in Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width,
13 inch Reel. For R5 Tape and Reel options, see p. 14.
• NI--780S--4 in Tape and Reel. R3 Suffix = 250 Units, 32 mm Tape Width,
13 inch Reel. For R5 Tape and Reel options, see p. 14. RFin/VGS 3 1 RFout/VDS

Table 1. Maximum Ratings

Rating Symbol Value Unit
RFin/VGS 4 2 RFout/VDS
Drain--Source Voltage VDSS --0.5, +130 Vdc
Gate--Source Voltage VGS --6.0, +10 Vdc
Storage Temperature Range Tstg --65 to +150 °C (Top View)
Case Operating Temperature TC 150 °C
Figure 1. Pin Connections
Total Device Dissipation @ TC = 25°C PD 1050 W
Derate above 25°C 5.26 W/°C
Operating Junction Temperature (1,2) TJ 225 °C

Table 2. Thermal Characteristics

Characteristic Symbol Value (2,3) Unit
Thermal Resistance, Junction to Case (4) °C/W
Pulsed: Case Temperature 75°C, 300 W Pulsed, 100 μsec Pulse Width, 20% Duty Cycle,
50 Vdc, IDQ = 100 mA, 230 MHz ZθJC 0.05
CW: Case Temperature 87°C, 300 W CW, 50 Vdc, IDQ = 1100 mA, 230 MHz RθJC 0.19
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access
MTTF calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
4. Same test circuit is used for both pulsed and CW.

© Freescale Semiconductor, Inc., 2010--2011. All rights reserved. MRFE6VP6300HR3 MRFE6VP6300HSR3

RF Device Data
Freescale Semiconductor 1
Table 3. ESD Protection Characteristics
Test Methodology Class
Human Body Model (per JESD22--A114) 2 (Minimum)
Machine Model (per EIA/JESD22--A115) B (Minimum)
Charge Device Model (per JESD22--C101) IV (Minimum)

Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

Off Characteristics (1)

Gate--Source Leakage Current IGSS — — 1 μAdc

(VGS = 5 Vdc, VDS = 0 Vdc)
Drain--Source Breakdown Voltage V(BR)DSS 130 — — Vdc
(VGS = 0 Vdc, ID = 50 mA)

Zero Gate Voltage Drain Leakage Current IDSS — — 5 μAdc

(VDS = 50 Vdc, VGS = 0 Vdc)

Zero Gate Voltage Drain Leakage Current IDSS — — 10 μAdc

(VDS = 100 Vdc, VGS = 0 Vdc)

On Characteristics
Gate Threshold Voltage (1) VGS(th) 1.7 2.2 2.7 Vdc
(VDS = 10 Vdc, ID = 480 μAdc)
Gate Quiescent Voltage VGS(Q) 2.0 2.5 3.0 Vdc
(VDD = 50 Vdc, ID = 100 mAdc, Measured in Functional Test)

Drain--Source On--Voltage (1) VDS(on) — 0.25 — Vdc

(VGS = 10 Vdc, ID = 1 Adc)

Dynamic Characteristics (1)

Reverse Transfer Capacitance Crss — 0.8 — pF
(VDS = 50 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)

Output Capacitance Coss — 76 — pF

(VDS = 50 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Input Capacitance Ciss — 188 — pF
(VDS = 50 Vdc, VGS = 0 Vdc ± 30 mV(rms)ac @ 1 MHz)

Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 100 mA, Pout = 300 W Peak (60 W Avg.), f = 230 MHz,
Pulsed, 100 μsec Pulse Width, 20% Duty Cycle
Power Gain Gps 25.0 26.5 28.0 dB
Drain Efficiency ηD 72.0 74.0 — %
Input Return Loss IRL — --16 --9 dB
Load Mismatch (In Freescale Application Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 100 mA
VSWR 65:1 at all Phase Angles Ψ No Degradation in Output Power
Pulsed: Pout = 300 W Peak (60 W Avg.), f = 230 MHz, Pulsed,
100 μsec Pulse Width, 20% Duty Cycle
CW: Pout = 300 W Avg., f = 130 MHz
1. Each side of device measured separately.

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
2 Freescale Semiconductor
 VBIAS VSUPPLY
+ + + +
C8 L1 C9 C14 C15 C10 C11 C12 C13 C16

L2
R1 RF
C4 C5 C6 C7
OUTPUT
Z8 Z9 Z10 Z11 Z12 Z13
RF
INPUT C20
Z1 Z2 Z3 Z4 Z5 Z6 Z7
C17 C18 C19
C1
C2 C3 DUT

Z1 0.352″ x 0.080″ Microstrip Z9 0.192″ x 0.170″ Microstrip

Z2* 1.780″ x 0.080″ Microstrip Z10* 0.366″ x 0.170″ Microstrip
Z3* 0.576″ x 0.080″ Microstrip Z11* 2.195″ x 0.170″ Microstrip
Z4 0.220″ x 0.220″ Microstrip Z12* 0.614″ x 0.170″ Microstrip
Z5 0.322″ x 0.220″ Microstrip Z13 0.243″ x 0.080″ Microstrip
Z6 0.168″ x 0.220″ Microstrip * Line length includes microstrip bends
Z7, Z8 0.282″ x 0.630″ Microstrip

Note: Same test circuit is used for both pulsed and CW.

Figure 2. MRFE6VP6300HR3(HSR3) Test Circuit Schematic

Table 5. MRFE6VP6300HR3(HSR3) Test Circuit Component Designations and Values

Part Description Part Number Manufacturer
C1, C20 15 pF Chip Capacitors ATC100B150JT500XT ATC
C2 82 pF Chip Capacitor ATC100B820JT500XT ATC
C3, C17 91 pF Chip Capacitors ATC100B910JT500XT ATC
C4, C10 1000 pF Chip Capacitors ATC100B102JT50XT ATC
C5, C11 10K pF Chip Capacitors ATC200B103KT50XT ATC
C6 0.1 μF, 50 V Chip Capacitor CDR33BX104AKWS AVX
C7 2.2 μF, 100 V Chip Capacitor HMK432B7225KM--T Taiyo Yuden
C8 10 μF, 35 V Tantalum Capacitor T491D106K035AT Kemet
C9 2.2 μF, 100 V Chip Capacitor G2225X7R225KT3AB ATC
C12 0.1 μF, 100 V Chip Capacitor C1812F104K1RAC Kemet
C13 0.01 μF, 100 V Chip Capacitor C1825C103K1GAC Kemet
C14, C15, C16 220 μF, 100 V Electolytic Capacitors MCGPR100V227M16X26--RH Multicomp
C18, C19 18 pF Chip Capacitors ATC100B180JT500XT ATC
L1 120 nH Inductor 1812SMS--R12JLC Coilcraft
L2 17.5 nH Inductor GA3095--ALC Coilcraft
R1 1000 Ω, 1/2 W Chip Resistor CRCW20101K00FKEF Vishay
PCB 0.030″, εr = 2.55 AD255A Arlon

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
Freescale Semiconductor 3
 C8
C14 C15

L1 C13 C16

C12
C6 C7
C9 C11
C5
C10
C1 C4
C18
C3 R1 L2 C17 C20

CUT OUT AREA

C2
C19

MRFE6VP6300H/HS
Rev. 2

Figure 3. MRFE6VP6300HR3(HSR3) Test Circuit Component Layout

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
4 Freescale Semiconductor
 TYPICAL CHARACTERISTICS — PULSED

1000 60
P3dB = 56.0 dBm (398 W)
Ciss 59 Ideal

Pout, OUTPUT POWER (dBm) PULSED

100 P2dB = 55.8 dBm (380 W)
58
C, CAPACITANCE (pF)

Coss
57 P1dB = 55.4 dBm
10 (344 W)
56
Actual
Crss 55
1

Measured with ±30 mV(rms)ac @ 1 MHz 54 VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz
VGS = 0 Vdc Pulse Width = 100 μsec, 20% Duty Cycle
0.1 53
0 10 20 30 40 50 26 27 28 29 30 31 32 33 34
VDS, DRAIN--SOURCE VOLTAGE (VOLTS) Pin, INPUT POWER (dBm) PULSED
Note: Each side of device measured separately. Figure 5. Pulsed Output Power versus
Figure 4. Capacitance versus Drain--Source Voltage Input Power

29 90 29
VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz
28 Pulse Width = 100 μsec, 20% Duty Cycle
28 Pulse Width = 100 μsec, 20% Duty Cycle 80
27
ηD, DRAIN EFFICIENCY (%)

27 70
Gps, POWER GAIN (dB)

Gps, POWER GAIN (dB)

26

26 25
60
50 V
24
25 50
Gps 23 45 V
40 V
24 40 22
21 35 V
23 30
ηD 20 VDD = 30 V
22 20 19
20 100 600 0 50 100 150 200 250 300 350 400
Pout, OUTPUT POWER (WATTS) PULSED Pout, OUTPUT POWER (WATTS) PULSED
Figure 6. Pulsed Power Gain and Drain Efficiency Figure 7. Pulsed Power Gain versus
versus Output Power Output Power

90 29 90
45 V VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz 85_C 25_C
35 V 40 V 50 V 28 Pulse Width = 100 μsec, 20% Duty Cycle
80 80
VDD = 30 V
27
ηD, DRAIN EFFICIENCY (%)

--30_C 70
70 ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)

Gps
26 25_C 60
60
25 50
TC = --30_C
50
24 40
40 85_C
23 30
VDD = 50 Vdc, IDQ = 100 mA, f = 230 MHz
30 Pulse Width = 100 μsec, 20% Duty Cycle 22 20
ηD
20 21 10
0 50 100 150 200 250 300 350 400 10 100 600
Pout, OUTPUT POWER (WATTS) PULSED Pout, OUTPUT POWER (WATTS) PULSED
Figure 8. Pulsed Drain Efficiency versus Figure 9. Pulsed Power Gain and Drain Efficiency
Output Power versus Output Power

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
Freescale Semiconductor 5
 TYPICAL CHARACTERISTICS — TWO--TONE (1)

--10 --10
VDD = 50 Vdc, IDQ = 1600 mA, f1 = 230 MHz VDD = 50 Vdc, Pout = 250 W (PEP)/62.5 W Avg. per Tone

IMD, INTERMODULATION DISTORTION (dBc)

IMD, INTERMODULATION DISTORTION (dBc)

--20 f2 = 230.1 MHz, Two--Tone Measurements IDQ = 1600 mA, Two--Tone Measurements
--20
--30 3rd Order
--30
--40
3rd Order
--40 5th Order
--50

5th Order --50 7th Order

--60

--70 --60
7th Order
--80 --70
10 100 400 0.1 1 10 40
Pout, OUTPUT POWER (WATTS) PEP TWO--TONE SPACING (MHz)
Figure 10. Intermodulation Distortion Figure 11. Intermodulation Distortion
Products versus Output Power Products versus Two--Tone Spacing
30 --15
VDD = 50 Vdc, f1 = 230 MHz, f2 = 230.1 MHz

INTERMODULATION DISTORTION (dBc)

IDQ = 1600 mA --20 Two--Tone Measurements
29
1400 mA --25
Gps, POWER GAIN (dB)

IMD, THIRD ORDER

IDQ = 650 mA
28
1100 mA --30
900 mA
27 900 mA --35
1100 mA
--40
1400 mA
26
650 mA VDD = 50 Vdc, f1 = 230 MHz, f2 = 230.1 MHz --45
Two--Tone Measurements 1600 mA
25 --50
5 10 100 500 10 100 400
Pout, OUTPUT POWER (WATTS) PEP Pout, OUTPUT POWER (WATTS) PEP
Figure 12. Two--Tone Power Gain versus Figure 13. Third Order Intermodulation
Output Power Distortion versus Output Power

1. The distortion products are referenced to one of the two tones and the peak envelope power (PEP) is 6 dB above the power in a single tone.

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
6 Freescale Semiconductor
 TYPICAL CHARACTERISTICS
109

VDD = 50 Vdc
108 Pout = 300 W Avg.
ηD = 80%

MTTF (HOURS)
107

106

105

104
90 110 130 150 170 190 210 230 250
TJ, JUNCTION TEMPERATURE (°C)
MTTF calculator available at http://www.freescale.com/rf. Select
Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.

Figure 14. MTTF versus Junction Temperature — CW

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
Freescale Semiconductor 7
 Zsource
f = 230 MHz

f = 230 MHz
Zload

Zo = 5 Ω

VDD = 50 Vdc, IDQ = 100 mA, Pout = 300 W Peak

f Zsource Zload
MHz Ω Ω
230 0.65 + j2.79 1.64 + j2.85
Zsource = Test circuit impedance as measured from
gate to ground.

Zload = Test circuit impedance as measured from

drain to ground.

Input Device Output

Matching Under Matching
Network Test Network

Z Z
source load

Figure 15. Series Equivalent Source and Load Impedance

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
8 Freescale Semiconductor
 VDD = 50 Vdc, IDQ = 100 mA
f Zsource Zload
MHz Ω Ω
10 36.0 + j128 12.0 + j8.80
25 20.0 + j64.0 12.4 + j6.40
50 16.0 + j41.6 11.6 + j14.4
100 8.00 + j24.8 9.00 + j9.80
200 3.00 + j12.8 7.20 + j6.40
300 1.52 + j7.92 6.00 + j5.00
400 1.08 + j5.04 4.20 + j4.00
500 1.04 + j3.16 3.32 + j2.72
600 0.88 + j1.76 2.72 + j1.68
1. Simulated performance at 1 dB gain compression.
Zsource = Source impedance presented from gate to gate.
Zload = Load impedance presented from drain to drain.

Device
Source + Under -- Load
Test

-- +
Z Z
source load

Figure 16. Simulated Source and Load Impedances Optimized for IRL,
Output Power and Drain Efficiency — Push--Pull

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
Freescale Semiconductor 9
 PACKAGE DIMENSIONS

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
10 Freescale Semiconductor
 MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
Freescale Semiconductor 11
MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
12 Freescale Semiconductor
 MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
Freescale Semiconductor 13
 PRODUCT DOCUMENTATION AND SOFTWARE

Refer to the following documents to aid your design process.

Application Notes
• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
• Electromigration MTTF Calculator
• RF High Power Model
• .s2p File

For Software, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software &
Tools tab on the part’s Product Summary page to download the respective tool.

R5 TAPE AND REEL OPTION

NI--780--4 = R5 Suffix = 50 Units, 56 mm Tape Width, 13 inch Reel.

NI--780S--4 = R5 Suffix = 50 Units, 32 mm Tape Width, 13 inch Reel.

The R5 tape and reel option for MRFE6VP6300H and MRFE6VP6300HS parts will be available for 2 years after release of
MRFE6VP6300H and MRFE6VP6300HS. Freescale Semiconductor, Inc. reserves the right to limit the quantities that will be
delivered in the R5 tape and reel option. At the end of the 2 year period customers who have purchased these devices in the R5
tape and reel option will be offered MRFE6VP6300H and MRFE6VP6300HS in the R3 tape and reel option.

REVISION HISTORY

The following table summarizes revisions to this document.

Revision Date Description

0 Oct. 2010 • Initial Release of Data Sheet

1 July 2011 • Corrected pin 4 label from RFout/VGS to RFin/VGS, Fig. 1, Pin Connections, p. 1
• Changed Drain--Source voltage from --0.5, +125 to --0.5, +130 in Maximum Ratings table, p. 1
• Added Total Device Dissipation to Maximum Ratings table, p. 1
• Changed V(BR)DSS Min value from 125 to 130 Vdc, Table 4, Off Characteristics, p. 2
• Tightened VGS(th) Min limit from 1.5 to 1.7 Vdc and Max limit from 3.0 to 2.7 Vdc as a result of process
improvement, Table 4, On Characteristics, p. 2
• Tightened VGS(Q) Min limit from 1.7 to 2.0 Vdc and Max limit from 3.2 to 3.0 Vdc as a result of process
improvement, Table 4, On Characteristics, p. 2
• Added Load Mismatch table to Table 4. Electrical Characteristics, p. 2
• MTTF end temperature on graph changed to match maximum operating junction temperature, Fig. 14,
MTTF versus Junction Temperature, p. 7
• Added Fig. 16, Simulated Source and Load Impedances Optimized for IRL, Output Power and Drain
Efficiency — Push--Pull table, p. 9

MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device Data
14 Freescale Semiconductor
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MRFE6VP6300HR3 MRFE6VP6300HSR3
RF Device
Document Data MRFE6VP6300H
Number:
Rev. 1, 7/2011
Freescale Semiconductor 15