INPAQ

Global RF/Component Solutions

TVL ST23 04 AD0

Specification

Product Name Transient Voltage Suppressor

Series TVS Series
Part No TVL ST23 04 AD0
Package Size SOT23-6L
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TVL ST23 04 AD0 Engineering Specification

1. Scope

TVL ST23 04 AD0’s are TVS arrays designed to protect high-speed signal lines from
overvoltage hazard of Electrostatic Discharge (ESD), Electrical Fast Transients (EFT) and
Lightning. These interfaces can be used in USB2.0 power and data lines, notebook and
personal computers, monitors and flat panel displays, IEEE 1394 Firewire Ports, etc.

TVL ST23 04 AD0 incorporates a pair of rail-to-rail diodes with low capacitance for each
of four I/O channels. Additional Zener diode is employed to minimize the influence of supply
voltage. The ESD protection of TVS arrays meets the immunity standard of IEC 61000-4-2,
level 4 (±15kV air, ±8kV contact discharge).

2. Explanation of Part Number

TV L ST23 04 AD0
(1) (2) (3) (4) (5)

1. Product Type：TV=TVS Diode

2. Capacitance Code：L=Low Capacitance
3. Package Size Code
4. Channel Code：04=4 Channels
5. Specialized Specification Code

3. Circuit Diagram /Pin Configuration

I/O 4 VDD I/O 3

6 5 4

1 3 4 6

2 1 2 3
I/O 1 GND I/O 2

Circuit Diagram Pin Configuration

SOT23-6L (Top-view)

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 1 of 7

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4. Specifications
4.1. ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM RATINGS
PARAMETER PARAMET RATING UNITS
ER
Peak Pulse Current (tp =8/20 s) IPP 5.5 A
Operating Supply Voltage (VDD-GND) VDC 6 V
ESD per IEC 61000-4-2 (Air) VESD 15 kV
ESD per IEC 61000-4-2 (Contact) 8
o
Lead Soldering Temperature TSOL 260 (10 sec.) C
o
Operating Temperature TOP -55 to +85 C
o
Storage Temperature TSTO -55 to +150 C
DC Voltage at any I/O pin VIO (GND – 0.5) to (VDD + 0.5) V
4.2. ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
o
Reverse Stand-Off VRWM Pin 5 to pin 2, T=25 C 5 V
Voltage
Reverse Leakage ILeak VRWM = 5V, T=25 oC, Pin 5 to pin 2 2 μA
Current

Channel Leakage ICH_Leak VPin 5 = 5V, VPin 2 = 0V, T=25 oC 1 μA

Current
Reverse Breakdown VBV IBV = 1mA, T=25 oC 6 V
Voltage Pin 5 to Pin 2
Forward Voltage VF IF = 15mA, T=25 oC 0.8 1.2 V
Pin 2 to Pin 5
Clamping Voltage VCL IPP=5A, tp=8/20 s, T=25 oC 8 11 V
Any Channel pin to Ground
ESD Holding Voltage Vhold IEC 61000-4-2 +6kV, T=25 oC, Contact 14 V
mode, Any Channel pin to Ground.
Channel Input CIN Vpin5 = 5V, Vpin2 = 0V, VIN = 2.5V, f = 1.0 1.1 pF
o
Capacitance 1MHz, T=25 C, Any Channel pin to
Ground
Channel to Channel CCROSS Vpin5 = 5V, Vpin2 = 0V, VIN = 2.5V, f = 0.1 0.12 pF
o
Input Capacitance 1MHz, T=25 C , Between Channel pins
Variation of Channel △CIN Vpin5 = 5V, Vpin2 = 0V, VIN = 2.5V, f = 0.03 0.05 pF
o
Input Capacitance 1MHz, T=25 C , Channel_x pin to
Ground - Channel_y pin to Ground

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 2 of 7

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4.3. TYPICAL CHARACTERISTICS

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 3 of 7

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5. LAND LAYOUT

Dimensions
Index Millimeter Inches
A 0.60 0.024
B 1.10 0.043
C 0.95 0.037
D 2.50 0.098
E 1.40 0.055
F 3.60 0.141

Notes:This LAND LAYOUT is for reference purposes only. Please consult your manufacturing partners to
ensure your company’s PCB design guidelines are met.

6. Application information

The ESD protection scheme for system I/O connector is shown in the Fig. 1. In Fig. 1, the diodes D1
and D2 are general used to protect data line from ESD stress pulse. If the power-rail ESD clamping circuit
is not placed between VDD and GND rails, the positive pulse ESD current (IESD1) will pass through the
ESD current path1. Thus, the ESD clamping voltage VCL of data line can be described as follow:

VCL = Fwd voltage drop of D1 + supply voltage of VDD rail + L1 × d(IESD1)/dt + L2 × d(IESD1)/dt

Where L1 is the parasitic inductance of data line, and L2 is the parasitic inductance of VDD rail. An
ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4
contact discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30A in
1ns. Here d(IESD1)/dt can be approximated by ΔIESD1/Δt, or 30/(1x10-9). So just 10nH of total parasitic
inductance (L1 and L2 combined) will lead to over 300V increment in VCL! Besides, the ESD pulse current
which is directed into the VDD rail may potentially damage any components that are attached to that rail.
Moreover, it is common for the forward voltage drop of discrete diodes to exceed the damage threshold of
the protected IC. This is due to the relatively small junction area of typical discrete components. Of course,
the discrete diode is also possible to be destroyed due to its power dissipation capability is exceeded.

The TVL ST23 04 AD0 has an integrated power-rail ESD clamped circuit between VDD and GND
rails. It can successfully overcome previous disadvantages. During an ESD event, the positive ESD pulse
current (IESD2) will be directed through the integrated power-rail ESD clamped circuit to GND rail (ESD
current path2). The clamping voltage VCL on the data line is small and

protected IC will not be damaged because power-rail ESD clamped circuit offer a low impedance
path to discharge ESD pulse current.

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 4 of 7

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power-rail ESD TVLST2304AD0

clamp ing circuit
L 2
VDD rail
I ESD 2 IESD 1
D1
data line
+ L1 Protected
Vp
_ IC
VESD +
D2 V CL
_
GND rail

ESD current path 1 (I ESD1)

ESD current path 2 (I ESD2)

7. MARKING CODE
Marking Code: C96X

C96 = Device Code

S15X
C99XY
C96XY X = Date Code
Y=Control Code

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 5 of 7

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8. Mechanical Details

SOT23-6L PACKAGE DIAGRAMS PACKAGE DIMENSIONS

TOP VIEW

Milimeters
Symbol
MIN. MAX.
A 0.95 1.45
A1 0.01 0.15
A2 0.90 1.30
b 0.30 0.50
C 0.08 0.25
D 2.67 3.17
E 1.35 1.85
E1 2.55 3.05
e 0.95BSC
e1 1.70 2.10
L1 0.30 0.60
L 0.70REF
SIDE VIEW L2 0.25BSC
θ 0 8

END VIEW

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 6 of 7

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Notes:
z This dimension complies with JEDEC outline standard MO-178 Variation AB.
z Dimensioning and tolerancing per ASME Y14.5M-1994.
z All dimensions are in millimeters, and the dimensions in inches are for reference only.
z 1mm = 40 mils = 0.04 inches.

8.1. Taping Quantity:

3,000pcs/ Reel ( for 7” Reel)

TVL ST23 04 AD0 Engineer Specification Version: A8 Page 7 of 7

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