As5215 DS000104 1-00-1512180
As5215 DS000104 1-00-1512180
As5215 DS000104 1-00-1512180
is now
ams AG
The technical content of this austriamicrosystems datasheet is still valid.
Contact information:
Headquarters:
ams AG
Tobelbaderstrasse 30
8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
e-Mail: ams_sales@ams.com
AS5215
Programmable 360º Magnetic Angle Encoder with Buffered SINE &
COSINE Output Signals
1 General Description 2 Key Features
The AS5215 is a redundant, contactless rotary encoder sensor for Contactless angular position encoding
accurate angular measurement over a full turn of 360º and over an High precision analog output
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extended ambient temperature range of -40ºC to +150ºC.
Buffered Sine and Cosine signals
Based on an integrated Hall element array, the angular position of a
simple two-pole magnet is translated into analog output voltages. SSI Interface
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The angle information is provided by means of buffered sine and Low power mode
cosine voltages. This approach gives maximum flexibility in system
design, as it can be directly integrated into existing architectures and Two programmable output modes: Differential or Single ended
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optimized for various applications in terms of speed and accuracy. Wide magnetic field input range: 20 – 80 mT
With two independent dies in one package, the device offers true Wide temperature range: -40ºC to +150ºC
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redundancy. Usually the bottom die, which is exposed to slightly less
Fully automotive qualified to AEC-Q100, grade 0
magnetic field is employed for plausibility check.
An SSI Interface is implemented for signal path configuration as well Thin punched 32-pin QFN (7x7mm) package
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as a one time programmable register block (OTP), which allows the
customer to adjust the signal path gain to adjust for different 3 Applications
mechanical constraints and magnetic field.
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The AS5215 is ideal for Electronic Power Steering systems and
nt general purpose for automotive or industrial applications in
microcontroller-based systems.
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Digital Part
CS POWER VDD
DCLK SSI Interface MANAGEMENT
VSS
DIO
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BUFFER Stage
SINP/SINN
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SINN/SINP/CM_SIN
BUFFER Stage COSP/COSN
Hall Array
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&
Frontend
COSN/COSP/CM_COS
Amplifier
Contents
1 General Description .................................................................................................................................................................. 1
2 Key Features............................................................................................................................................................................. 1
3 Applications............................................................................................................................................................................... 1
4 Pin Assignments ....................................................................................................................................................................... 3
4.1 Pin Descriptions.................................................................................................................................................................................... 3
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5 Absolute Maximum Ratings ...................................................................................................................................................... 5
6 Electrical Characteristics........................................................................................................................................................... 6
6.1 Timing Characteristics ..........................................................................................................................................................................
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7
7 Detailed Description.................................................................................................................................................................. 8
7.1 Magnet Diameter and Vertical Distance ............................................................................................................................................... 8
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7.1.1 The Linear Range ........................................................................................................................................................................ 8
7.1.2 Magnet Thickness...................................................................................................................................................................... 11
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7.1.3 Axial Distance (Airgap) .............................................................................................................................................................. 12
7.1.4 Angle Error vs. Radial and Axial Misalignment.......................................................................................................................... 12
7.1.5 Mounting the Magnet ................................................................................................................................................................. 12
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7.1.6
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Summary ................................................................................................................................................................................... 14
8 Application Information ........................................................................................................................................................... 15
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8.1 Sleep Mode ........................................................................................................................................................................................ 15
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8.2 SSI Interface....................................................................................................................................................................................... 15
8.3 Device Communication / Programming .............................................................................................................................................. 16
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4 Pin Assignments
Figure 2. Pin Assignments (Top View)
DCLK_2
DCLK_1
VDD_2
VDD_1
CS_2
CS_1
NC
NC
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32 31 30 29 28 27 26 25
DIO_1 1 24 NC
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DIO_2 2 23 NC
TC_1 3 22 NC
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TC_2 4 21 NC
AS5215
A_TST_1 5 20 NC
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A_TST_2 6 19 NC
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PROG_1 te G 18 COSN_2 / COSP_2 / CM_COS_2
PROG_2 8 17 COSP_2 / COSN_2
9 10 11 12 13 14 15 16
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SINP_1 / SINN_1
VSS_1
VSS_2
SINP_2 / SINN_2
COSP_1 / COSN_1
COSN_1 / COSP_1 / CM_COS_1
SINN_1 / SINP_1 / CM_SIN_1
A_TST_1 5
Analog test pin
A_TST_2 6
PROG_1 7
OTP Programming Pad
PROG_2 8
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SINP_2 / SINN_2 13 Switchable buffered analog output
SINN_2 / SINP_2 / CM_SIN_2 14 Switchable buffered analog or common mode output
COSP_1 / COSN_1 15 Switchable buffered analog output
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COSN_1 / COSP_1 / CM_COS_1 16 Switchable buffered analog or common mode output
COSP_2 / COSN_2 17 Switchable buffered analog output
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COSN_2 / COSP_2 / CM_COS_2 18 Switchable buffered analog or common mode output
NC 19
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NC 20
NC 21
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NC
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22
------
NC 23
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NC
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24
NC 25
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NC 26
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VDD_1 27
Digital + analog supply
VDD_2 28
DCLK_1 29
Clock input for digital interface
DCLK_2 30
CS_1 31
Clock input for digital interface
CS_2 32
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Supply voltage (VDD) -0.3 7 V
Input pin voltage (V_in) -0.3 VDD+0.3 V
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Input current (latchup immunity), I_scr -100 100 mA Norm: EIA/JESD78 Class II Level A
Electrostatic Discharge
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Electrostatic discharge (ESD) ±2 kV Norm: JESD22-A114E
Continous Power Dissipation
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Total power dissipation (Ptot) 275 mW
Package thermal resistance (Θ_JA) 27 ºC/W Velocity =0; Multi Layer PCB; Jedec Standard Testboard
Temperature Ranges and Storage Conditions
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Storage temperature (T_strg)
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Norm: IPC/JEDEC J-STD-020.
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The reflow peak soldering temperature (body temperature)
Package body temperature (T_body)
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specified is in accordance with IPC/JEDEC J-STD-020
“Moisture/Reflow Sensitivity Classification for Non-
Hermetic Solid State Surface Mount Devices”.
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Humidity non-condensing 5 85 %
Moisture Sensitive Level (MSL) 3 Represents a maximum floor time of 168h
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6 Electrical Characteristics
Unless otherwise noted all in this specification defined tolerances of parameters are assured over the whole operation conditions range and also
over lifetime.
Table 3. Operating Conditions
Symbol Parameter Condition Min Typ Max Unit
VDD Positive Supply Voltage 4.5 5.5 V
VSS Negative Supply Voltage 0.0 0.0 V
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T_amb Ambient temperature -40 150 ºC
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Table 4. DC/AC Characteristics for Digital Inputs and Outputs
Symbol Parameter Condition Min Typ Max Unit
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CMOS Input
V_IH High level Input voltage 0.7 * VDD V
V_IL Low level Input Voltage 0.3 * VDD V
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I_LEAK Input Leakage Current 1 µA
CMOS Output
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V_OH
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High level Output voltage 4 mA VDD - 0.5 V
V_OL Low level Output Voltage 4 mA VSS + 0.4 V
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C_L Capacitive Load 35 pF
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t_slew Slew Rate 30 ns
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THD Total Harmonic Distortion 0.2 %
SR Slew Rate 1 V/µs
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CLOAD Capacitive Load 1000 pF
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Table 7. Timing Characteristics
Symbol Parameter Condition Min Typ Max Unit
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t1_3 Chip select to positive edge of DCLK 30 - ns
t2_3 Chip select to drive bus externally 0 - ns
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t3
Setup time command bit
te G 30 - ns
Data valid to positive edge of DCLK
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Hold time command bit
t4 15 - ns
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Data valid after positive edge of DCLK
Float time DCLK/
t5 - ns
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Positive edge of DCLK for last command bit to bus float 2+0
Bus driving time
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DCLK/
t6 Positive edge of DCLK for last command bit to bus - ns
2+0
drive
Data valid time DCLK/ DCLK/
t7 ns
Positive edge of DCLK to bus valid 2+0 2+30
Hold time data bit DCLK/
t8 2+0 - ns
Data valid after positive edge of DCLK
Hold time chip select DCLK/
t9_3 - ns
Positive edge DCLK to negative edge of chip select 2+0
Bus floating time
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t10_3 - 30 ns
Negative edge of chip select to float bus
Setup time data bit at write access
t11 30 - ns
Data valid to positive edge of DCLK
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Remark: The digital interface will be reset during the low phase of the CS signal.
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7 Detailed Description
The AS5215 is a redundant rotary encoder sensor front end. Based on an integrated Hall element array, the angular position of a simple two-pole
magnet is translated into analog output voltages. The angle information is provided by means of sine and cosine voltages. This approach gives
maximum flexibility in system design, as it can be directly integrated into existing architectures and optimized for various applications in terms of
speed and accuracy.
With two independent dies in one package, the device offers true redundancy. Usually the bottom die, which is exposed to slightly less magnetic
field is employed for plausibility check.
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An SSI (SPI standard) protocol is implemented for internal test access to the different circuit blocks and for signal path configuration.
A One Time Programmable register block (OTP) allows the customer to adjust the signal path gain to adjust for different mechanical constraints
and magnetic field strengths. Furthermore, for internal use, the test mode can be enabled and the system oscillator is trimmable, DC offset of the
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output signal can be set to either 1.5V or 2.5V. A unique chip ID is stored to ensure traceability.
For operating point control, a band gap circuit is implemented together with a central bias block to distribute all reference bias currents for the
analog signal conditioning. The digital signal part is based on a 2MHz system, CLK derived via. divider from a 4MHz system oscillator.
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Figure 3. Typical Arrangement of AS5215 and Magnet
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Application Notes
The Hall elements used in the AS5000-series sensor ICs are sensitive to the magnetic field component Bz, which is the magnetic field vertical to
the chip surface. Figure 4 shows a 3-dimensional graph of the Bz field across the surface of a 6mm diameter, cylindrical NdFeB N35H magnet at
an axial distance of 1mm between magnet and IC.
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The highest magnetic field occurs at the north and south poles, which are located close to the edge of the magnet, at ~2.8mm radius (see Figure
5). Following the poles towards the center of the magnet, the Bz field decreases very linearly within a radius of ~1.6mm. This linear range is the
operating range of the magnet with respect to the Hall sensor array on the chip. For best performance, the Hall elements should always be within
this linear range.
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area of X- Y-misalignment from cen-
ter: ±0.5mm
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Bz [mT]
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Y -displacement [mm]
X -displacement [mm]
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As shown in Figure 5 (grey zone), the Hall elements are located on the chip at a circle with a radius of 1mm. Since the difference between two
opposite Hall sensors is measured, there will be no difference in signal amplitude when the magnet is perfectly centered or if the magnet is
misaligned in any direction as long as all Hall elements stay within the linear range.
For the 6mm magnet (shown in Figure 5), the linear range has a radius of 1.6mm, hence this magnet allows a radial misalignment of 0.5mm
(1.6mm linear range radius; 1mm Hall array radius). Consequently, the larger the linear range, the more radial misalignment can be tolerated. By
contrast, the slope of the linear range decreases with increasing magnet diameter, as the poles are further apart. A smaller slope results in a
smaller differential signal, which means that the magnet must be moved closer to the IC (smaller airgap) or the amplification gain must be
increased, which leads to a poorer signal-to-noise ratio. More noise results in more jitter at the angle output. A good compromise is a magnet
diameter in the range of 5…8mm.
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+ wider linear range =
good signal / noise ratio,
larger horizontal misalignment area
larger airgaps
- weaker differential signal =
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- shorter linear range =
poorer signal / noise ratio,
smaller horizontal misalignment area
smaller airgaps
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Figure 5. Vertical Magnetic Field Across the Center of a Cylindrical Magnet
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Bz [mT]
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X -displacement [mm]
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Bz amplitude vs. magnet thickness
of a cylindrical diametric magnet with 6mm diameter
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160%
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140%
Relative peak amplitude [%]
120%
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100%
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80%
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60%
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h/d = 0.42
Rel. amplitude = 100%
20%
0%
0,0 0,2 0,4 0,6 0,8 1,0 1,2 1,4 1,6 1,8
thickness to diameter [h/d] ratio
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As the graph in Figure 6 shows, the amplitude drops significantly at h/d ratios below this value and remains relatively flat at ratios above 1.3.
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Therefore, the recommended thickness of 2.5mm (at 6mm diameter) should be considered as the low limit with regards to magnet thickness.
It is possible to get 40% or more signal amplitude by using thicker magnets. However, the gain in signal amplitude becomes less significant for h/
d ratios >~1.3. Therefore, the recommended magnet thickness for a 6mm diameter magnet is between 2.5 and ~8 mm.
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vertical
field
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0 360º
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The recommended magnetic field, measured at the chip surface on a radius equal to the Hall sensor array radius (typ 1mm) should be within a
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certain range. This range lies between 45 and 75mT or between 20 and 80mT, depending on the encoder product.
Linear position sensors are more sensitive as they use weaker magnets. The allowed magnetic range lies typically between 5 and 60mT.
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7.1.4 Angle Error vs. Radial and Axial Misalignment
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The angle error is the deviation of the actual angle vs. the angle measured by the encoder. There are several factors in the chip itself that
contribute to this error, mainly offset and gain matching of the amplifiers in the analog signal path. On the other hand, there is the nonlinearity of
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the signals coming from the Hall sensors, caused by misalignment of the magnet and imperfections in the magnetic material.
Ideally, the Hall sensor signals should be sinusoidal, with equal peak amplitude of each signal. This can be maintained, as long as all Hall
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elements are within the linear range of the magnetic field Bz (see Figure 5).
Figure 8 shows the ideal case with the magnet in air. No magnetic materials are anywhere nearby.
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If the magnet is mounted in non-magnetic material, such as plastic or diamagnetic material, such as copper, the magnetic field distribution is not
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disturbed. Even paramagnetic material, such as aluminium may be used. The magnet may be mounted directly in the shaft (see Figure 9).
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Note: Stainless steel may also be used, but some grades are magnetic. Therefore, steel with magnetic grades should be avoided.
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If the magnet is mounted in a ferromagnetic material, such as iron, most of the field lines are attracted by the iron and flow inside the metal shaft
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Figure 11. Magnetic Field Lines with Spacer Between Magnet and Iron Shaft
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If the magnet has to be mounted inside a magnetic shaft, a possible solution is to place a non-magnetic spacer between shaft and magnet, as
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shown in Figure 11. While the magnetic field is rather distorted towards the shaft, there are still adequate field lines available towards the sensor
IC. The distortion remains reasonably low.
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7.1.6 Summary
Small diameter magnets (<6mm Ø) have a shorter linear range and allow less lateral misalignment. The steeper slope allows larger axial
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distances.
Large diameter magnets (>6 mm Ø) have a wider linear range and allow a wider lateral misalignment. The flatter slope requires shorter axial
distances.
The linear range decreases with airgap; Best performance is achieved at shorter airgaps.
The ideal vertical distance range can be determined by using magnetic range indicators provided by the encoder ICs. These indicators are
named MagInc, MagDec, MagRngn, or similar, depending on product.
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8 Application Information
8.1 Sleep Mode
The target is to provide the possibility to reduce the total current consumption. No output signal will be provided when the IC is in sleep mode.
Enabling or disabling sleep mode is done by sending the SLEEP or WAKEUP commands via. the SSI interface. Analog blocks are powered
down with respect to fast wake up time.
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The setup for the device is handled by the digital interface. Each communication starts with the rising edge of the chip select signal. The
synchronization between the internal free running analog clock oscillator and the external used digital clock source for the digital interface is
done in a way that the digital clock frequency can vary in a wide range.
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Table 8. SSI Interface Pin Description
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Port Symbol Function
Indicates the start of a new access cycle to the device
Chip select CS
CS = LO → reset of the digital interface
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DCLK DCLK Clock source for the communication over the digital interface
Command and data information over one single line
Bidirectional data input output DIO
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Clock frequency at easy zap read be derived from a 10MHz oscillator source.
f_EZ_RW no limit 5 6 kHz
write access
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Normal read operation mode cmd<4:0> = <00xxx> → 1 DCLK per data bit
Extended read operation mode cmd<4:0> = <01xxx> → 4 DCLK per data bit
Normal write operation mode cmd<4:0> = <10xxx> → 1 DCLK per data bit
Extended write operation mode cmd<4:0> = <11xxx> → 4 DCLK per data bit
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Name Functionality
go2sleep Enter/leave low power mode (no output signals)
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gen_rst Generates global reset
analog_sig Switches the channels to the test bus after the PGA
Disable and bypass output buffer for testing purpose
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OB_bypassed
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Factory Settings User Settings
# command bin mode
<43: <22:2 <19:1 <17:1
<45:44> <25:23> <13> <12> <11> <10> <9> <8:7> <6> <5:0>
26> 0> 8> 4>
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31 WRITE OTP 11111 xt write
te G otp test ID 10µbiastrim vref osc
lock_O
TP
n.c.
invert_
channel
cm_sin cm_cos gain
dc_
offset
hall_
bias
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lock_O invert_ dc_ hall_
25 PROG_OTP 11001 xt write otp test ID 10µbiastrim vref osc TP n.c. channel cm_sin cm_cos gain offset bias
Remark:
1. Send EN PROG (command 16) in normal mode before accessing the OTP in extended mode.
2. OTP assignment will be defined/updated.
Name Functionality
Otp_test Dummy fuse bit used in production test
ID Part identification
n.c. Not connected
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cm_sin Common mode voltage output enabled at SINN / CM pin (0...differential, 1...common)
cm_cos Common mode voltage output enabled at COSN / CM pin (0...differential, 1...common)
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Magnetic Sensitivity vs. OTP Hall Current & PGA Gain Setting
600
550
500
Relative Sensitivity in %
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450
400
M_PGA_00
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350 M_PGA_01
M_PGA_10
300
M_PGA_11
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250
200
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150
100
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0 10
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Magnetic Sensitivity vs. OTP Hall Current & PGA Gain Setting
70
60
50
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Sensitivity [mV/mT]
M_PGA_00
40
M_PGA_01
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M_PGA_10
30
M_PGA_11
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20
10
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0
0 10 20 30 40 50 60
CMD_PHASE DATA_PHASE
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DCLK
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t1_3
CS
t2_3 t5
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DIO CMD4 CMD3 CMD2 CMD1 CMD0 CMD
t3 t7 t10_3
t6 t8
t4
DIO D15 D14 D13 D0 READ
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t11
t13_3
t12
DIO D15 D14 D13 D0 WRITE
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In the extended mode, the digital interface needs four clocks for one data bit. During this time, the device is able to handle internal signals for
special access (e.g. the easy zap interface).
CMD_PHASE DATA_PHASE
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DCLK
t1_3 t9_3
CS
t7
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t2_3 t5
DIO CMD4 CMD3 CMD2 CMD1 CMD0 CMD
t3 t6 t8 t10_3
DIO t4
READ
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D45 D44 D0
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CMD_PHASE DATA_PHASE_EXTENDED
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DCLK
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CS
DIO
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CMD4 CMD3 CMD2 CMD1 CMD0
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PROG
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perform analog measurements at PROG
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+5V
VDD
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100k
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SINP_1/SINN_1
D A
SINN_1/SINP_1/CM_SIN_1
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SINP_2 / SINN_2
AS5215
Micro
D A
AS5130
SINN_2/SINP_2/CM_SIN_2
Controller 100n
COSP_1/COSN_1
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D A
COSN_1/COSP_1/CM_COS_1
COSP_2/COSN_2
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D A
COSN_2/COSP_2/CM_COS_2
VSS
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VSS
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Notes:
1. We recommend to use a 100k pull-up resistance.
2. Default conditions for unused pins are: DCLK_1/2, CS_1/2, DIO_1/2, TC_1/2, A_TST_1/2, TBO_1/2, TB1_1/2, TB2_1/2,
TB3_1/2 connect to VSS
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The AS5215 provides analog Sine and Cosine outputs (SINP, COSP) of the Hall array front-end for test purposes. These outputs allow the user
to perform the angle calculation by an external ADC + µC, e.g. to compute the angle with a high resolution. The output driver capability is 1mA.
The signal lines should be kept as short as possible, longer lines should be shielded in order to achieve best noise performance.
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Through the programming of one bit, you have the possibility to choose between the analog Sine and Cosine outputs (SINP, COSP) and their
inverted signals (SINN, COSN). Furthermore, by programming the bits <9:10> you can enable the common mode output signals of SIN and
COS.
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+5V
VDD
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VDD VDD
Output CS
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AS5215
Output DCLK
AS5130
100n
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I/O DIO
Micro
Controller 8.0 - 8.5V
PROG
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VSS + 10µF 100n VSS
-
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VSS
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maximum
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L<50nH VDD
Vzapp Vprog
PROG
C1 C2 GND
PROM Cell
100nF 10µF
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For programming of the OTP, an additional voltage has to be applied to the pin PROG. It has to be buffered by a fast 100nF capacitor (ceramic)
and a 10µF capacitor. The information to be programmed is set by command 25. The OTP bits 16 until 45 are used for AMS factory trimming and
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cannot be overwritten.
Symbol Parameter Min Max Unit Note
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T_zapp Temperature 0 85 ºC
f_clk CLK Frequency 100 kHz At pin DCLK
After programming, the programmed OTP bits must be verified in two ways:
By Digital Verification: This is simply done by sending a READ OTP command (#15). The structure of this register is the same as for the OTP
PROG or OTP WRITE commands.
By Analog Verification: By switching into Extended Mode and sending an ANALOG OTP READ command (#9), pin PROG becomes an output,
sending an analog voltage with each clock representing a sequence of the bits in the OTP register (starting with D45). A voltage of <500mV
indicates a correctly programmed bit (“1”) while a voltage level between 2V and 3.5V indicates a correctly unprogrammed bit (“0”). Any voltage
level in between indicates incorrect programming.
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+5V
VDD
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VDD VDD
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Output CS
AS5215
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Output DCLK
AS5130
100n
I/O DIO
Micro
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PROG
VSS VSS
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V
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VSS
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18085-002
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YYWWVZZ Symbol Min Nom Max
AS5215OM A 0.80 0.90 1.00
B2P0 A1 0 0.02 0.05
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A2 - 0.65 1.00
A3 0.20 REF
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L 0.50 0.60 0.75
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b 0.23 0.28 0.35
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D 7.00 BSC
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e 0.65 BSC
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D1 6.75 BSC
E1 6.75 BSC
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N 32
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Notes:
1. Dimensions and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters. Angles are in degrees.
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3. Bilateral coplanarity zone applies to the exposed pad as well as the terminal.
4. Radius on terminal is optional.
5. N is the total number of terminals.
Marking: YYWWVZZ.
YY WW V ZZ
Last two digits of the manufacturing year Manufacturing week Plant identifier Assembly traceability code
Revision History
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Updated the following parameters in Table 6:
- Values and conditions updated for
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1. Propagation delay
July 31, 2009
2. Amplitude ratio tracking accuracy over temperature
1.3
3. DC Offset Drift
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- Deleted the ‘Output Offset’ parameter from the table.
Updated following bits related information on page 16 - invert_channel,
Aug 24, 2009
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cm_sin, cm_cos, gain, dc_offset, Hall_b
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1.4 Aug 26, 2009 Inserted Figure 12 and updated Applications and Figure 17.
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1.5 Sept 01, 2009 Inserted Figure 13, Added a note in Revision History.
1.6
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Sept 02, 2009 Deleted ‘Displacement’ parameter from Table 5.
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Hall Array Radius value updated from 1.1mm to 1mm
1.7 Nov 26, 2009
Updated Figure 13
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Dec 11, 2009 Updated values for ‘Magnetic Sensitivity’ parameter in Table 6.
1.8
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1.9 Feb 10, 2010 Updated values for ‘Power up time’ parameter in Table 6.
Mar 19, 2010 Added ‘Current Consumption’ parameter in Table 6.
Updated Package Drawings and Markings (page 23) and Ordering
1.10 Sep 06, 2010
Information (page 25).
Updated Absolute Maximum Ratings (page 5), Table 4, OTP
1.11 Jun 27, 2011 mub Programming and Verification (page 21), Package Drawings and
Markings (page 23).
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10 Ordering Information
The devices are available as the standard products shown in Table 13.
Table 13. Ordering Information
Ordering Code Description Delivery Form Package
AS5215OM-HMFP, -HMFM Sine and cosine analog output magnetic rotary encoder Tape & Reel 32-pin QFN (7x7mm)
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Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
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Technical Support is available at http://www.austriamicrosystems.com/Technical-Support
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For further information and requests, please contact us mailto: sales@austriamicrosystems.com
or find your local distributor at http://www.austriamicrosystems.com/distributor
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Copyrights
Copyright © 1997-2011, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®.
All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
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Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
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the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
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unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
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The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not
be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use,
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interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
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Contact Information
Headquarters
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austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
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Authorized Distributor
ams:
AS5215 AB AS5215 DB AS5215OM-HMFP-500 AS5215OM-HMFP AS5215-QF_EK_DB AS5215-QF_EK_AB