LSP5526

2A 23V Synchronous Buck Converter

General Description

The DIODES™ LSP5526 is a monolithic synchronous buck regulator. The device integrates 95mΩ MOSFETS
that provide 2A continuous load current over a wide operating input voltage of 4.5V to 23V. Current mode
control provides fast transient response and cycle-by-cycle current limit. An adjustable soft-start prevents
inrush current at turn on.

Features

 2A Output Current
 Wide 4.5V to 23V Operating Input Range
 Integrated Power MOSFET Switches
 Output Adjustable from 0.925V to 18V
 Up to 96% Efficiency
 Programmable Soft-Start
 Stable with Low ESR Ceramic Output Capacitors
 Fixed 340KHZ Frequency
 Cycle by Cycle Over Current Protection
 Input Under Voltage Lockout
 Package: SOP-8L
 Totally Lead-free & Fully RoHS Compliant (Notes 1 & 2)
 Halogen and Antimony Free. “Green” Device (Note 3)

Applications

 Distributed power systems

 Networking systems
 FPGA, DSP, ASIC power supplies
 Green electronics / appliances
 Notebook computers

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3)
compliant.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and
Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine
(<1500ppm total Br + Cl) and <1000ppm antimony compounds.

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 LSP5526

Block Diagram

CURRENT
OVP SENSE 2 VIN

1.1V RAMP AMPLIFIER

5V
OSCILLATOR
FB 5
340/120KHz CLK
1 BS
0.3V
S Q
R Q 3 SW
SS 8 CURRENT
ERROR
0.925V AMPLIFIER COMPARATOR
6uA

COMP 6
4 GND
EN 7 EN OK
1.2V OVP
IN<4.10V
LOCKOUT
2.5V
COMPARATOR
IN

INTERNAL
REGULATORS
1.5V SHUTDOWN
COMPARATOR

Ordering Information

Packing
Part Number Package Package Code
Qty. Carrier
LSP5526-S8A SOP-8L S8 2,500pcs Tape & Reel

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 LSP5526

Pin Assignment

SOP-8L
(TOP View)

BS 1 8 SS

VIN 2 7 EN

SW 3 6 COMP

GND 4 5 FB

Pin Descriptions

Pin Name Name Pin Description

Bootstrap. This pin acts as the positive rail for the high-side switch’s gate driver.
1 BS
Connect a 0.01uF capacitor between BS and SW.

Input Supply. Bypass this pin to GND with a low ESR capacitor. See Input
2 VIN
Capacitor in the Application Information section.

3 SW Switch Output. Connect this pin to the switching end of the inductor.

4 GND Ground.

Feedback Input. The voltage at this pin is regulated to 0.925V. Connect to the
5 FB
resistor divider between output and ground to set output voltage.

Compensation Pin. See Stability Compensation in the Application Information

6 COMP
section.

Enable Input. When higher than 2.7V, this pin turns the IC on. When lower than
1.1V, this pin turns the IC off. Output voltage is discharged when the IC is off.
7 EN
This pin should not be left open. Recommend to put a 200KΩ pull-up resistor to
Vin for startup.

Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor

8 SS from SS to GND to set the soft-start period. A 0.1uF capacitor sets the soft-start
period to 15ms. To disable the soft-start feature, leave SS unconnected.

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 LSP5526

Absolute Maximum Ratings(at TA=25°C) (Note 4)

Note: Operate over the “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to such conditions for
extended time may still affect the reliability of the device.

Characteristics Value Unit

Input Supply Voltage -0.3 to 25 V

SW Voltage -0.3 to VIN + 0.3 V

BS Voltage VSW – 0.3 to VSW + 6 V

EN -0.3 to 8 V

FB, COMP Voltage -0.3 to 5 V

Continuous SW Current Internally limited A

Maximum Junction Temperature 150 °C

Storage Temperature Range -65 to 150 °C

SOP-8L Thermal Resistance (Junction to Case) 60 °C/W

SOP-8L Thermal Resistance (Junction to Ambient) 150 °C/W

SOP-8L Power dissipation 810 mW

Please refer the MSL label on the IC package

Moisture Sensitivity (MSL)
bag/carton for detail

Note 4: Ratings apply to ambient temperature at 25°C.

Recommended Operating Conditions

Characteristics Min Max Unit

Input Supply Voltage 4.5 23 V

Operating Junction Temperature -20 +125 °C

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 LSP5526

Electrical Characteristics

(TA=25°C, unless otherwise specified)

Characteristics Symbol Conditions Min Typ Max Unit

Feedback Voltage VFB 4.5V ≤VIN ≤23V 0.900 0.925 0.950 V

Feedback Overvoltage Threshold — — — 1.1 — V

High-Side Switch-On Resistance* — — — 95 — mΩ

Low-Side Switch-On Resistance* — — — 95 — mΩ

High-Side Switch Leakage — VEN = 0V, VSW = 0V — — 10 uA

Upper Switch Current Limit — Minimum Duty Cycle 2.7 3.5 — A

COMP to Current
GCOMP — — 3.3 — A/V
Limit Transconductance

Error Amplifier Transconductance GEA ΔICOMP = ±10uA — 920 — uA/V

Error Amplifier DC Gain* AVEA — — 480 — V/V

Switching Frequency fSW — — 340 — KHz

Short Circuit Switching Frequency — VFB = 0 — 120 — KHz

Maximum Duty Cycle DMAX VFB = 0.8V — 92 — %

Minimum On Time* — — — 220 — nS

EN Shutdown Threshold Voltage — VEN Rising 1.1 1.4 2 V

EN Shutdown Threshold Voltage

— — — 180 — mV
Hysteresis

EN Lockout Threshold Voltage — — 2.2 2.5 2.7 V

EN Lockout Hysteresis — — — 130 — mV

Supply Current in Shutdown — VEN = 0 — 0.3 3.0 uA

IC Supply Current in Operation — VEN = 3V, VFB = 1.0V — 1.3 1.5 mA

Input UVLO Threshold Rising UVLO VEN Rising 3.80 4.05 4.40 V

Input UVLO Threshold Hysteresis — — — 100 — mV

Soft-start Current — VSS = 0V — 6 — uA

Soft-start Period — CSS = 0.1uF — 15 — mS

Thermal Shutdown Temperature* — Hysteresis = 25°C — 160 — °C

Note : * Guaranteed by design.

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 LSP5526

Application Circuit

LSP5526 Circuit, 5V/2A output

LSP5526 Circuit, 3.3V/2A output

Note: C2 is required for separate EN signal.

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 LSP5526

Output Voltage Setting

VOUT

R1
FB

R2

Figure1. Output Voltage Setting

Figure 1 shows the connections for setting the output voltage. Select the proper ratio of the two feedback
resistors R1 and R2 based on the output voltage. Typically, use R2 ≈ 10KΩ and determine R1 from the
following equation:
Table1－ Recommended Resistance Values

(1) VOUT R1 R2
1.0V 1.0 KΩ 12 KΩ
1.2V 3.0 KΩ 10 KΩ
1.8V 9.53 KΩ 10 KΩ
2.5V 16.9 KΩ 10 KΩ
3.3V 26.1 KΩ 10 KΩ
5V 44.2 KΩ 10 KΩ
12V 121 KΩ 10 KΩ
Inductor Selection
The inductor maintains a continuous current to the output load. This inductor current has a ripple that is
dependent on the inductance value: higher inductance reduces the peak-to-peak ripple current. The trade off
for high inductance value is the increase in inductor core size and series resistance, and the reduction in
current handling capability. In general, select an inductance value L based on the ripple current requirement:
V OUT  ( VIN  V OUT )
L (2)
VIN f SW I OUTMAX K RIPPLE

where VIN is the input voltage, VOUT is the output voltage, fSW is the switching frequency, IOUTMAX is the
maximum output current, and KRIPPLE is the ripple factor. Typically, choose KRIPPLE = 30% to correspond
to the peak-to-peak ripple current being 30% of the maximum output current.

With this inductor value, the peak inductor current is IOUT • (1 + KRIPPLE / 2). Make sure that this peak
inductor current is less than the upper switch current limit. Finally, select the inductor core size so that it does
not saturate at the current limit. Typical inductor values for various output voltages are shown in Table 2.

VOUT 1.0V 1.2V 1.5V 1.8V 2.5V 3.3V 5V 9V

L 4.7uH 4.7uH 10uH 10uH 10uH 10uH 10uH 33uH
Table 2. Typical Inductor Values

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 LSP5526

Input Capacitor
The input capacitor needs to be carefully selected to maintain sufficiently low ripple at the supply input of the
converter. A low ESR capacitor is highly recommended. Since large current flows in and out of this capacitor
during switching, its ESR also affects efficiency.

The input capacitance needs to be higher than 10uF. The best choice is the ceramic type; however, low ESR
tantalum or electrolytic types may also be used provided that the RMS ripple current rating is higher than 50%
of the output current. The input capacitor should be placed close to the VIN and GND pins of the IC, with the
shortest traces possible. In the case of tantalum or electrolytic types, they can be further away if a small parallel
0.1uF ceramic capacitor is placed right next to the IC.

Output Capacitor
The output capacitor also needs to have low ESR to keep low output voltage ripple. In the case of ceramic
output capacitors, RESR is very small and does not contribute to the ripple. Therefore, a lower capacitance
value can be used for ceramic capacitors. In the case of tantalum or electrolytic capacitors, the ripple is
dominated by RESR multiplied by the ripple current. In that case, the output capacitor is chosen to have
sufficiently low ESR.

For ceramic output capacitors, typically choose a capacitance of about 22uF. For tantalum or electrolytic
capacitors, choose a capacitor with less than 50mΩ ESR.

Optional Schottky Diode

During the transition between high-side switch and low-side switch, the body diode of the low side power
MOSFET conducts the inductor current. The forward voltage of this body diode is high. An optional Schottky
diode may be paralleled between the SW pin and GND pin to improve overall efficiency. Table 3 lists example
Schottky diodes and their Manufacturers.

Table 3－Diode Selection Guide

Voltage/Current
Part Number Vendor
Rating
B130 30V, 1A Diodes Incorporated
SK13 30V, 1A Diodes Incorporated

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 LSP5526

Stability Compensation

COMP
CCOMP 1

RCOMP
CCOMP2

CCOMP2 is needed only for high ESR output capacitor

Figure 2. Stability Compensation

The feedback loop of the IC is stabilized by the components at the COMP pin, as shown in Figure 2. The DC
loop gain of the system is determined by the following equation:
0.925V
AVDC  AVEA GCOMP (4)
I OUT
The dominant pole P1 is due to CCOMP1:
GEA
f P1  (5)
2AVEA CCOMP1
The second pole P2 is the output pole:
I OUT
f P2  (6)
2VOUT COUT
The first zero Z1 is due to RCOMP and CCOMP1:
1
f Z1  (7)
2RCOMPCCOMP1

And finally, the third pole is due to RCOMP and CCOMP2 (if CCOMP2 is used):
1
fP 3  (8)
2π R COMP C COMP 2

The following steps should be used to compensate the IC:

STEP1. Set the crossover frequency at 1/10 of the switching frequency via R COMP:

2VOUT COUT f SW
RCOMP  (9)
10G EA GCOMP  0.925V
But limit RCOMP to 10KΩ maximum.

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 LSP5526

Stability Compensation (Continued)

STEP2. Set the zero fZ1 at 1/4 of the crossover frequency. If R COMP is less than 10KΩ, the equation for
CCOMP is:

0.637
CCOMP1  ( F ) (10)
RCOMP  fc

STEP3. If the output capacitor’s ESR is high enough to cause a zero at lower than 4 times the crossover
frequency, an additional compensation capacitor CCOMP2 is required. The condition for using C COMP2 is:

RESRCOUT
  COUT  RESR  fs  1 (11)

And the proper value for CCOMP2 is:

C OUT R ESRCOUT
C COMP 2  (12)
R COMP

A reference table as follows:

Table 4 Component Selection Guide for Stability Compensation

Vin Range Vout Cout Rcomp (R3) Ccomp (C4) Ccomp2 (C5) Inductor
(V) (V) (kΩ) (nF) (pF) (uH)
5 – 12 1.0 3.3 5.6 none 4.7
5 - 15 1.2 3.9 4.7 none 4.7
5 - 23 1.8 22uF x2 5.6 3.3 none 10
5 - 23 2.5 Ceramic 8.2 2.2 none 10

5 - 23 3.3 10 2 none 10
5 - 23 5 10 3.3 none 10
5 - 12 1.0
4.7
5 - 15 1.2
470uF/
5 - 23 1.8 6.3V/ 10 6.8 680
5 - 23 2.5 120mΩ 10
5 - 23 3.3
5 - 23 5

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 LSP5526

Stability Compensation (Continued)

Comp=3.3k/5.6nF L=10uH Vout Overshoot vs Vout

Comp=3.3k/5.6nF L= 4.7uH (Vin=12V, Cout=44uF, dIout =1A)
320 Comp=5.6k/3.3nF L=10uH
300 Comp=8.2k/2.2nF L=10uH
280
Comp=8.2k/2.2nF L=4.7uH
260
Vout overshoot, mV

240 Comp=10k/3.3nF L=10uH

220 Comp=10k/2.2nF L=10uH
200
180
160
140
120
100
80
60
40
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Vout, V
Figure 3. Load Transient Testing VS Compensation Value

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 LSP5526

Typical Characteristics
Light Load Operation (No load) Heavy Load Operation (2A Load)
Vin=12V, Iin=8.2 mA, Vout=3,3V Vin=12V, Vout=3,3V

Startup Vin=12V, Vout=3.3V, Iout=1A

through Vin. through Enable.

Short Circuit Protection Vin=12V

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 LSP5526

Typical Characteristics (Continued)

SWITCHES RdsON vs
JUNCTION TEMPERATURE (Vin=12V)
0.16
0.15
SWITCHES RdsON

0.14
0.13
0.12
0.11
0.1
0.09
0.08
10 30 50 70 90 110 130 150 170
JUNCTION TEMPERATURE (C)

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 LSP5526

Marking Information

SOP-8L

LOGO LSC
LSP5526 Part ID
VYYWWUZ

V YYWW UZ
Internal Code
Date code
YY：Year(09=2009,10=2010,11=2011,12=2012...)
WW：Week(01~53)
Output Voltage
Blank：ADJ

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 LSP5526

Mechanical Information

(1) Package type: SOP-8L

Unit : mm
Symbol Min Max
A - 1.75
A1 0.10 0.25
A2 1.25 1.65
b 0.33 0.51
c 0.10 0.26
D 4.70 5.10
E 5.80 6.20
E1 3.70 4.10
e 1.27 REF
L 0.40 1.27
L1 1.04 REF
Gauge Plane 0.25 BSC
θ 0o 8o

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 LSP5526

MSL (Moisture Sensitive Level) Information

IPC/JEDEC J-STD-020D.1 Moisture Sensitivity Levels Table

SOAK REQUIREMENTS
Accelerated Equivalent5
FLOOR LIFE
Standard eV eV
LEVEL
0.40-0.48 0.30-0.39
CONDITION
TIME TIME TIME
TIME CONDITION CONDITION
(hours) (hours) (hours)
≤30 °C /85% 168 85 °C /85%
1 Unlimited NA NA NA
RH +5/-0 RH
≤30 °C /60% 168 85 °C /60%
2 1 year NA NA NA
RH +5/-0 RH
≤30 °C /60% 6966 30 °C /60% 120 168
2a 4 weeks 60 °C/ 60% RH
RH +5/-0 RH -1/+0 -1/+0
≤30 °C /60% 1926 30 °C /60% 40 52
3 168 hours 60 °C/ 60% RH
RH +5/-0 RH -1/+0 -1/+0
≤30 °C /60% 966 30 °C /60% 20 24
4 72 hours 60 °C/ 60% RH
RH +2/-0 RH +0.5/-0 +0.5/-0
≤30 °C /60% 726 30 °C /60% 15 20
5 48 hours 60 °C/ 60% RH
RH +2/-0 RH +0.5/-0 +0.5/-0
≤30 °C /60% 486 30 °C /60% 10 13
a 24 hours 60 °C/ 60% RH
RH +2/-0 RH +0.5/-0 +0.5/-0
Time on Label ≤30 °C /60% 30 °C /60%
6 TOL NA NA NA
(TOL) RH RH
Note 5: CAUTION - To use the ‘‘accelerated equivalent’’ soak conditions, correlation of damage response (including electrical, after
soak and reflow), should be established with the ‘‘standard’’ soak conditions. Alternatively, if the known activation energy for
moisture diffusion of the package materials is in the range of 0.40 - 0.48 eV or 0.30 - 0.39 eV, the ‘‘accelerated equivalent’’
may be used. Accelerated soak times may vary due to material properties (e.g .mold compound, encapsulant, etc.). JEDEC
document JESD22-A120 provides a method for determining the diffusion coefficient.
Note 6: The standard soak time includes a default value of 24 hours for semiconductor manufacturer’s exposure time (MET) between
bake and bag and includes the maximum time allowed out of the bag at the distributor’s facility. If the actual MET is less than
24 hours the soak time may be reduced. For soak conditions of 30 °C/60% RH, the soak time is reduced by 1 hour for each
hour the MET is less than 24 hours. For soak conditions of 60 °C/60% RH, the soak time is reduced by 1 hour for each 5
hours the MET is less than 24 hours. If the actual MET is greater than 24 hours the soak time must be increased. If soak
conditions are 30 °C/60% RH, the soak time is increased 1 hour for each hour that the actual MET exceeds 24 hours. If soak
conditions are 60 °C/60% RH, the soak time is increased 1 hour for each 5 hours that the actual MET exceeds 24 hours.

Mechanical Data
 Moisture Sensitivity: Level 3 per J-STD-020
 Terminals: Finish – Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208
 Weight: 0.076 grams (Approximate)

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 LSP5526

IMPORTANT NOTICE

1. DIODES INCORPORATED (Diodes) AND ITS SUBSIDIARIES MAKE NO WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE
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2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes’
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who design with Diodes’ products. Diodes’ products may be used to facilitate safety-related applications; however, in all instances
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applicable legal and regulatory requirements as well as safety and functional-safety related standards, and (d) ensuring they design with
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© 2022 Diodes Incorporated. All Rights Reserved.

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