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Lec11 Diodes

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Lecture 11

Diodes

1
 Diode:
 The simplest and most fundamental nonlinear circuit element.
 Used as the generation of dc voltages from the ac power supply.
 Foundation for understanding the characteristics of bipolar
transistors and the field-effect transistors.
 Silicon pn-junction diodes .
 Specialized diodes types:
photodiode
the light-emitting diode.

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1. Ideal diode
Nonlinear characteristics:
anode Cathode
1. cutoff state: When the diode is reverse-biased , it
behaves as an open circuit.
2. On state: when the diode is forward-biased, it
diode circuit symbol behaves as an short circuit.

i-v curve includes two straight line, so it is


i piecewise linear . The diode is a linear circuit in a
particular operation region.

reverse bias Diode application


Forward bias
1. The rectifier converts ac voltage to
dc voltage.
2. Diode logic gate: such as “OR” gate
v and “AND” gate.
i-v curve
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2 Terminal characteristics of junction diodes

I-V relationship

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i  I S (ev / nVT  1)
IS: saturation current ,constant for a given temperature and pn junction.
n: constant of value between 1 and 2, depending on material and structure of diode.
n=1 for integrated circuit fabrication process
n=2 for discrete diodes.
kT
Thermal voltage : VT 
q
K= Boltzmann’s constant=1.38×10-23 joules/Kelvin
T= the absolute temperature in kelvins=273+temperature in Centigrade
q= the magnitude of electronic charge= 1.60×10-19 coulomb in room
temperature (25 C )

Cut-in voltage: the current is very small if the voltage is smaller


than 0.5V.

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Physics of forward bias:
qVD
Diode Current equation: I D  I 0 [exp( )  1]
kT

• Junction potential φJ (potential drop across SCR)


reduced by VD ⇒ minority carrier injection into QNRs
• Minority carrier diffusion through QNRs
• Minority carrier recombination at contacts to the QNRs (and
surfaces)
• Large supply of carriers injected into the QNRs
qVD
 I D  [exp( )]
kT
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qVD
Physics of reverse bias: I D  I 0 [exp( )  1]
kT

• Junction potential φJ (potential drop across SCR)


increased by |VD| ⇒ minority carrier extraction from QNRs
• Minority carrier drift through QNRs
• Minority carrier generation at surfaces & contacts of QNRs
• Very small supply of carriers available for
Extraction ⇒ I saturates to small value
 I D  I0

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The pn junction in the
breakdown region
 When the reverse voltage exceeds the breakdown voltage, the
diode is breakdown. Or if the reverse current I is greater than
the drift current Is, breakdown occurs.
 The two possible breakdown mechanisms :
zener effect (齐纳效应)
avalanche effect. (雪崩效应)
 pn junction breakdown is not a destructive process, provided
that the maximum specified power dissipation is not exceeded.

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3. Analysis of diode circuits
We can represent the diode I-V
ID characteristic by the exponential
R
relationship, resulting in
+
I D  I S eVD / nVT
VDD VD
_
The other equation is obtained by
Fig. a simple diode circuit writing a Kirchhoff loop equation,
resulting in
VDD  VD
ID 
R
ID and VD can be obtained by two solutions:
graphical analysis and iterative analysis.

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Graphical analysis

Fig11.1 Graphical analysis of the simple diode circuit

The operation point is the intersect of the diode curve and


the load line. Its coordinates give the values of ID and VD.
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Iterative analysis
1) Assume ID and VD to be the V1 and I1
VDD  VD
2) Substitute V1 into ID  to get I2
R
I2
3) Substitute V1 I1 and I2 into V2  V1  2.3nVT log
I1
to get V2
4) Make iterative computation like 2) and 3),
until Vn  Vn1  convergent limit
iteration stops. In and Vn are ID and VD, respectively.

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4. Diode circuit models
 Large-Signal Static Model
1) Ideal model
2) The constant-voltage drop model
3) Piece-wise linear model
 Small Signal Model
1) Small signal resistance
2) Depletion capacitance and junction capacitance

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Ideal model
i

reverse bias Ideal


Forward bias

anode Cathode

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The constant-voltage drop model
The model simply says that a forward-conducting diode
exhibits a constant voltage drop VD of value usually taken
to be 0.7V. This model is usually employed in the initial
phase of analysis and design.

Fig The constant voltage drop model and its circuit representation
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Piece-wise linear model
The nonlinear nature complicates the analysis of diode circuits.
For simplification, the exponential curve is approximated by
two straight lines. i  0, v  V
D D D0

iD  (vD  VD 0 ) / rD , vD  VD 0

Fig Piecewise-linear
model of the diode
forward characteristics
and its equivalent
circuit representation

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Question?
How does a circuit designer to select various models?

This selection is a compromise between accuracy and


complexity for specific application.

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The small signal model and its
application
 Nonlinear system to linear system- Small signal resistance
 When a diode is biased to operate at a point on the forward I-V
characteristic and a small ac signal is superimposed on the dc
quantities, the diode is best modeled by a resistance equal to
the inverse of the slope of the tangent to I-V characteristic at
the bias point. This model is called diode small signal model.
First, we decompose the total voltage vD across the forward
biased diode into a DC voltage VD and an incremental
voltage vd, that is, defined by
vD  VD  vd
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Examine effect of small signal overlapping bias:
q(VD  vd )
iD  I D  id  I 0 [exp( )  1]
kT
If the amplitude of the signal vd(t) is kept sufficiently
small such that vd
 1
kVT
We may expand the exponential in a series and truncate the series
after the first two terms to make small-signal approximation.
qVD qv
I D  id  I 0 [exp( ) exp( d )  1]
kT kT
qV qv
 I 0 [exp( D )(1  d )  1]
kT kT
qVD qVD qvd
 I 0 [exp( )  1]  I 0 exp( )( )
kT kT kT
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q( I D  I 0 )
id  vd
kT
The total current= the dc current +the ac current (small signal)
iD (t )  I D  id
From a small signal point of view. Diode behaves as
conductance of value:
q( I D  I 0 ) qI D
gd  
kT kT
gd depends on bias.
In forward bias:
qI D
gd 
kT
gd is linear in diode current.
nVT  i 
rd   1/  D 
So the diode small-signal resistance is ID  vD  i
D ID
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Since the signal excursion
is restricted to a short,
almost-linear segment of
I-V characteristic around
the bias point, the small
signal model is linear.

Development of the diode small signal model.

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The small signal approximation allows us to separate
the dc analysis from the ac signal analysis.
DC analysis: VDD  I D R  VD  I D R  VD 0  I D rd
VD0 is the dc point of the diode.

AC analysis: vs  id R  id rd
The signal analysis is performed by eliminating all dc
sources and replacing the diode with its small signal
resistance rd.
Small signal model is like piece-wise linear model.

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Its equivalent model
Diode circuit

DC analysis AC analysis
Fig The analysis of the diode circuit.
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Depletion capacitance
 We will see the analogy between depletion layer of a pn
junction and a capacitor.
 As the voltage across the pn junction changes, the charge
stored in the depletion layer changes accordingly.
 The depletion-layer charge can be derived by finding the
charge stored on either side of the junction.
qJ  qN  Q  qN D xn A
xp ND N AND
 Qq AW
xn N A N A  ND
xn  x p  W
1/2
 2 s (V0  VR ) N A  N D 
1/2
dQ  q s N A N D 
W  [ ] C  A 
 e N AND  dVR  0
2(V  VR )( N A  N D 
)
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With bias voltage across the diode,
2 si 1 1
W (  )(V0  VD ) VD  VR
q N A ND
We can treat the depletion layer as parallel-plate capacitor and
the junction capacitance is
 si A C j0
Cj  
W VD
1
V0

  si q   N A N D   1 
C j0  A    
 2  A
N  N D   V0 

Cj0 is the zero-voltage junction capacitance.


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More general form of the depletion capacitance is
C j0
C j  m
 VD 
1  
 V0 

m is a constant whose value depends on the manner in which the


concentration changes from the p to the n side of the junction. It is
called the grading coefficient, and the value is from 1/3 to 1/2.

Under forward bias assume VD  V0


2

Junction capacitance is approximated by rules of thumb

C j  2C j 0

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Diffusion capacitance
The excess minority-carrier charge is stored in both p and n
bulk regions and depends on the terminal voltage.
Carrier picture for the forward bias:

If QNR minority carrier


concentration ↑ but majority
carrier concentration
unchanged? ⇒
quasineutrality is violated.

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Quasineutrality demands that at every point in QNR:
Excess minority carrier concentration
=excess majority carrier concentration

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In n-type Si, at every x:

pn ( x)  pn 0  nn ( x)  nn 0

In p-type Si, at every x:

n p ( x)  n p 0  p p  x   p p 0

Mathematically:

p n' ( x)  pn ( x)  pn 0  nn' ( x)  nn ( x)  nn 0

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Define integrated carrier charge:

1
qPn  qA P ' ( xn )(Wn  xn )
2
1
 qA(Wn  xn )( p ( xn )  p (Wn ))
2
VD
1
 qA(Wn  xn ) pn 0 (e Vth  1)
2

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Now examine small increase in VD:
Small increase in VD
⇒ small increase in qPn
⇒ small increase in |qNn |

Behaves as capacitor of
capacitance:

dq pn
Cdn 
dvD vD VD

Wn  xn ni2 q qV
 qA exp[ D ]
2 N d kT kT

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The total diffusion capacitance Cd is the sum of the diffusion
capacitance in n-QNR and p-QNR:
dqn p dq pn
Cd  
dvD vD
dvD vD

qA
 (Wp  x p )n p 0  (Wn  xn ) pn 0  evD /Vth
2Vth

Under forward bias, the diffusion capacitance increases


exponentially with the forward bias voltage.
Under reverse bias, the diffusion capacitance is nearly
zero. This agrees with the reverse-bias carrier distribution
which represent a tiny charge storage that furthermore is
not a function of the diode voltage.
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Can write in terms of IDp (portion of diode current due to
holes in nQNR):
ni2 Dp qVD
Jp  q exp[  1]
N d (Wn  xn ) kT

q (Wn  xn ) 2 ni2 Dp qV
Cdn  qA exp[ D ]
kT 2Dp N d (Wn  xn ) kT
q (Wn  xn ) 2
 I Dp
kT 2Dp

Define transit time of holes through nQNR:

Transit time is the average time for a hole to diffuse through


nQNR

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q
For nQNR Cdn   Tp I Dp
kT
q
Similarly for pQNR: Cdp   Tn I Dn
kT
where the transit time of electrons through pQNR:

(W p  x p ) 2
 Tn 
2 Dn
Both capacitors sit in parallel ⇒ total diffusion capacitance:
q
Cd  Cdn  Cdp  ( Tn I Dn   Tp I Dp )
kT
Cd  ( T / VT ) I D
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The diode high-frequency model
This model includes two capacitance: the depletion-
layer capacitance Cj and the diffusion capacitance Cd.

Bias point: I D , VD
rd Cj Cd rd  nVT / I D
Cd  ( T / VT ) I D
VD m
C j  C j 0 / (1  ) for VD  0
Fig. high-frequency small-signal V0
model of the diode
C j  2C j 0 , for VD  0

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Bias dependence of Cj and Cd:
• Cj dominates in reverse bias
and small forward bias
1

B  VD

• Cd dominates in strong
forward bias
 qVD 
 kT 
e  

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Summary of small-signal model
  qVkTD  
• Diode Current: I  I 0  e    1
 
• Conductance: associated with current voltage characteristics
– gd ∝ I in forward bias,
– gd negligible in reverse bias
• Junction capacitance: associated with charge modulation
in depletion region 1
Cj 
B  VD
• Diffusion capacitance: associated with charge storage in
QNRs to maintain quasineutrality.
 qVD 
 kT 
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Cd  e  
Example
An IC diode is designed to have a room-temperature
saturation current of I0=5×10-17A for a particular
application. The fabrication process results in the device
dimensions and physical parameters listed below.
Dimensions Doping Diffusion
coefficient
Wp=0.5 um Na=2.5X1017cm-3 Dn=14cm2s-1
Wn=1.0um Nd=4.0X1016cm-3 Dp=10cm2s-1

a) What diode area A is required for I0?


b) Find the current and minority carrier concentrations at the edges of the
depletion region for a forward bias VD=720 mV.
c) Plot the carrier concentration distribution along the diode.
d) Find the numerical values of the small-signal circuit elements for a
bias voltage of VD=720mV.
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Solution:
(1) Since the depletion width can be neglected, the saturation current
is  Dn Dp  11
J 0  qni 
2
   5.79  10 A/cm
2
NW N dWn 
 a p
Solving for the diode area from I0=J0A, we find that
A  8.64 107 cm 2
(2) For a forward bias of VD=720 mV, the diode current is
 
I D  I 0 eVD /Vth  1  (5 1017 A) 10720/60  50 uA
The minority carrier concentrations at the surfaces of QNRs are
ni2 1020 3 ni2 1020 3
pn 0    2.5  10 3
cm np0    4  10 2
cm
N d 4 1016 N a 2.5  1017
The minority carrier concentrations at the depletion region edges are
log eVD /Vth 
pn ( xn )  pn 010  2.5 103 10720/60  2.5 1015 cm 3
log eVD /Vth 
n p ( x p )  n p 010  4 102 10720/60  4 1014 cm3
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(3) The majority carrier concentrations at the depletion region
edges are
p p ( x p )  N a  n p ( x p )  2.5  1017  4  1014 =2.504 1017 cm 3
nn ( xn )  N d  pn ( xn )  4 1016  2.5 1015  4.25 1016 cm 3

(4) The small-signal resistance


Vth 25mV
rd    500
ID 50uA
The junction capacitance is
  q  N N  1 
A  si   A D   
 2   N A  N D  V0 
Cj  m  156 fF
 VD 
1  
 V0 
The diffusion capacitance is
qA
Cd  (W p  x p )n p 0  (Wn  xn ) pn 0  evD /Vth  1.62 pF
2Vth
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Homework 13

 n 0  107 s  p 0  108 s D p  10cm 2 / s Dn  25cm 2 / s

Assume the width of QNR regions are much larger than the width of the
depletion region.
5. The application of diodes
 Voltage regulator
 Rectifier
 Limiting and clamping circuit

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Use of the diode forward drop in
voltage regulation (稳压器)
 What is voltage regulator?
A voltage regulator is a circuit to provide a constant dc voltage
between its output terminals in spite of
(a) changes in the load current drawn from the regulator output
terminal
(b) changes in the dc power-supply voltage that feeds the regulator.
 Why can the diode be used in voltage regulator?
The forward voltage drop of the diode remains almost constant at
approximately 0.7V while the current through it varies relatively
large amounts.
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zener diodes
- Operation in the reverse breakdown region
 A diode can be designed as a voltage regulator due to the
almost-constant voltage drop in the breakdown region.
 The diode operating in the breakdown region is called
breakdown, more commonly, zener diodes.

Fig Circuit symbol


for a zener diode

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Fig The diode I-V characteristic
with the breakdown region
shown in some detail

The knee current IZK and the knee voltage VZK


VZ  VZk  rZ I Z
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rectifier circuits (整流电路)

Fig Block diagram of a dc power supply

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power transformer
- consists of two separated coils would around an iron core that
magnetically couples the two windings.
- The primary winding has N1 turns, and the second winding
has N2 turns. N2
vs  120V
N1
The diode rectifier converts the input sinusoid vs to a unipolar
output, which has a dc component.

Filter is used to reduce the variation of the magnitude.

Finally the voltage regulator is employed to reduce ripple and


stabilize the magnitude of the dc output voltage against variation
caused by changes in load current.
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Limiting and Clamping circuits
(钳位电路)

(c)

(a) half-wave rectifier


(b) double limiting
(c) double-anode zener

(b)
47
6. Special diodes types
 The Schottky-barrier diode (SBD) 肖特基势垒二极管
It brings metal into contact with a moderately doped n-type semiconductor material.
The resulting metal-semiconductor junction behaves like a diode.
Two applications: 1) Gallium Arsenide (GaAs) circuits;
2) bipolar-transistor logic circuits.
 Varactors (voltage-variable capacitors)
Reverse-biased pn junctions exhibit a charge-storage effect that is modeled with the
depletion-layer or junction capacitance Cj, which is a function of the reverse-biased
voltage VR.
 Photodiodes
A photodiode can be use to convert light signal into electrical signals.
It is an important component of optoelectronics or photonics.
 Light-Emitting Diodes (LEDs)
48 It converts a forward current into lights, as a inverse function of the photodiode.
7 . The SPICE diode model and
simulation

vd
id  ISeff  (e N vt
 1)

The capacitance, cd, is a combination of diffusion capacitance,


(cdiff), depletion capacitance, (cdep), metal, (cmetal), and poly
capacitances, (cpoly). cd  cdiff  cdep  cmetal  cpoly
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.MODEL mname D <LEVEL = val> <keyword = val> ...

mname Model name. The diode element refers to the


model by this name.
D Symbol that identifies a diode model
LEVEL Symbol that identifies a diode model
LEVEL=1 =junction diode
LEVEL=2 =Fowler-Nordheim
LEVEL=3 =geometric processing for junction diode

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 Dn Dp 
I s  qAn 
2
  kT N N
i
 N a Wp  x p  N d Wn  xn   B  ln( a 2 d )
  q ni

  q   N AND   1  (Wn  xn )2
C j 0  A  si      Tp 
 2   N A  N D   V0  2 Dp
51
52
Setting Junction DC Parameters in Level 1 and 3

53
54
Note: If you use a diode model for which the AREA is not
specified, AREA defaults to 1; then RS has units of ohms. If AREA
is specified in the netlist in m2, then the units of RS are ohms/m2.
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Examples
.MODEL D1 D (CO=2PF, RS=1, IS=1P)
.MODEL DFOWLER D (LEVEL=2, TOX=100, JF=1E-10, EF=1E8)
.MODEL DGEO D (LEVEL=3, JS=1E-4, JSW=1E-8)
.MODEL d1n750a D
+ LEVEL=1 XP =0.0 EG =1.1
+ XOI =0.0 XOM =0.0 XM =0.0
+ WP =0.0 WM =0.0 LP =0.0
+ LM =0.0 AF =1.0 JSW =0.0
+ PB =0.65 PHP =0.8 M =0.2994
+ FC =0.95 FCS =0.4 MJSW=0.5
+ TT =2.446e-9 BV =4.65 RS =19
+ IS =1.485e-11 CJO =1.09e-9 CJP =0.0
+ PJ =0.0 N =1.615 IK =0.0
+ IKR =1.100e-2 IBV =2.00e-2

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Example

Fig Model for the zener diode.


This model can be used in
SPICE by defining the zener
as a subcircuit. Diode D1 is
ideal and can be approximated
in SPICE by using n=0.01

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* Zener diode_subcircuit
.subckt zener_diode 1 2
* anode
* cathode
Rz 3 4 10
Vz 2 3 4.9
D1 1 2 diode1
D2 1 4 diode_ideal
.model diode1 (IS=100pA n=1.679)
.model diode_ideal (IS=100pA n=0.01)
.ends zener_diode

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Homework

The input is a sinusoid of 10 V peak and 1KHz frequency.


The diodes are of the type (IS=0.1pA, Rs=16ohm, Cjo=2 pF, Tt=12 ns,
BV=100 V, IBV =0.1 pA); the capacitors C1=C2=1uF.
Use SPICE to investigate the operation of the voltage doubler shown above.
Plot the transient behavior of the voltages v2 and vo.

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