ADVANCE INFORMATION

Am29LV200B
2 Megabit (256 K x 8-Bit/128 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory

DISTINCTIVE CHARACTERISTICS
■ Single power supply operation ■ Top or bottom boot block configurations
— Full voltage range: 2.7 to 3.6 volt read and write available
operations for battery-powered applications ■ Embedded Algorithms
— Regulated voltage range: 3.0 to 3.6 volt read and — Embedded Erase algorithm automatically
write operations and for compatibility with high preprograms and erases the entire chip or any
performance 3.3 volt microprocessors combination of designated sectors
■ Manufactured on 0.35 µm process technology — Embedded Program algorithm automatically
— Compatible with 0.5 µm Am29LV200 device writes and verifies data at specified addresses

■ High performance ■ Minimum 1,000,000 write cycle guarantee per

sector
— Full voltage range: access times as fast as 80 ns
■ Package option
— Regulated voltage range: access times as fast as
70 ns — 48-pin TSOP
— 44-pin SO
■ Ultra low power consumption (typical values at 5
MHz) ■ Compatibility with JEDEC standards
— 200 nA Automatic Sleep mode current — Pinout and software compatible with single-
— 200 nA standby mode current power supply Flash
— 7 mA read current — Superior inadvertent write protection
— 15 mA program/erase current ■ Data# Polling and toggle bits
■ Flexible sector architecture — Provides a software method of detecting program
or erase operation completion
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
three 64 Kbyte sectors (byte mode) ■ Ready/Busy# pin (RY/BY#)
— One 8 Kword, two 4 Kword, one 16 Kword, and — Provides a hardware method of detecting
three 32 Kword sectors (word mode) program or erase cycle completion
— Supports full chip erase ■ Erase Suspend/Erase Resume
— Sector Protection features: — Suspends an erase operation to read data from,
A hardware method of locking a sector to prevent or program data to, a sector that is not being
any program or erase operations within that erased, then resumes the erase operation
sector ■ Hardware reset pin (RESET#)
Sectors can be locked in-system or via — Hardware method to reset the device to reading
programming equipment array data
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■ Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences

This document contains information on a product under development at Advanced Micro Devices. The information Publication# 21521 Rev: A Amendment/0
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed Issue Date: January 1998
product without notice. 1/23/98
 ADVANCE INFORMATION

GENERAL DESCRIPTION
The Am29LV200B is a 2 Mbit, 3.0 volt-only Flash preprograms the array (if it is not already programmed)
memory organized as 262,144 bytes or 131,072 words. before executing the erase operation. During erase, the
The device is offered in 44-pin SO and 48-pin TSOP device automatically times the erase pulse widths and
packages. The word-wide data (x16) appears on verifies proper cell margin.
DQ15–DQ0; the byte-wide (x8) data appears on DQ7–
The host system can detect whether a program or
DQ0. This device is designed to be programmed in-
erase operation is complete by observing the RY/BY#
system using only a single 3.0 volt VCC supply. No VPP
pin, or by reading the DQ7 (Data# Polling) and DQ6
is required for write or erase operations. The device
(toggle) status bits. After a program or erase cycle has
can also be programmed in standard EPROM pro-
been completed, the device is ready to read array data
grammers.
or accept another command.
This device is manufactured using AMD’s 0.35 µm
The sector erase architecture allows memory sectors
process technology, and offers all the features and ben-
to be erased and reprogrammed without affecting the
efits of the Am29LV200, which was manufactured using
data contents of other sectors. The device is fully
0 . 5 µ m p r o c e s s t e c h n o l o gy. I n a d d i t i o n , t h e
erased when shipped from the factory.
Am29LV200B features unlock bypass programming
and in-system sector protection/unprotection. Hardware data protection measures include a low
VCC detector that automatically inhibits write opera-
The standard device offers access times of 70, 80, 90
tions during power transitions. The hardware sector
and 120 ns, allowing high speed microprocessors to
protection feature disables both program and erase
operate without wait states. To eliminate bus contention
operations in any combination of the sectors of mem-
the device has separate chip enable (CE#), write
ory. This can be achieved in-system or via program-
enable (WE#) and output enable (OE#) controls.
ming equipment.
The device requires only a single 3.0 volt power sup-
The Erase Suspend feature enables the user to put
ply for both read and write functions. Internally gener-
erase on hold for any period of time to read data from,
ated and regulated voltages are provided for the
program and erase operations. or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard. Com- The hardware RESET# pin terminates any operation
mands are written to the command register using in progress and resets the internal state machine to
standard microprocessor write timings. Register con- reading array data. The RESET# pin may be tied to the
tents serve as input to an internal state-machine that system reset circuitry. A system reset would thus also
controls the erase and programming circuitry. Write reset the device, enabling the system microprocessor
cycles also internally latch addresses and data needed to read the boot-up firmware from the Flash memory.
for the programming and erase operations. Reading The device offers two power-saving features. When ad-
data out of the device is similar to reading from other dresses have been stable for a specified amount of
Flash or EPROM devices. time, the device enters the automatic sleep mode.
Device programming occurs by executing the program The system can also place the device into the standby
command sequence. This initiates the Embedded mode. Power consumption is greatly reduced in both
Program algorithm—an internal algorithm that auto- these modes.
matically times the program pulse widths and verifies AMD’s Flash technology combines years of Flash
proper cell margin. The Unlock Bypass mode facili- memory manufacturing experience to produce the
tates faster programming times by requiring only two highest levels of quality, reliability and cost effective-
write cycles to program data instead of four. ness. The device electrically erases all bits within
Device erasure occurs by executing the erase com- a sector simultaneously via Fowler-Nordheim tun-
mand sequence. This initiates the Embedded Erase neling. The data is programmed using hot electron
algorithm—an internal algorithm that automatically injection.

1/23/98 Am29LV200B 2
 ADVANCE INFORMATION

PRODUCT SELECTOR GUIDE

Family Part Number Am29LV200B

Regulated Voltage Range: VCC =3.0–3.6 V -70R

Speed Options
Full Voltage Range: VCC = 2.7–3.6 V -80 -90 -120

Max access time, ns (tACC) 70 80 90 120

Max CE# access time, ns (tCE) 70 80 90 120

Max OE# access time, ns (tOE) 30 30 35 50

Note: See “AC Characteristics” for full specifications.

BLOCK DIAGRAM
RY/BY# DQ0–DQ15 (A-1)
VCC
Sector Switches
VSS
Erase Voltage Input/Output
RESET# Generator Buffers

WE# State
Control
BYTE#
Command
Register PGM Voltage
Generator
Chip Enable Data
Output Enable STB Latch
CE#
OE# Logic

Y-Decoder Y-Gating
STB
Address Latch

VCC Detector Timer

X-Decoder Cell Matrix

A0–A16

21521A-1

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 ADVANCE INFORMATION

CONNECTION DIAGRAMS

A15 1 48 A16
A14 2 47 BYTE#
A13 3 46 VSS
A12 4 45 DQ15/A-1
A11 5 44 DQ7
A10 6 43 DQ14
A9 7 42 DQ6
A8 8 41 DQ13
NC 9 40 DQ5
NC 10 39 DQ12
WE# 11 38 DQ4
RESET# 12 Standard TSOP 37 VCC
NC 13 36 DQ11
NC 14 35 DQ3
RY/BY# 15 34 DQ10
NC 16 33 DQ2
NC 17 32 DQ9
A7 18 31 DQ1
A6 19 30 DQ8
A5 20 29 DQ0
A4 21 28 OE#
A3 22 27 VSS
A2 23 26 CE#
A1 24 25 A0

A16 1 48 A15
BYTE# 2 47 A14
VSS 3 46 A13
DQ15/A-1 4 45 A12
DQ7 5 44 A11
DQ14 6 43 A10
DQ6 7 42 A9
DQ13 8 41 A8
DQ5 9 40 NC
DQ12 10 39 NC
DQ4 11 38 WE#
VCC 12 37 RESET#
DQ11 13 Reverse TSOP 36 NC
DQ3 14 35 NC
DQ10 15 34 RY/BY#
DQ2 16 33 NC
DQ9 17 32 NC
DQ1 18 31 A7
DQ8 19 30 A6
DQ0 20 29 A5
OE# 21 28 A4
VSS 22 27 A3
CE# 23 26 A2
A0 24 25 A1

21521A-2

1/23/98 Am29LV200B 4
 ADVANCE INFORMATION

CONNECTION DIAGRAMS

NC 1 44 RESET#
RY/BY# 2 43 WE#
NC 3 42 A8
A7 4 41 A9
A6 5 40 A10
A5 6 39 A11
A4 7 38 A12
A3 8 37 A13
A2 9 36 A14
A1 10 35 A15
A0 11 34 A16
CE# 12 SO 33 BYTE#
VSS 13 32 VSS
OE# 14 31 DQ15/A-1
DQ0 15 30 DQ7
DQ8 16 29 DQ14
DQ1 17 28 DQ6
DQ9 18 27 DQ13
DQ2 19 26 DQ5
DQ10 20 25 DQ12
DQ3 21 24 DQ4
DQ11 22 23 VCC

21521A-3

PIN CONFIGURATION LOGIC SYMBOL

A0–A16 = 17 addresses
17
DQ0–DQ14 = 15 data inputs/outputs A0–A16 16 or 8
DQ15/A-1 = DQ15 (data input/output, word mode), DQ0–DQ15
A-1 (LSB address input, byte mode) (A-1)

BYTE# = Selects 8-bit or 16-bit mode

CE#
CE# = Chip enable OE#
OE# = Output enable
WE#
WE# = Write enable RESET#
RESET# = Hardware reset pin, active low BYTE# RY/BY#
RY/BY# = Ready/Busy# output
VCC = 3.0 volt-only single power supply
(see Product Selector Guide for speed 21521A-4
options and voltage supply tolerances)
VSS = Device ground
NC = Pin not connected internally

5 Am29LV200B 1/23/98
 ADVANCE INFORMATION

ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combi-
nation) is formed by a combination of the elements below.

Am29LV200B T -70R E C

OPTIONAL PROCESSING
Blank = Standard Processing
B = Burn-in
(Contact an AMD representative for more information)

TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
I = Industrial (–40°C to +85°C)
E = Extended (–55°C to +125°C)

PACKAGE TYPE
E = 48-Pin Thin Small Outline Package (TSOP)
Standard Pinout (TS 048)
F = 48-Pin Thin Small Outline Package (TSOP)
Reverse Pinout (TSR048)

SPEED OPTION
See Product Selector Guide and Valid Combinations

BOOT CODE SECTOR ARCHITECTURE

T = Top Sector
B = Bottom Sector

DEVICE NUMBER/DESCRIPTION
Am29LV200B
2 Megabit (256 K x 8-Bit/128 K x 16-Bit) CMOS Flash Memory
3.0 Volt-only Read, Program, and Erase

Valid Combinations Valid Combinations

Valid Combinations list configurations planned to be sup-
Am29LV200BT-70R, ported in volume for this device. Consult the local AMD sales
EC, EI, FC, FI, SC, SI
Am29LV200BB-70R office to confirm availability of specific valid combinations and
Am29LV200BT-80, to check on newly released combinations.
Am29LV200BB-80
EC, EI, EE,
Am29LV200BT-90,
FC, FI, FE,
Am29LV200BB-90
SC, SI, SE
Am29LV200BT-120,
Am29LV200BB-120

Trademarks

Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved.

AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

1/23/98 Am29LV200B 6
 ADVANCE INFORMATION

7 Am29LV200B 1/23/98