Selvam College of technology

Microprocessor & Its Application

Unit-5

2 MARK QUESTIONS & ANSWERS

1. Features of 8051microprocessor?
 8 bit controller operating on bit and byte.
 256 bytes internal RAM and 4 kb internaj RPM
 64/60 kb external program memory address space
 64 kb external data memory address space
 4 numbers of 8 bit parallel port.

2. difference between micro processor and microcontroller?

s.no microprocessor Microcontroller

1 it contains ALU,general It contains the circuitary
purpose reg, sp,pc,clock of mp and in addition , it
timing circuit,interrupt circuit has built in
ROM ,RAM,i/o devices,
timer and counters.

2. it has many instructions to It has one or two

move data between memory instructions to move data
and CPU. between memory and
CPU.

Less access time

3. access times for memory and required.
i/o devices are more.
Less flexible in design
4. microprocessor based system point of view.
is more flexible in design
point of view.

5. less no of pins are mutli More no of pins are

functioned mutli functioned

3. state the functions of RS1 nd RS0 bit in the flag register ?

used to select the register banks

RS1 RS0 Bank selection

0 0 00 H – 07 H BANK 0
0 1 08H -0F H BANK 1
1 0 10H – 17 H BANK 2
1 1 18 H – 1F H BANK 3

4. difference betweem RR A and RRC A instructions in 8051?

1
 RR A RRC A
Rotate accumulator right Rotate accumulator right through carry
flag
The 8 bits in the accumulator are The 8 bits in the accumulator and the
rotated 1 bit to the right.bit 0 is rotated carry flag together rotated 1 bit to the
in to the bit 7 position. no flags are right.bit 0 is moves in to the bit carry
affected. flag; the original value of the flag
moves in to the bit 7 position. no flags
are affected.

5. show the format of PSW register of 8051?

B7 B6 B5 B4 B3 B2 B1 B0
CY AC F0 RS1 RS0 OF - P

6. what is the function of DPTR register?

 the data pointer consist of a high byte(DPH) and a low bte(DPL) .
 it functions is to hold a 16 byte address.
 It serves as a base register in indirect junps, lookup table instructions and
external data transfer.
7. list the interrupt structures of 8051?
 Priority level structure.
 External interrupts.
 Single step operation.
8. List the instruction sets of 8051?
 Data transfer
 Arithmetic
 Logical
 Branching
 Boolean
9. list the addressing modes supported by 8051?
 Register addressing
 Direct byte addressing
 Register indirect
 Immediate
 Register specific
 Index
10. What are the operating mode of the timer of 8051?
 The operating modes of the timer are mode 0,mode1, mode2,mode3.
 In mode 0, timer will function as 13 bit timer, in mode1 will function as
16 bit timer,in mode2 , function as 8 bit with auto reload feature.

11. List the interrupts of 8051 microcontroller?

It has
 External interrupt -0
 Timer-0 intrrupt
 External interrupt-1
 Timer-1 interrupt
 Serial port interrupt.
12. What are the dedicated address pointer in 8051?
2
 Program counter
Data pointer.
The PC is used as addresss pointer for program and DPTR is used as
address pointer for data.

13. What are the register banks in 8051?

 The reg banks are internal RAM locations of 8051 which can be used as
general purpose reg or scratch pad reg.
 The first 32 bytes of internal RAM of 8051 and organise as 4 reg banks
with each bank consisting 8 locations.
 At any one time the processor can work with only one rer bank depending
on the value of bits RS0 and RS1.

14. How stack is implemented in 8051?

 The 8051 LIFO .Stack can reside any where in the internal RAM
 it has 8 bit stack pointer to indicate the top if stack.thics can be accessed by
PUSH and POP instructions.
 During PUSH the SP is incremented by 1 and during POP the SP is
decremented by 1.
15. How the baud rate is decided in mode1 and mode3 os serial transmission of 8051?
 The baud rate depends on SMOD bit of PCON reg abd the yimer-1
overflow rate shown below.
 The baud rate in mode 1 or 3= 2 / 32 (timer – 1 overflow rate).

16. How to estimate the time taken to execute the instruction in 8031/8051 controller?
 It is obtained by multiplying the time to execute machine cycle
by the number of machine cycles of the instruction.The time to
execute a machine time is 12 clock periods.
 Time to execute an instruction=C 12 T=C 12 1/F.

17.List the various machine cycle of 8031/8051 controller.

 External program memory fetch cycle.

 External data memory read cycle.
 External data memory write cycle.
 Port operation cycle.

18List the instruction of 8051 that all the flag of 8051?

The 8051 instruction that affect all the flag are ADD,ADDC,and SUBB

19.List the instruction of 8051 that affect overflow flag in 8051.

The 8051 instruction that affect overflag are ADD,ADDC,DIV,MUL,SUBB.

20.List the instruction of 8051 that alaways clear carry flag.

The instruction that always clear carry flag are CLR C,DIV,MUL.

21.What are the operations performed by Boolean variable instructionof 8051?

3
 The Boolean variable instructions can carry or complement or move a particular
bit of

10. Give the M/IO used for interfacing technique?

M/IO=1; microprocessor communicating with memory system.
M/IO=0; microprocessor communicating with IO system.

11. Give the two methods for interfacing IO device? (Nov 2007)
1. Input/Output Mapped I/O.
2. Memory Mapped I/O.

12. Describe programmed I/O?

The transfer of data is completely under the control of microprocessor program.
The data transfer takes place only when I/O transfer instruction executed.

13 What are the IN and Out registers of indirect addressing in interfacing?

MOV DX, <Port Address>
OUT DX<data>
MOV DX, <Port Address>
IN AL/DX, DX<data>

14. What is the input device used in I/O interfacing?

The Input device used in I/O interfacing is buffer. The data transferred to output
need to be latched so that it will be available for checking or displaying.

15. What is the output device used in I/O interfacing?

The output device used in I/O interfacing is latch. When microprocessor wants to
read data from input device it will enable the buffer so data so data will be transferred on
to data bus of microprocessor

16. What is cycle stealing?

The refresh cycles are accomplished by doing a write; a read .The refresh cycle is
totally internal to the DRAM and is accomplished while other memory components in the
system operate. This type of refresh is known as cycle stealing or hidden refresh.
.
17. What is the range of IO in interfacing?
IO devices can be mapped in the specified IO range as 255 or 65535.

18. What are the two ways to address the IO?

The two ways to address the IO are
1. Direct Addressing
2. Indirect Addressing

19. Write a program to flash LED? (Nov 2007)

MOV AX, 4000H
MOV DS, AX
MOV SI, 00000 H
A1: MOV bytePTR[SI],0H
CALL Delay

4
 MOV bytePTR[SI],OFF H
CALL Delay
JMP AI

20. What are the parameters needed to interface memory?

Address to output delay (tACC)
CE to output delay (tCE)
Output enable to output delay (tOE).

21.What is meant by SRAM and its applications?

Static RAM or SRAM is a type of RAM that uses a flipflop as its basic storage
element.
Appli: To avoid inserting WAIT states, most high speed micro computer systems
require a cache memory subsystem. These systems are normally designed using SRAM.

STAFF INCHARGE HOD