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74LS258

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QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS

The MC74F258A is a quad 2-input multiplexer with 3-state outputs. Four bits of data from two sources can be selected using a common Data Select input. The four outputs present the selected data in the complement (inverted) form. The outputs may be switched to a high impedance state with a HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with bus-oriented systems. Multiplexer Expansion by Tying Outputs Together Inverting 3-State Outputs AC Enhanced Version of the F258 CONNECTION DIAGRAM (TOP VIEW)
VCC 16 OE 15 I0c 14 I1c 13 Zc 12 I0d 11 I1d 10 Zd 9
16

MC74F258A

QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS


FAST SCHOTTKY TTL

J SUFFIX CERAMIC CASE 620-09


1

1 S

2 I0a

3 I1a

4 Za

5 I0b

6 I1b

7 Zb

8 GND

16 1

N SUFFIX PLASTIC CASE 648-08

LOGIC DIAGRAM
OE I0a I1a I0b I1b I0C I1C I0D I1C S
16 1

D SUFFIX SOIC CASE 751B-03

ORDERING INFORMATION
MC54FXXXAJ Ceramic MC74FXXXAN Plastic MC74FXXXAD SOIC

LOGIC SYMBOL
1

S 4 Za Zb Zc Zd 7 12 Zb Zc Zd Za OE I0a I1a I0b I1b I0c I1c I0d I1d 15 2 3 5 6 14 13 11 10

9 VCC = PIN 16 GND = PIN 8

FAST AND LS TTL DATA 4-130

MC74F258A
FUNCTION TABLE
Output Enable OE H L L L L
H = HIGH Voltage Level L = LOW Voltage Level X = Dont Care Z = High Impedance

Select Input S X H H L L I0 X X X L H

Data Inputs I1 X L H X X

Output Z Z H L H L

GUARANTEED OPERATING RANGES


Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current High Output Current Low Parameter 74 74 74 74 Min 4.5 0 Typ 5.0 25 Max 5.5 70 3.0 24 Unit V C mA mA

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)


Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 74 74 VOL IOZH IOZL IIH Output LOW Voltage Output OFF Current HIGH Output OFF Current LOW Input HIGH Current 2.7 2.4 0.35 0.5 50 50 20 100 IIL IOS ICCH Input LOW Current Output Short Circuit Current (Note 2) 60 6.2 0.6 150 9.5 V A A A A mA mA IOL = 24 mA VOUT = 2.7 V VOUT = 0.5 V VIN = 2.7 V VIN = 7.0 V VIN = 0.5 V VOUT = 0 V S, I1x = 4.5 V OE, I0x = GND ICCL Power Supply Current 15.1 23 mA I1x = 4.5 V OE, I0x, S = GND ICCZ 11.3 17 S, I0x = GND OE, I1x = 4.5 V
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating ranges. 2. Not more than one output should be shorted at a time, nor for more than 1 second.

Min 2.0

Typ

Max

Unit V

Test Conditions Guaranteed Input HIGH Voltage Guaranteed Input LOW Voltage IIN = 18 mA IOH = 3.0 mA VCC = MIN VCC = 4.75 V VCC = MIN VCC = MIN VCC = MAX VCC = MAX VCC = MAX

0.8 1.2 3.3

V V V

VCC = MAX VCC = MAX

VCC = MAX

FAST AND LS TTL DATA 4-131

MC74F258A
AC CHARACTERISTICS
74F TA = +25C VCC = +5.0 V CL = 50 pF Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Output Disable Time Propagation Delay In to Zn Propagation Delay S to Zn Output Enable Time Parameter Min 2.5 1.0 3.0 2.5 2.0 2.5 2.0 1.5 Max 5.3 4.0 7.5 7.0 6.0 7.0 6.0 6.0 74F TA = 0C to 70C VCC = 5.0 V 10% CL = 50 pF Min 2.0 1.0 3.0 2.5 2.0 2.5 2.0 1.5 Max 6.0 5.0 8.5 8.0 7.0 8.0 7.0 7.0 ns ns ns Unit ns

FUNCTIONAL DESCRIPTION
The F258A is a quad 2-input multiplexer with 3-state outputs. It selects four bits of data from two sources under control of a common Select input (S). When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in inverted form. The F258A is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = OE (I1a S + I0a S) Zb = OE (I1b S + I0b S) Zc = OE (I1c S + I0c S) Zd = OE (I1d S + I0d S) When the Output Enable input (OE) is HIGH, the outputs are forced to a high impedance OFF state. If the outputs of the 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to 3-state devices whose outputs are tied together are designed so there is no overlap.

FAST AND LS TTL DATA 4-132

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