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74LVX157 Low Voltage Quad 2-Input Multiplexer: General Description Features

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74LVX157 Low Voltage Quad 2-Input Multiplexer

May 1993 Revised March 1999

74LVX157 Low Voltage Quad 2-Input Multiplexer


General Description
The LVX157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The LVX157 can also be used as a function generator.

Features
s Input voltage level translation from 5V to 3V s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance

Ordering Code:
Order Number 74LVX157M 74LVX157SJ 74LVX157MTC Package Number M16A M16D MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Devices are also available in Tape and Reel. Specify by appending letter suffix X to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions
Pin Names I0aI0d I1aI1d E S ZaZd Description Source 0 Data Inputs Source 1 Data Inputs Enable Input Select Input Outputs

1999 Fairchild Semiconductor Corporation

DS011608.prf

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74LVX157

Truth Table
Inputs E H L L L L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial

Outputs I0 X X X L H I1 X L H X X Z L L H L H

S X H H L L

Functional Description
The LVX157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The LVX157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = E (I1a S + I0a S) Zb = E (I1b S + I0b S) Zc = E (I1c S + I0c S) Zd = E (I1d S + I0d S) A common use of the LVX157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The LVX157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.

Logic Diagram

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74LVX157

Absolute Maximum Ratings(Note 1)


Supply Voltage (VCC) DC Input Diode Current (IIK) VI = 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = 0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) Power Dissipation 50 mA 65C to +150C 180 mW 25 mA 20 mA +20 mA 0.5V to VCC + 0.5V 20 mA 0.5V to 7V 0.5V to +7.0V

Recommended Operating Conditions (Note 2)


Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Input Rise and Fall Time (t/V) 2.0V to 3.6V 0V to 5.5V 0V to VCC 40C to +85C 0 ns/V to 100 ns/V

Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float.

DC Electrical Characteristics
Symbol VIH Parameter HIGH Level Input Voltage VIL LOW Level Input Voltage VOH HIGH Level Output Voltage VOL LOW Level Output Voltage IIN ICC Input Leakage Current Quiescent Supply Current VCC 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 2.0 3.0 3.0 3.6 3.6 1.9 2.9 2.58 0.0 0.0 0.1 0.1 0.36 0.1 4.0 2.0 3.0 TA = +25C Min 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.48 0.1 0.1 0.44 1.0 40.0 A A V V Typ Max TA = 40C to +85C Min 1.5 2.0 2.4 0.5 0.8 0.8 VIN = VIL or VIH IOH = 50 A IOH = 50 A IOH = 4 mA VIN = V IL or VIH IOL = 50 A IOL = 50 A IOL = 4 mA VIN = 5.5V or GND VIN = VCC or GND V V Max Units Conditions

Noise Characteristics (Note 3)


Symbol VOLP VOLV VIHD VILD Parameter Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum HIGH Level Dynamic Input Voltage Maximum LOW Level Dynamic Input Voltage VCC (V) 3.3 3.3 3.3 3.3 TA = 25C Typ 0.3 0.3 Limit 0.5 0.5 2.0 0.8 V V V V Units CL (pF) 50 50 50 50

Note 3: Input tr = tf = 3ns

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74LVX157

AC Electrical Characteristics
Symbol tPLH tPHL Parameter Propagation Delay Time I n to Zn tPLH tPHL Propagation Delay Time S to Zn tPLH tPHL Propagation Delay Time E to Zn tOSHL tOSLH Output to Output Skew (Note 4) 3.3 0.3 2.7 3.3 3.3 0.3 2.7 3.3 0.3 2.7 V CC (V) 2.7 TA = +25C Min Typ 6.6 9.1 5.1 7.6 8.9 11.4 7.0 9.5 9.1 11.6 7.2 9.7 Max 12.5 16.0 7.9 11.4 16.9 20.4 11.0 14.5 17.6 21.1 11.5 15.0 1.5 1.5 TA = 40C to +85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 15.5 19.0 9.5 13.0 20.5 24.0 13.0 16.5 20.5 24.0 13.5 17.0 1.5 1.5 ns ns ns ns Units CL (pF) 15 50 15 50 15 50 15 50 15 50 15 50 50

Note 4: Parameter guaranteed by design. tOSLH = |tPLHm tPLHn|. tOSHL = |tPHLm tPHLn|.

Capacitance
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance (Note 5) Parameter TA = +25C Min Typ 4 20 Max 10 TA = 40C to +85C Min Max 10 Units pF pF

Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(opr.) = CPD VCC fIN + ICC

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74LVX157

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D

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74LVX157 Low Voltage Quad 2-Input Multiplexer

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16

LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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