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2020 – today
- 2023
[c80]David B. Whalley:
Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache (Keynote). LCTES 2023: 1- [c79]Abigail Mortensen, Scott Pomerville, David B. Whalley, Soner Önder, Gang-Ryung Uh:
Facilitating the Bootstrapping of a New ISA. LCTES 2023: 2-12 - 2022
- [c78]Ashley Gannon
, Mohsen Gavahi, Xin Yuan, David B. Whalley, Sherry A. Southerland, Christine Andrews-Larson, Ellen Granger:
Experience with Integrating Computer Science in Middle School Mathematics. ITiCSE (1) 2022: 40-46 - 2021
- [j37]David B. Whalley, Xin Yuan, Xiuwen Liu:
The domestic computer science graduate students are there, we just need to recruit them. Commun. ACM 64(8): 39-43 (2021) - [j36]Michael Stokes, David B. Whalley, Soner Önder:
Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache. ACM Trans. Archit. Code Optim. 18(3): 28:1-28:22 (2021) - 2020
- [c77]An-I Andy Wang, David B. Whalley, Zhenghao Zhang, Gary S. Tyson:
Experience of Administering Our First S-STEM Program to Broaden Participation in Computer Science. SIGCSE 2020: 535-541
2010 – 2019
- 2019
- [c76]Michael Stokes, Ryan Baird, Zhaoxiang Jin, David B. Whalley, Soner Önder:
Improving Energy Efficiency by Memoizing Data Access Information. ISLPED 2019: 1-6 - 2018
- [c75]Michael Stokes, Ryan Baird, Zhaoxiang Jin, David B. Whalley, Soner Önder:
Decoupling address generation from loads and stores to improve data access energy efficiency. LCTES 2018: 65-75 - 2016
- [c74]Carlos Sanchez, Peter Gavin, Daniel Moreau, Magnus Själander, David B. Whalley, Per Larsson-Edefors, Sally A. McKee:
Redesigning a tagless access buffer to require minimal ISA changes. CASES 2016: 19:1-19:10 - [c73]Yue Chen, Zhi Wang, David B. Whalley, Long Lu:
Remix: On-demand Live Randomization. CODASPY 2016: 50-61 - [c72]Daniel Moreau, Alen Bardizbanyan, Magnus Själander, David B. Whalley, Per Larsson-Edefors:
Practical way halting by speculatively accessing halt tags. DATE 2016: 1375-1380 - [e3]Tei-Wei Kuo, David B. Whalley:
Proceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, Tools, and Theory for Embedded Systems, LCTES 2016, Santa Barbara, CA, USA, June 13 - 14, 2016. ACM 2016, ISBN 978-1-4503-4316-9 [contents] - 2015
- [c71]B. Davis, Ryan Baird, Peter Gavin, Magnus Själander, Ian Finlayson, F. Rasapour, G. Cook, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
Scheduling instruction effects for a statically pipelined processor. CASES 2015: 167-176 - [c70]Ryan Baird, Peter Gavin, Magnus Själander, David B. Whalley, Gang-Ryung Uh:
Optimizing Transfers of Control in the Static Pipeline Architecture. LCTES 2015: 1:1-1:10 - [c69]Alen Bardizbanyan, Magnus Själander, David B. Whalley, Per Larsson-Edefors:
Improving Data Access Efficiency by Using Context-Aware Loads and Stores. LCTES 2015: 3:1-3:10 - 2014
- [c68]David B. Whalley:
Energy efficient data access techniques. ODES@CGO 2014: 1-2 - [c67]Alen Bardizbanyan, Magnus Själander, David B. Whalley, Per Larsson-Edefors:
Reducing set-associative L1 data cache energy by early load data dependence detection (ELD3). DATE 2014: 1-4 - [c66]David B. Whalley:
Energy efficient data access techniques. LCTES 2014: 1 - [c65]An-I Andy Wang, Gary S. Tyson, David B. Whalley, Robert van Engelen, Zhenghao Zhang:
A journey toward obtaining our first NSF S-STEM (scholarship) grant. SIGCSE 2014: 427-432 - 2013
- [j35]Alen Bardizbanyan, Magnus Själander, David B. Whalley, Per Larsson-Edefors:
Designing a practical data filter cache to improve both energy efficiency and performance. ACM Trans. Archit. Code Optim. 10(4): 54:1-54:25 (2013) - [j34]Peter Gavin, David B. Whalley, Magnus Själander:
Reducing instruction fetch energy in multi-issue processors. ACM Trans. Archit. Code Optim. 10(4): 64:1-64:24 (2013) - [c64]Alen Bardizbanyan, Peter Gavin, David B. Whalley, Magnus Själander, Per Larsson-Edefors, Sally A. McKee, Per Stenström:
Improving data access efficiency by using a tagless access buffer (TAB). CGO 2013: 28:1-28:11 - [c63]Alen Bardizbanyan, Magnus Själander, David B. Whalley, Per Larsson-Edefors:
Speculative tag access for reduced energy dissipation in set-associative L1 data caches. ICCD 2013: 302-308 - [c62]Ian Finlayson, Brandon Davis, Peter Gavin, Gang-Ryung Uh, David B. Whalley, Magnus Själander, Gary S. Tyson:
Improving processor efficiency by statically pipelining instructions. LCTES 2013: 33-44 - 2012
- [j33]Ian Finlayson, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
An Overview of Static Pipelining. IEEE Comput. Archit. Lett. 11(1): 17-20 (2012) - [j32]Daniel Chang, Stephen Hines, Paul E. West, Gary S. Tyson, David B. Whalley:
Program Differentiation. J. Circuits Syst. Comput. 21(2) (2012) - 2011
- [c61]Ian Finlayson, Gang-Ryung Uh, David B. Whalley, Gary S. Tyson:
Improving Low Power Processor Efficiency with Static Pipelining. Interaction between Compilers and Computer Architectures 2011: 17-24 - 2010
- [j31]Sibin Mohan, Frank Mueller, Michael Root, William Hawkins, Christopher A. Healy, David B. Whalley, Emilio Vivancos:
Parametric timing analysis and its application to dynamic voltage scaling. ACM Trans. Embed. Comput. Syst. 10(2): 25:1-25:34 (2010) - [c60]Prasad A. Kulkarni, Michael R. Jantz, David B. Whalley:
Improving both the performance benefits and speed of optimization phase sequence searches. LCTES 2010: 95-104
2000 – 2009
- 2009
- [j30]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson:
Practical exhaustive optimization phase order exploration and evaluation. ACM Trans. Archit. Code Optim. 6(1): 1:1-1:36 (2009) - [j29]Per Stenström, David B. Whalley:
Introduction. Trans. High Perform. Embed. Archit. Compil. 2: 3 (2009) - [c59]Stephen Roderick Hines, Yuval Peress, Peter Gavin, David B. Whalley, Gary S. Tyson:
Guaranteeing instruction fetch behavior with a lookahead instruction fetch engine (LIFE). LCTES 2009: 119-128 - 2008
- [j28]Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David B. Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter P. Puschner, Jan Staschulat, Per Stenström:
The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst. 7(3): 36:1-36:53 (2008) - [c58]David B. Whalley, Gary S. Tyson:
Enhancing the effectiveness of utilizing an instruction register file. IPDPS 2008: 1-5 - 2007
- [j27]David B. Whalley:
Guest Editorial. ACM Trans. Embed. Comput. Syst. 6(1): 1 (2007) - [c57]Christopher Zimmer, Stephen Roderick Hines, Prasad A. Kulkarni, Gary S. Tyson, David B. Whalley:
Facilitating compiler optimizations through the dynamic mapping of alternate register structures. CASES 2007: 165-169 - [c56]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson:
Evaluating Heuristic Optimization Phase Order Search Algorithms. CGO 2007: 157-169 - [c55]Joel Coffman, Christopher A. Healy, Frank Mueller, David B. Whalley:
Generalizing parametric timing analysis. LCTES 2007: 152-154 - [c54]Stephen Roderick Hines, Gary S. Tyson, David B. Whalley:
Addressing instruction fetch bottlenecks by using an instruction register file. LCTES 2007: 165-174 - [c53]Stephen Hines, David B. Whalley, Gary S. Tyson:
Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache. MICRO 2007: 433-444 - [c52]Jason Hiser, Jack W. Davidson, David B. Whalley:
Fast, accurate design space exploration of embedded systems memory configurations. SAC 2007: 699-706 - [e2]Koen De Bosschere, David R. Kaeli, Per Stenström, David B. Whalley, Theo Ungerer:
High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings. Lecture Notes in Computer Science 4367, Springer 2007, ISBN 978-3-540-69337-6 [contents] - 2006
- [j26]Wankang Zhao, William C. Kreahling, David B. Whalley, Christopher A. Healy, Frank Mueller:
Improving WCET by applying worst-case path optimizations. Real Time Syst. 34(2): 129-152 (2006) - [j25]Prasad A. Kulkarni, Wankang Zhao, Stephen Hines, David B. Whalley, Xin Yuan, Robert van Engelen, Kyle A. Gallivan, Jason Hiser, Jack W. Davidson, Baosheng Cai, Mark W. Bailey, Hwashin Moon, Kyunghwan Cho, Yunheung Paek:
VISTA: VPO interactive system for tuning applications. ACM Trans. Embed. Comput. Syst. 5(4): 819-863 (2006) - [c51]Stephen Hines, David B. Whalley, Gary S. Tyson:
Adapting compilation techniques to enhance the packing of instructions into registers. CASES 2006: 43-53 - [c50]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson:
Exhaustive Optimization Phase Order Space Exploration. CGO 2006: 306-318 - [c49]Matthew D. Kleffner, Douglas L. Jones, Jason Hiser, Prasad A. Kulkarni, Julie Parent, Stephen Hines, David B. Whalley, Jack W. Davidson, Kyle A. Gallivan:
On the Use of Compilers in DSP Laboratory Instruction. ICASSP (2) 2006: 977-980 - [c48]William C. Kreahling, Stephen Hines, David B. Whalley, Gary S. Tyson:
Reducing the cost of conditional transfers of control by using comparison specifications. LCTES 2006: 64-71 - [c47]Prasad A. Kulkarni, David B. Whalley, Gary S. Tyson, Jack W. Davidson:
In search of near-optimal optimization phase orderings. LCTES 2006: 83-92 - 2005
- [j24]William C. Kreahling, David B. Whalley, Mark W. Bailey, Xin Yuan, Gang-Ryung Uh, Robert van Engelen:
Branch elimination by condition merging. Softw. Pract. Exp. 35(1): 51-74 (2005) - [j23]Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanjay Jinturkar, Yunheung Paek, Vincent Cao, Chris Burns:
Compiler transformations for effectively exploiting a zero overhead loop buffer. Softw. Pract. Exp. 35(4): 393-412 (2005) - [j22]Prasad A. Kulkarni, Stephen Hines, David B. Whalley, Jason Hiser, Jack W. Davidson, Douglas L. Jones:
Fast and efficient searches for effective optimization-phase sequences. ACM Trans. Archit. Code Optim. 2(2): 165-198 (2005) - [j21]Wankang Zhao, David B. Whalley, Christopher A. Healy, Frank Mueller:
Improving WCET by applying a WC code-positioning optimization. ACM Trans. Archit. Code Optim. 2(4): 335-365 (2005) - [c46]Stephen Hines, Prasad A. Kulkarni, David B. Whalley, Jack W. Davidson:
Using de-optimization to re-optimize code. EMSOFT 2005: 114-123 - [c45]R. Clint Whaley, David B. Whalley:
Tuning High Performance Kernels through Empirical Compilation. ICPP 2005: 89-98 - [c44]Stephen Hines, Joshua Green, Gary S. Tyson, David B. Whalley:
Improving Program Efficiency by Packing Instructions into Registers. ISCA 2005: 260-271 - [c43]Stephen Hines, Gary S. Tyson, David B. Whalley:
Reducing Instruction Fetch Cost by Packing Instructions into RegisterWindows. MICRO 2005: 19-29 - [c42]Wankang Zhao, William C. Kreahling, David B. Whalley, Christopher A. Healy, Frank Mueller:
Improving WCET by Optimizing Worst-Case Paths. IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 138-147 - [c41]Sibin Mohan, Frank Mueller, David B. Whalley, Christopher A. Healy:
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family. IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 405-414 - [c40]Sibin Mohan, Frank Mueller, William Hawkins, Michael Root, Christopher A. Healy, David B. Whalley:
ParaScale: Exploiting Parametric Timing Analysis for Real-Time Schedulers and Dynamic Voltage Scaling. RTSS 2005: 233-242 - 2004
- [j20]Robert van Engelen, David B. Whalley, Xin Yuan:
Automatic validation of code-improving transformations on low-level program representations. Sci. Comput. Program. 52: 257-280 (2004) - [j19]Jeonghun Cho, Yunheung Paek, David B. Whalley:
Fast memory bank assignment for fixed-point digital signal processors. ACM Trans. Design Autom. Electr. Syst. 9(1): 52-74 (2004) - [c39]Prasad A. Kulkarni, Stephen Hines, Jason Hiser, David B. Whalley, Jack W. Davidson, Douglas L. Jones:
Fast searches for effective optimization phase sequences. PLDI 2004: 171-182 - [c38]Wankang Zhao, Prasad A. Kulkarni, David B. Whalley, Christopher A. Healy, Frank Mueller, Gang-Ryung Uh:
Tuning the WCET of Embedded Applications. IEEE Real-Time and Embedded Technology and Applications Symposium 2004: 472-481 - [c37]Wankang Zhao, David B. Whalley, Christopher A. Healy, Frank Mueller:
WCET Code Positioning. RTSS 2004: 81-91 - [e1]David B. Whalley, Ron Cytron:
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04), Washington, DC, USA, June 11-13, 2004. ACM 2004, ISBN 1-58113-806-7 [contents] - 2003
- [c36]William C. Kreahling, David B. Whalley, Mark W. Bailey, Xin Yuan, Gang-Ryung Uh, Robert van Engelen:
Branch Elimination via Multi-variable Condition Merging. Euro-Par 2003: 261-270 - [c35]Prasad A. Kulkarni, Wankang Zhao, Hwashin Moon, Kyunghwan Cho, David B. Whalley, Jack W. Davidson, Mark W. Bailey, Yunheung Paek, Kyle A. Gallivan:
Finding effective optimization phase sequences. LCTES 2003: 12-23 - [c34]Robert van Engelen, David B. Whalley, Xin Yuan:
Validation of Code-Improving Transformations for Embedded Systems. SAC 2003: 684-691 - [c33]Reinhard Wilhelm, Jakob Engblom, Stephan Thesing, David B. Whalley:
Industrial Requirements for WCET Tools - Answers to the ARTIST Questionnaire. WCET 2003: 39-43 - 2002
- [j18]Minghui Yang, Gang-Ryung Uh, David B. Whalley:
Efficient and effective branch reordering using profile data. ACM Trans. Program. Lang. Syst. 24(6): 667-697 (2002) - [j17]Christopher A. Healy, David B. Whalley:
Automatic Detection and Exploitation of Branch Constraints for Timing Analysis. IEEE Trans. Software Eng. 28(8): 763-781 (2002) - [c32]Jeonghun Cho, Yunheung Paek, David B. Whalley:
Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms. LCTES-SCOPES 2002: 130-138 - [c31]Wankang Zhao, Baosheng Cai, David B. Whalley, Mark W. Bailey, Robert van Engelen, Xin Yuan, Jason Hiser, Jack W. Davidson, Kyle A. Gallivan, Douglas L. Jones:
VISTA: a system for interactive code improvement. LCTES-SCOPES 2002: 155-164 - 2001
- [j16]John M. Mellor-Crummey, David B. Whalley, Ken Kennedy:
Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings. Int. J. Parallel Program. 29(3): 217-247 (2001) - [c30]Apan Qasem, David B. Whalley, Xin Yuan, Robert van Engelen:
Using a Swap Instruction to Coalesce Loads and Stores. Euro-Par 2001: 235-240 - [c29]John M. Mellor-Crummey, Robert J. Fowler, David B. Whalley:
Tools for application-oriented performance tuning. ICS 2001: 154-165 - [c28]Emilio Vivancos, Christopher A. Healy, Frank Mueller, David B. Whalley:
Parametric Timing Analysis. LCTES/OM 2001: 88-93 - [c27]Emilio Vivancos, Christopher A. Healy, Frank Mueller, David B. Whalley:
Parametric Timing Analysis. OM@PLDI 2001: 88-93 - [c26]John M. Mellor-Crummey, Robert J. Fowler, David B. Whalley:
On providing useful information for analyzing and tuning applications. SIGMETRICS/Performance 2001: 332-333 - 2000
- [j15]Christopher A. Healy, Mikael Sjödin, Viresh Rustagi, David B. Whalley, Robert van Engelen:
Supporting Timing Analysis by Automatic Bounding of Loop Iterations. Real Time Syst. 18(2/3): 129-156 (2000) - [c25]Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanjay Jinturkar, Chris Burns, Vincent Cao:
Techniques for Effectively Exploiting a Zero Overhead Loop Buffer. CC 2000: 157-172 - [c24]Robert van Engelen, David B. Whalley, Xin Yuan:
Automatic Validation of Code-Improving Transformations. LCTES 2000: 206-210
1990 – 1999
- 1999
- [j14]Randall T. White, Frank Mueller, Christopher A. Healy, David B. Whalley, Marion G. Harmon:
Timing Analysis for Data and Wrap-Around Fill Caches. Real Time Syst. 17(2-3): 209-233 (1999) - [j13]Lo Ko, Naghan Al-Yaqoubi, Christopher A. Healy, Emily Ratliff, Robert D. Arnold, David B. Whalley, Marion G. Harmon:
Timing Constraint Specification and Analysis. Softw. Pract. Exp. 29(1): 77-98 (1999) - [j12]Gang-Ryung Uh, David B. Whalley:
Effectively Exploiting Indirect Jumps. Softw. Pract. Exp. 29(12): 1061-1101 (1999) - [j11]Christopher A. Healy, Robert D. Arnold, Frank Mueller, David B. Whalley, Marion G. Harmon:
Bounding Pipeline and Instruction Cache Performance. IEEE Trans. Computers 48(1): 53-70 (1999) - [c23]John M. Mellor-Crummey, David B. Whalley, Ken Kennedy:
Improving memory hierarchy performance for irregular applications. International Conference on Supercomputing 1999: 425-433 - [c22]Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanjay Jinturkar, Chris Burns, Vincent Cao:
Effective Exploitation of a Zero Overhead Loop Buffer. Workshop on Languages, Compilers, and Tools for Embedded Systems 1999: 10-19 - [c21]Christopher A. Healy, David B. Whalley:
Tighter Timing Predictions by Automatic Detection and Exploitation of Value-Dependent Constraints. IEEE Real Time Technology and Applications Symposium 1999: 79-88 - 1998
- [c20]Richard L. Bowman, Emily Ratliff, David B. Whalley:
Decreasing Process Memory Requirements by Overlapping Program Portions. HICSS (7) 1998: 115-125 - [c19]Minghui Yang, Gang-Ryung Uh, David B. Whalley:
Improving Performance by Branch Reordering. PLDI 1998: 130-141 - [c18]Christopher A. Healy, Mikael Sjödin, Viresh Rustagi, David B. Whalley:
Bounding Loop Iterations for Timing Analysis. IEEE Real Time Technology and Applications Symposium 1998: 12-21 - 1997
- [c17]Randall T. White, Christopher A. Healy, David B. Whalley, Frank Mueller, Marion G. Harmon:
Timing Analysis for Data Caches and Set-Associative Caches. IEEE Real Time Technology and Applications Symposium 1997: 192-202 - [c16]Gang-Ryung Uh, David B. Whalley:
Coalescing Conditional Branches into Efficient Indirect Jumps. SAS 1997: 315-329 - 1996
- [c15]Lo Ko, Christopher A. Healy, Emily Ratliff, Robert D. Arnold, David B. Whalley, Marion G. Harmon:
Supporting the specification and analysis of timing constraints. IEEE Real Time Technology and Applications Symposium 1996: 170-178 - 1995
- [j10]Mickey R. Boyd, David B. Whalley:
Graphical visualization of compiler optimizations. J. Program. Lang. 3(2) (1995) - [j9]Jeffrey S. Snyder, David B. Whalley, Theodore P. Baker:
Fast context switches: compiler and architectural support for preemptive scheduling. Microprocess. Microsystems 19(1): 35-42 (1995) - [c14]Frank Mueller, David B. Whalley:
Fast instruction cache analysis via static cache simulation. Annual Simulation Symposium 1995: 105-114 - [c13]Lo Ko, David B. Whalley, Marion G. Harmon:
Supporting User-Friendly Analysis of Timing Constraints. Workshop on Languages, Compilers, & Tools for Real-Time Systems 1995: 99-107 - [c12]Richard Gerber, Steven W. K. Tjiang, David B. Whalley, David N. Wilner, Michael Wolfe:
Appropriate Interfaces Between Design Tools, Languages, Compilers and Runtimes in Real-Time Systems (Panel). Workshop on Languages, Compilers, & Tools for Real-Time Systems 1995: 124 - [c11]Frank Mueller, David B. Whalley:
Avoiding Conditional Branches by Code Replication. PLDI 1995: 56-66 - [c10]Christopher A. Healy, David B. Whalley, Marion G. Harmon:
Integrating the Timing Analysis of Pipelining and Instruction Caching. RTSS 1995: 288-297 - 1994
- [j8]Marion G. Harmon, Theodore P. Baker, David B. Whalley:
A Retargetable Technique for Predicting Execution Time of Code Segments. Real Time Syst. 7(2): 159-182 (1994) - [j7]David B. Whalley:
Automatic Isolation of Compiler Errors. ACM Trans. Program. Lang. Syst. 16(5): 1648-1659 (1994) - [c9]Frank Mueller, David B. Whalley, Marion G. Harmon:
Real-Time Debugging by Minimal Hardware Simulation. PEARL 1994: 68-76 - [c8]Robert D. Arnold, Frank Mueller, David B. Whalley, Marion G. Harmon:
Bounding Worst-Case Instruction Cache Performance. RTSS 1994: 172-181 - [c7]Frank Mueller, David B. Whalley:
Efficient On-the-fly Analysis of Program Behavior and Static Cache Simulation. SAS 1994: 101-115 - 1993
- [j6]David B. Whalley:
Techniques for Fast Instruction Cache Performance Evaluation. Softw. Pract. Exp. 23(1): 95-118 (1993) - [c6]Mickey R. Boyd, David B. Whalley:
Isolation and Analysis of Optimization Errors. PLDI 1993: 26-35 - 1992
- [j5]Jack W. Davidson, David B. Whalley:
A design environment for addressing architecture and compiler interactions. Inf. Softw. Technol. 34(11): 707-720 (1992) - [j4]Jack W. Davidson, John R. Rabung, David B. Whalley:
Relating Static and Dynamic Machine Code Measurements. IEEE Trans. Computers 41(4): 444-454 (1992) - [c5]Frank Mueller, David B. Whalley:
Avoiding Unconditional Jumps by Code Replication. PLDI 1992: 322-330 - [c4]Marion G. Harmon, Theodore P. Baker, David B. Whalley:
A Retargetable Technique for Predicting Execution Time. RTSS 1992: 68-77 - [c3]David B. Whalley:
Fast Instruction Cache Performance Evaluation Using Compile-Time Analysis. SIGMETRICS 1992: 13-22 - 1991
- [j3]Jack W. Davidson, David B. Whalley:
A design environment for addressing architecture and compiler interactions. Microprocess. Microsystems 15(9): 459-472 (1991) - [j2]Jack W. Davidson, David B. Whalley:
Methods for Saving and Restoring Register Values across Function Calls. Softw. Pract. Exp. 21(2): 149-165 (1991) - 1990
- [c2]Jack W. Davidson, David B. Whalley:
Reducing the Cost of Branches by Using Registers. ISCA 1990: 182-191 - [c1]Jack W. Davidson, David B. Whalley:
Ease: An Environment for Architecture Study and Experimentation. SIGMETRICS 1990: 259-260
1980 – 1989
- 1989
- [j1]Jack W. Davidson, David B. Whalley:
Quick Compilers Using Peephole Optimization. Softw. Pract. Exp. 19(1): 79-97 (1989)
Coauthor Index
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