research-article

On-chip traffic modeling and synthesis for MPEG-2 video applications

Authors:

Girish V. Varatkar,

Radu MarculescuAuthors Info & Claims

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 12, Issue 1

Pages 108 - 119

https://doi.org/10.1109/TVLSI.2003.820523

Published: 01 January 2004 Publication History

Abstract

The objective of this paper is to introduce self-similarity as a fundamental property exhibited by the bursty traffic between on-chip modules in typical MPEG-2 video applications. Statistical tests performed on relevant traces extracted from common video clips establish unequivocally the existence of self-similarity in video traffic. Using a generic tile-based communication architecture, we discuss the implications of our findings on on-chip buffer space allocation and present quantitative evaluations for typical video streams. We also describe a technique for synthetically generating traces having statistical properties similar to those obtained from real video clips. Our proposed technique speeds up buffer simulations, allows media system designers to explore architectures rapidly and use large media data benchmarks more efficiently. We believe that our findings open new directions of research with deep implications on some fundamental issues in on-chip networks design for multimedia applications.

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Cited By

Ponnan SKumar TVS HNatarajan SShah M(2022)Congestion aware low power on chip protocols with network on chip with cloud securityJournal of Cloud Computing: Advances, Systems and Applications10.1186/s13677-022-00307-411:1Online publication date: 9-Sep-2022
https://dl.acm.org/doi/10.1186/s13677-022-00307-4
Bhowmik BBiswas SDeka JBhattacharya B(2019)A Low-Cost Test Solution for Reliable Communication in Networks-on-ChipJournal of Electronic Testing: Theory and Applications10.1007/s10836-019-05792-135:2(215-243)Online publication date: 1-Apr-2019
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On-chip traffic modeling and synthesis for MPEG-2 video applications

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cover image IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Volume 12, Issue 1

January 2004

122 pages

ISSN:1063-8210

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Copyright © 2004.

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IEEE Educational Activities Department

United States

Publication History

Published: 01 January 2004

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Cited By

Ponnan SKumar TVS HNatarajan SShah M(2022)Congestion aware low power on chip protocols with network on chip with cloud securityJournal of Cloud Computing: Advances, Systems and Applications10.1186/s13677-022-00307-411:1Online publication date: 9-Sep-2022
https://dl.acm.org/doi/10.1186/s13677-022-00307-4
Bhowmik BBiswas SDeka JBhattacharya B(2019)A Low-Cost Test Solution for Reliable Communication in Networks-on-ChipJournal of Electronic Testing: Theory and Applications10.1007/s10836-019-05792-135:2(215-243)Online publication date: 1-Apr-2019
https://dl.acm.org/doi/10.1007/s10836-019-05792-1
Romanov AIvannikov A(2018)SystemC Language Usage as the Alternative to the HDL and High-level Modeling for NoC SimulationInternational Journal of Embedded and Real-Time Communication Systems10.4018/IJERTCS.20180701029:2(18-31)Online publication date: 1-Jul-2018
https://dl.acm.org/doi/10.4018/IJERTCS.2018070102
Gupta UBabu MAyoub RKishinevsky MPaterna FGumussoy SOgras U(2018)An Online Learning Methodology for Performance Modeling of Graphics ProcessorsIEEE Transactions on Computers10.1109/TC.2018.284071067:12(1677-1691)Online publication date: 1-Dec-2018
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Chaurasia ASehgal V(2017)Performance of Gaussian and Non-Gaussian Synthetic Traffic on Networks-on-ChipInternational Journal of Multimedia Data Engineering & Management10.4018/IJMDEM.20170401048:2(33-42)Online publication date: 1-Apr-2017
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Lu ZYao Y(2017)Dynamic Traffic Regulation in NoC-Based SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2016.258478125:2(556-569)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1109/TVLSI.2016.2584781
Manna KSwami SChattopadhyay SSengupta I(2016)Integrated Through-Silicon Via Placement and Application Mapping for 3D Mesh-Based NoC DesignACM Transactions on Embedded Computing Systems10.1145/296844616:1(1-25)Online publication date: 3-Nov-2016
https://dl.acm.org/doi/10.1145/2968446
Qian ZBogdan PTsui CMarculescu R(2016)Performance Evaluation of NoC-Based Multicore SystemsACM Transactions on Design Automation of Electronic Systems10.1145/287063321:3(1-38)Online publication date: 11-May-2016
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Romanov AIvannikov A(2016)SystemC NoC simulation as the alternative to the HDL and high-level modelingProceedings of the 18th Conference of Open Innovations Association FRUCT10.1109/FRUCT-ISPIT.2016.7561540(285-290)Online publication date: 25-Apr-2016
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(2016)Synthesis of dependency-aware traffic generators from NoC simulation tracesJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2016.10.00471:C(102-113)Online publication date: 1-Nov-2016
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