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MNFTL: An Efficient Flash Translation Layer for MLC NAND Flash Memory

Published: 12 August 2020 Publication History
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  • Abstract

    The write constraints of Multi-Level Cell (MLC) NAND flash memory make most of the existing flash translation layer (FTL) schemes inefficient or inapplicable. In this article, we solve several fundamental problems in the design of MLC flash translation layer. The objective is to reduce the garbage collection overhead to reduce the average system response time. We make the key observation that the valid pages copy is the essential garbage collection overhead. Based on this observation, we propose two approaches, namely, concentrated mapping and postponed reclamation, to effectively reduce the valid pages copy. Besides, we propose a progressive garbage collection that can well utilize the system idle time to reclaim more spaces. We conduct a series of experiments on an embedded developing board with a set of benchmarks. The experimental results show that our scheme can achieve a significant reduction in the average system response time compared with the previous work.

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    Published In

    cover image ACM Transactions on Design Automation of Electronic Systems
    ACM Transactions on Design Automation of Electronic Systems  Volume 25, Issue 6
    November 2020
    164 pages
    ISSN:1084-4309
    EISSN:1557-7309
    DOI:10.1145/3417499
    Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 12 August 2020
    Online AM: 07 May 2020
    Accepted: 01 April 2020
    Revised: 01 March 2020
    Received: 01 September 2019
    Published in TODAES Volume 25, Issue 6

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    Author Tags

    1. MLC NAND flash memory
    2. address mapping
    3. flash translation layer
    4. garbage collection

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    • Research-article
    • Research
    • Refereed

    Funding Sources

    • National Natural Science Foundation of China
    • Shenzhen Science and Technology Foundation
    • Guangdong Basic and Applied Basic Research Foundation
    • Research Grants Council of the Hong Kong Special Administrative Region, China
    • Fundamental Research Funds of Shandong University
    • Scientific Research Platforms and Projects in Universities in Guangdong Province
    • Direct Grant for Research, The Chinese University of Hong Kong
    • Natural Science Foundation of Tianjin

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    • (2023)SoftSSD: enabling rapid flash firmware prototyping for solid-state drives基于SoftSSD的快速固态硬盘固件原型开发Frontiers of Information Technology & Electronic Engineering10.1631/FITEE.220045624:5(659-674)Online publication date: 2-Jun-2023
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