article

Stairway compaction using corner block list and its applications with rectilinear blocks

Authors:

Chung-Kuan Cheng,

Jun GuAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 9, Issue 2

Pages 199 - 211

https://doi.org/10.1145/989995.989998

Published: 01 April 2004 Publication History

Abstract

Corner Block List (CBL) was recently proposed as an efficient representation for MOSAIC packing of rectangles. Although the original method is really innovative, there still remains room for improvement for our purpose. This article proposes a compact algorithm for placement based on corner block list. By introducing the dummy blocks in CBL, our algorithm can intellectively employ dummy blocks in the packing to represent the placement including empty rooms, which corner block list cannot represent. Our algorithm can obtain the fast convergence to an optimal solution. Based on the compact approach, we propose a new way to handle arbitrary shaped rectilinear modules. The experimental results are demonstrated by some benchmark data and the performance shows effectiveness of the proposed method.

References

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Cited By

Hu YHashimoto HImahori SUno TYagiura M(2016)A PARTITION-BASED HEURISTIC ALGORITHM FOR THE RECTILINEAR BLOCK PACKING PROBLEMJournal of the Operations Research Society of Japan10.15807/jorsj.59.11059:1(110-129)Online publication date: 2016
https://doi.org/10.15807/jorsj.59.110
Yuchun Ma Xianlong Hong Sheqin Dong Song Chen Chung-Kuan Cheng (2005)Performance Constrained Floorplanning Based on Partial Clustering2005 IEEE International Symposium on Circuits and Systems10.1109/ISCAS.2005.1464974(1863-1866)Online publication date: 2005
https://doi.org/10.1109/ISCAS.2005.1464974
Xuliang Zhang Kajitani Y(2004)Theory of T-junction floorplans in terms of single-sequence2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)10.1109/ISCAS.2004.1329532(V-341-V-344)Online publication date: 2004
https://doi.org/10.1109/ISCAS.2004.1329532

Index Terms

Stairway compaction using corner block list and its applications with rectilinear blocks
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement
      2. Wire routing

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 9, Issue 2

April 2004

139 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/989995

Issue’s Table of Contents

Copyright © 2004 ACM.

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 April 2004

Published in TODAES Volume 9, Issue 2

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Cited By

Hu YHashimoto HImahori SUno TYagiura M(2016)A PARTITION-BASED HEURISTIC ALGORITHM FOR THE RECTILINEAR BLOCK PACKING PROBLEMJournal of the Operations Research Society of Japan10.15807/jorsj.59.11059:1(110-129)Online publication date: 2016
https://doi.org/10.15807/jorsj.59.110
Yuchun Ma Xianlong Hong Sheqin Dong Song Chen Chung-Kuan Cheng (2005)Performance Constrained Floorplanning Based on Partial Clustering2005 IEEE International Symposium on Circuits and Systems10.1109/ISCAS.2005.1464974(1863-1866)Online publication date: 2005
https://doi.org/10.1109/ISCAS.2005.1464974
Xuliang Zhang Kajitani Y(2004)Theory of T-junction floorplans in terms of single-sequence2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)10.1109/ISCAS.2004.1329532(V-341-V-344)Online publication date: 2004
https://doi.org/10.1109/ISCAS.2004.1329532

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