research-article

Using NoC routers as processing elements

Authors:

Sílvio Fernandes,

Bruno C. Oliveira,

Ivan Saraiva SilvaAuthors Info & Claims

SBCCI '09: Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes

Article No.: 24, Pages 1 - 6

https://doi.org/10.1145/1601896.1601927

Published: 31 August 2009 Publication History

Abstract

The integration technology has increased at the point where the development of Multi-Core processor architectures is a market reality nowadays. In this scenario, the interconnection network has a critical function when the number of cores increases, becoming impossible to use bus-based solutions. This paper approaches this problem with a new NoC-based architecture and a new computation mode. It proposes the utilization of network-onchip not only as an interconnection network but as well the processing datapath, which has great power of parallelism.

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Cited By

Kandemir MRyoo JTang XKarakoy MLee JPetrank E(2021)Compiler support for near data computingProceedings of the 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/3437801.3441600(90-104)Online publication date: 17-Feb-2021
https://dl.acm.org/doi/10.1145/3437801.3441600
Shantharama PThyagaturu AReisslein M(2020)Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research StudiesIEEE Access10.1109/ACCESS.2020.30082508(132021-132085)Online publication date: 2020
https://doi.org/10.1109/ACCESS.2020.3008250
Nunes DFernandes SKreutz M(2019)Optimizing an Architecture with Software Pipelining Strategies2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC.2019.8920368(299-304)Online publication date: Oct-2019
https://doi.org/10.1109/VLSI-SoC.2019.8920368
Show More Cited By

Index Terms

Using NoC routers as processing elements
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Reconfigurable computing
      2. Self-organizing autonomic computing
    2. Serial architectures
      1. Pipeline computing

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Published In

cover image ACM Conferences

SBCCI '09: Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes

August 2009

325 pages

ISBN:9781605587059

DOI:10.1145/1601896

General Chair:
Ivan Saraiva
UFRN, Brazil
,
Program Chairs:
Renato Perez Ribas
UFRGS, Brazil
,
Calvin Plett
Carleton University, Canada

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

SBC: Brazilian Computer Society
SIGDA: ACM Special Interest Group on Design Automation
SBMICRO: Brazilian Microelectronics Society
IEEE Circuits & Systems Society

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 31 August 2009

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SBCCI '09

Sponsor:

SBC
SIGDA
SBMICRO

SBCCI '09: 22nd Symposium on Integrated Circuits and System Design

August 31 - September 3, 2009

Natal, Brazil

Acceptance Rates

SBCCI '09 Paper Acceptance Rate 50 of 119 submissions, 42%;

Overall Acceptance Rate 133 of 347 submissions, 38%

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Cited By

Kandemir MRyoo JTang XKarakoy MLee JPetrank E(2021)Compiler support for near data computingProceedings of the 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming10.1145/3437801.3441600(90-104)Online publication date: 17-Feb-2021
https://dl.acm.org/doi/10.1145/3437801.3441600
Shantharama PThyagaturu AReisslein M(2020)Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research StudiesIEEE Access10.1109/ACCESS.2020.30082508(132021-132085)Online publication date: 2020
https://doi.org/10.1109/ACCESS.2020.3008250
Nunes DFernandes SKreutz M(2019)Optimizing an Architecture with Software Pipelining Strategies2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)10.1109/VLSI-SoC.2019.8920368(299-304)Online publication date: Oct-2019
https://doi.org/10.1109/VLSI-SoC.2019.8920368
Soares TSilva IFernandes Sde Lima RCunha APlett Cde Oliveira W(2015)IPNoSys IIProceedings of the 28th Symposium on Integrated Circuits and Systems Design10.1145/2800986.2801012(1-7)Online publication date: 31-Aug-2015
https://dl.acm.org/doi/10.1145/2800986.2801012

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