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Scheduling Globally Asynchronous Locally Synchronous Programs for Guaranteed Response Times

Published: 24 June 2015 Publication History

Abstract

Safety-critical software systems need to guarantee functional correctness and bounded response times to external input events. Programs designed using reactive programming languages, based on formal mathematical semantics, can be automatically verified for functional correctness guarantees. Real-time guarantees on the other hand are much harder to achieve. In this article we provide a static analysis framework for guaranteeing response times for reactive programs developed using the Globally Asynchronous Locally Synchronous (GALS) model of computation. The proposed approach is applicable to scheduling of GALS programs for different target architectures with single or multiple processors or cores. A Satisfiability Modulo Theory (SMT) formulation in the quantifier free linear real arithmetic (QF_LRA) logic is used for scheduling. A novel technique to encode rendezvous used in synchronization of globally asynchronous processes in the presence of locally synchronous parallelism and arbitrary preemption into QF_LRA logic is presented. Finally, our SMT formulation is shown to produce schedules in reasonable time.

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Cited By

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  • (2016)Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-core Processor2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)10.1109/MCSoC.2016.34(233-240)Online publication date: Sep-2016
  • (2015)Compiling and verifying SC-SystemJ programs for safety-critical reactive systemsComputer Languages, Systems and Structures10.1016/j.cl.2015.08.00644:PC(251-282)Online publication date: 1-Dec-2015
  • (undefined)A heterogeneous multi-core SoC for mixed criticality industrial automation systems2016 IEEE 21st International Conference on Emerging Technologies and Factory Automation (ETFA)10.1109/ETFA.2016.7733519(1-4)

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 20, Issue 3
June 2015
345 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/2796316
  • Editor:
  • Naehyuck Chang
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 24 June 2015
Accepted: 01 February 2015
Revised: 01 December 2014
Received: 01 July 2014
Published in TODAES Volume 20, Issue 3

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Author Tags

  1. SystemJ
  2. response time analysis
  3. satisfiability modulo theories
  4. worst-case reaction time

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  • (2016)Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-core Processor2016 IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)10.1109/MCSoC.2016.34(233-240)Online publication date: Sep-2016
  • (2015)Compiling and verifying SC-SystemJ programs for safety-critical reactive systemsComputer Languages, Systems and Structures10.1016/j.cl.2015.08.00644:PC(251-282)Online publication date: 1-Dec-2015
  • (undefined)A heterogeneous multi-core SoC for mixed criticality industrial automation systems2016 IEEE 21st International Conference on Emerging Technologies and Factory Automation (ETFA)10.1109/ETFA.2016.7733519(1-4)

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