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Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference

Authors:

Hsiang-Yun Cheng,

Mary Jane Irwin,

Yuan XieAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 21, Issue 1

Article No.: 7, Pages 1 - 26

https://doi.org/10.1145/2753757

Published: 02 December 2015 Publication History

Abstract

Main memory latencies have become a major performance bottleneck for chip-multiprocessors (CMPs). Since reads are on the critical path, existing memory controllers prioritize reads over writes. However, writes must be eventually processed when the write queue is full. These writes are serviced in a burst to reduce the bus turnaround delay and increase the row-buffer locality. Unfortunately, a large number of reads may suffer long queuing delay when the burst-writes are serviced. The long write latency of future nonvolatile memory will further exacerbate the long queuing delay of reads during burst-writes.

In this article, we propose a run-time mechanism, Adaptive Burst-Writes (ABW), to reduce the queuing delay of reads. Based on the row-buffer hit rate of writes and the arrival rate of reads, we dynamically control the number of writes serviced in a burst to trade off the write service time and the queuing latency of reads. For prompt adjustment, our history-based mechanism further terminates the burst-writes earlier when the row-buffer hit rate of writes in the previous burst-writes is low. As a result, our policy improves system throughput by up to 28% (average 10%) and 43% (average 14%) in CMPs with DRAM-based and PCM-based main memory.

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Cited By

Aswathy NKapoor HSarkar A(2021)A Soft Real-time Memory Request Scheduler for Phase Change Memory Systems2021 IEEE 27th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)10.1109/RTCSA52859.2021.00021(109-118)Online publication date: Aug-2021
https://doi.org/10.1109/RTCSA52859.2021.00021
Rakshit JMohanram K(2018)ReadPRO: Read Prioritization Scheduling in ORAM for Efficient Obfuscation in Main Memories2018 IEEE 36th International Conference on Computer Design (ICCD)10.1109/ICCD.2018.00024(100-107)Online publication date: Oct-2018
https://doi.org/10.1109/ICCD.2018.00024

Index Terms

Adaptive Burst-Writes (ABW): Memory Requests Scheduling to Reduce Write-Induced Interference
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 21, Issue 1

November 2015

464 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/2852253

Editor:
Naehyuck Chang
Korea Advanced Institute of Science and Technology, Korea

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Copyright © 2015 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 02 December 2015

Accepted: 01 March 2015

Revised: 01 February 2015

Received: 01 October 2014

Published in TODAES Volume 21, Issue 1

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Cited By

Aswathy NKapoor HSarkar A(2021)A Soft Real-time Memory Request Scheduler for Phase Change Memory Systems2021 IEEE 27th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)10.1109/RTCSA52859.2021.00021(109-118)Online publication date: Aug-2021
https://doi.org/10.1109/RTCSA52859.2021.00021
Rakshit JMohanram K(2018)ReadPRO: Read Prioritization Scheduling in ORAM for Efficient Obfuscation in Main Memories2018 IEEE 36th International Conference on Computer Design (ICCD)10.1109/ICCD.2018.00024(100-107)Online publication date: Oct-2018
https://doi.org/10.1109/ICCD.2018.00024

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