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Hardware Trojans: Lessons Learned after One Decade of Research

Published: 27 May 2016 Publication History

Abstract

Given the increasing complexity of modern electronics and the cost of fabrication, entities from around the globe have become more heavily involved in all phases of the electronics supply chain. In this environment, hardware Trojans (i.e., malicious modifications or inclusions made by untrusted third parties) pose major security concerns, especially for those integrated circuits (ICs) and systems used in critical applications and cyber infrastructure. While hardware Trojans have been explored significantly in academia over the last decade, there remains room for improvement. In this article, we examine the research on hardware Trojans from the last decade and attempt to capture the lessons learned. A comprehensive adversarial model taxonomy is introduced and used to examine the current state of the art. Then the past countermeasures and publication trends are categorized based on the adversarial model and topic. Through this analysis, we identify what has been covered and the important problems that are underinvestigated. We also identify the most critical lessons for those new to the field and suggest a roadmap for future hardware Trojan research.

References

[1]
J. Aarestad, D. Acharyya, R. Rad, and J. Plusquellic. 2010. Detecting Trojans through leakage current analysis using multiple supply pad IDDQ. IEEE Transactions on Information Forensics and Security 5, 4 (Dec. 2010), 893--904.
[2]
S. Adee. 2008. The hunt for the kill switch. IEEE Spectrum 45, 5 (May 2008), 34--39. 10.1109/MSPEC.2008.4505310
[3]
D. Agrawal, S. Baktir, D. Karakoyunlu, P. Rohatgi, and B. Sunar. 2007. Trojan detection using IC fingerprinting. In Proceedings of the IEEE Symposium on Security and Privacy, 2007 (SP’07). 296--310.
[4]
M. Banga and M. S. Hsiao. 2009. A novel sustained vector technique for the detection of hardware Trojans. In Proceedings of the 2009 22nd International Conference on VLSI Design. 327--332.
[5]
C. Bao, D. Forte, and A. Srivastava. 2014. On application of one-class SVM to reverse engineering-based hardware Trojan detection. In Proceedings of the 2014 15th International Symposium on Quality Electronic Design (ISQED’14). 47--54.
[6]
A. Baumgarten, A. Tyagi, and J. Zambreno. 2010. Preventing IC piracy using reconfigurable logic barriers. IEEE Design Test of Computers 27, 1 (Jan. 2010), 66--75.
[7]
M. Beaumont, B. Hopkins, and T. Newby. 2012. SAFER PATH: Security architecture using fragmented execution and replication for protection against Trojaned hardware. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’12). 1000--1005. 1109/DATE.2012.6176642
[8]
S. Bhunia, M. S. Hsiao, M. Banga, and S. Narasimhan. 2014. Hardware Trojan attacks: Threat analysis and countermeasures. Proceedings of the IEEE 102, 8 (Aug. 2014), 1229--1247. 10.1109/JPROC.2014.2334493
[9]
Y. Bi, P.-E. Gaillardon, X. S. Hu, M. Niemier, J.-S. Yuan, and Y. Jin. 2014. Leveraging emerging technology for hardware security - case study on silicon nanowire FETs and graphene SymFETs. In Proceedings of the 2014 IEEE 23rd Asian Test Symposium (ATS’14). 342--347.
[10]
G. Bloom, B. Narahari, and R. Simha. 2009. OS support for detecting Trojan circuit attacks. In Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009 (HOST’09). 100--103.
[11]
Cadence. 2011. 3D ICs with TSVs - design challenges and requirements. Retrieved from http://www.europractice.stfc.ac.uk/vendors/cadence_3DIC_wp.pdf.
[12]
Y. Cao, C.-H. Chang, and S. Chen. 2013. Cluster-based distributed active current timer for hardware Trojan detection. In Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS’13). 1010--1013.
[13]
B. Cha and S. K. Gupta. 2012. Efficient Trojan detection via calibration of process variations. In Proceedings of the 2012 IEEE 21st Asian Test Symposium (ATS’12). 355--361. 10.1109/ATS.2012.64
[14]
B. Cha and S. K. Gupta. 2014. A resizing method to minimize effects of hardware Trojans. In Proceedings of the 2014 IEEE 23rd Asian Test Symposium (ATS’14). 192--199.
[15]
R. S. Chakraborty and S. Bhunia. 2009. Security against hardware Trojan through a novel application of design obfuscation. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers, 2009 (ICCAD’09). 113--116.
[16]
R. S. Chakraborty, F. Wolff, S. Paul, C. Papachristou, and S. Bhunia. 2009. MERO: A statistical approach for hardware Trojan detection. In Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems (CHES’09). Springer-Verlag, Berlin, 396--410.
[17]
A. Chidley. 2014. Use COTS parts to cut costs in military and aerospace systems. Electronic Design Magazine Retrieved from http://electronicdesign.com/components/use-cots-parts-cut-costs-military-and-aerospace-systems.
[18]
Cisco. 2005. Defense agencies meet readiness challenges with commercial off the shelf (COTS)-based systems. Retrieved from http://www.cisco.com/c/dam/en_us/solutions/industries/docs/gov/space_COTS_v2.pdf.
[19]
R. P. Cocchi, J. P. Baukus, L. W. Chow, and B. J. Wang. 2014. Circuit camouflage integration for hardware IP protection. In Proceedings of the 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC’14). 1--5.
[20]
DIGITIMES. 2012. Trends in the global IC design service market. Retrieved from http://www.digitimes.com/ news/a20120313RS400.html?chid=2.
[21]
J. Dubeuf, D. Hely, and R. Karri. 2013. Run-time detection of hardware Trojans: The processor protection unit. In Proceedings of the 2013 18th IEEE European Test Symposium (ETS’13). 1--6.
[22]
C. Dunbar and G. Qu. 2014. Designing trusted embedded systems from finite state machines. ACM Transactions on Embedded Computing Systems 13, 5s, Article 153 (Oct. 2014), 20 pages.
[23]
D. Forte, Chongxi Bao, and A. Srivastava. 2013. Temperature tracking: An innovative run-time approach for hardware Trojan detection. In Proceedings of the 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’13). 532--539.
[24]
S. R. Hasan, S. F. Mossa, O. S. A. Elkeelany, and F. Awwad. 2015. Tenacious hardware Trojans due to high temperature in middle tiers of 3-D ICs. In Proceedings of the 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS’15). 1--4.
[25]
W. Herr. 2015. Keynote talk: Is it safe? In Proceedings of the 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’15).
[26]
M. Hicks, M. Finnicum, S. T. King, M. Martin, and J. M. Smith. 2010. Overcoming an untrusted computing base: Detecting and removing malicious hardware automatically. In Proceedings of the 2010 IEEE Symposium on Security and Privacy (SP’10). 159--172.
[27]
B. Hill, R. Karmazin, C. T. O. Otero, J. Tse, and R. Manohar. 2013. A split-foundry asynchronous FPGA. In Proceedings of the 2013 IEEE Custom Integrated Circuits Conference (CICC’13). 1--4.
[28]
IARPA. 2011. Trusted integrated circuits (TIC) program announcement. Retrieved from http://www.fbo.gov.
[29]
F. Imeson, A. Emtenan, S. Garg, and M. V. Tripunitara. 2013. Securing computer hardware using 3D integrated circuit (IC) technology and split manufacturing for obfuscation. In Proceedings of the 22nd USENIX Conference on Security (SEC’13). USENIX Association, Berkeley, CA, 495--510.
[30]
M. Jagasivamani, P. Gadfort, M. Sika, M. Bajura, and M. Fritze. 2014. Split-fabrication obfuscation: Metrics and techniques. In Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’14). 7--12.
[31]
Y. Jin and Y. Makris. 2008. Hardware Trojan detection using path delay fingerprint. In Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008 (HOST’08). 51--57.
[32]
Y. Jin, D. Maliuk, and Y. Makris. 2012. Post-deployment trust evaluation in wireless cryptographic ICs. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’12). 965--970.
[33]
Y. Jin and D. Sullivan. 2014. Real-time trust evaluation in integrated circuits. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’14). 1--6.
[34]
R. Karri, J. Rajendran, K. Rosenfeld, and M. Tehranipoor. 2010. Trustworthy hardware: Identifying and classifying hardware Trojans. Computer 43, 10 (Oct. 2010), 39--46. 10.1109/MC.2010.299
[35]
O. Keren, I. Levin, and M. Karpovsky. 2010. Duplication based one-to-many coding for Trojan HW detection. In Proceedings of the 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’10). 160--166.
[36]
R. Koch and G. D. Rodosek. 2012. The role of COTS products for high security systems. In Proceedings of the 2012 4th International Conference on Cyber Conflict (CYCON’12). 1--14.
[37]
J. Li and J. Lach. 2008. At-speed delay characterization for IC authentication and Trojan horse detection. In Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008 (HOST’08). 8--14.
[38]
W. Li, Z. Wasson, and S. A. Seshia. 2012. Reverse engineering circuits using behavioral pattern mining. In Proceedings of the 2012 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’12). 83--88.
[39]
L. Lin, W. Burleson, and C. Paar. 2009. MOLES: Malicious off-chip leakage enabled by side-channels. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers, 2009 (ICCAD’09). 117--122.
[40]
B. Liu and B. Wang. 2014. Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE’14). 1--6.
[41]
C. Liu, J. Rajendran, C. Yang, and R. Karri. 2014b. Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security- driven task scheduling. IEEE Transactions on Emerging Topics in Computing 2, 4 (Dec. 2014), 461--472.
[42]
Y. Liu, K. Huang, and Y. Makris. 2014a. Hardware Trojan detection through golden chip-free statistical side-channel fingerprinting. In Proceedings of the 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC’14). 1--6.
[43]
E. Love, Y. Jin, and Y. Makris. 2011. Enhancing security via provably trustworthy hardware intellectual property. In Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’11). 12--17.
[44]
D. McIntyre, F. Wolff, C. Papachristou, and S. Bhunia. 2010. Trustworthy computing in a multi-core system using distributed scheduling. In Proceedings of the 2010 IEEE 16th International On-Line Testing Symposium (IOLTS’10). 211--213.
[45]
S. Narasimhan, X. Wang, D. Du, R. S. Chakraborty, and S. Bhunia. 2011. TeSR: A robust temporal self-referencing approach for hardware Trojan detection. In Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’11). 71--74. 10.1109/HST.2011.5954999
[46]
S. Narasimhan, W. Yueh, X. Wang, S. Mukhopadhyay, and S. Bhunia. 2012. Improving IC security against Trojan attacks through integration of security monitors. IEEE Design Test of Computers 29, 5 (Oct. 2012), 37--46.
[47]
M. Oya, Youhua Shi, M. Yanagisawa, and N. Togawa. 2015. A score-based classification method for identifying hardware-Trojans at gate-level netlists. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’15). 465--470.
[48]
J. Rajendran, V. Jyothi, O. Sinanoglu, and R. Karri. 2011. Design and analysis of ring oscillator based design-for-trust technique. In Proceedings of the 2011 IEEE 29th VLSI Test Symposium (VTS’11). 105--110.
[49]
J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri. 2013. Security analysis of integrated circuit camouflaging. In Proceedings of the 2013 ACM SIGSAC Conference on Computer & Communications Security (CCS’’13). ACM, New York, NY, 709--720.
[50]
J. Rajendran, V. Vedula, and R. Karri. 2015. Detecting malicious modifications of data in third-party intellectual property cores. In Proceedings of the 52nd Annual Design Automation Conference (DAC’15). ACM, New York, NY, Article 112, 6 pages.
[51]
J. Rajendran, H. Zhang, O. Sinanoglu, and R. Karri. 2013. High-level synthesis for security and trust. In Proceedings of the 2013 IEEE 19th International On-Line Testing Symposium (IOLTS’13). 232--233.
[52]
A. Ramdas, S. M. Saeed, and O. Sinanoglu. 2014. Slack removal for enhanced reliability and trust. In Proceedings of the 2014 9th IEEE International Conference on Design Technology of Integrated Systems in Nanoscale Era (DTIS’14). 1--4.
[53]
M. Rathmair, F. Schupfer, and C. Krieg. 2014. Applied formal methods for hardware Trojan detection. In Proceedings of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS’14). 169--172.
[54]
T. Reece, D. B. Limbrick, and W. H. Robinson. 2011. Design comparison to identify malicious hardware in external intellectual property. In Proceedings of the 2011 IEEE 10th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom’11). 639--646.
[55]
M. Rostami, F. Koushanfar, J. Rajendran, and R. Karri. 2013. Hardware security: Threat models and metrics. In Proceedings of the International Conference on Computer-Aided Design (ICCAD’13). IEEE Press, Piscataway, NJ, 819--823.
[56]
J. A. Roy, F. Koushanfar, and I. L. Markov. 2008. EPIC: Ending piracy of integrated circuits. In Design, Automation and Test in Europe, 2008 (DATE’08). 1069--1074.
[57]
H. Salmani and M. Tehranipoor. 2012. Layout-aware switching activity localization to enhance hardware Trojan detection. IEEE Transactions on Information Forensics and Security 7, 1 (Feb. 2012), 76--87.
[58]
H. Salmani and M. Tehranipoor. 2013. Analyzing circuit vulnerability to hardware Trojan insertion at the behavioral level. In Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT’13). 190--195.
[59]
H. Salmani, M. Tehranipoor, and R. Karri. 2013. On design vulnerability analysis and trust benchmarks development. In Proceedings of the 2013 IEEE 31st International Conference on Computer Design (ICCD’13). 471--474.
[60]
H. Salmani, M. Tehranipoor, and J. Plusquellic. 2012. A novel technique for improving hardware Trojan detection and reducing Trojan activation time. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20, 1 (Jan. 2012), 112--125.
[61]
Y. Shiyanovskii, F. Wolff, A. Rajendran, C. Papachristou, D. Weyer, and W. Clay. 2010. Process reliability based Trojans through NBTI and HCI effects. In Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems (AHS’10). 215--222.
[62]
F. Stellari, Peilin Song, A. J. Weger, J. Culp, A. Herbert, and D. Pfeiffer. 2014. Verification of untrusted chips using trusted layout and emission measurements. In Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’14). 19--24. 10.1109/HST.2014.6855562
[63]
M. Tehranipoor and C. Wang. 2012. Introduction to Hardware Security and Trust. Springer.
[64]
N. G. Tsoutsos and M. Maniatakos. 2014. Fabrication attacks: Zero-overhead malicious modifications enabling modern microprocessor privilege escalation. IEEE Transactions on Emerging Topics in Computing 2, 1 (March 2014), 81--93.
[65]
K. Vaidyanathan, B. P. Das, E. Sumbul, R. Liu, and L. Pileggi. 2014. Building trusted ICs using split fabrication. In Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’14). 1--6.
[66]
J. Valamehr, T. Sherwood, R. Kastner, D. Marangoni-Simonsen, T. Huffmire, C. Irvine, and T. Levin. 2013. A 3-d split manufacturing approach to trustworthy system development. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32, 4 (April 2013), 611--615.
[67]
A. Waksman, M. Suozzo, and S. Sethumadhavan. 2013. FANCI: Identification of stealthy malicious logic using boolean functional analysis. In Proceedings of the 2013 ACM SIGSAC Conference on Computer & Communications Security (CCS’’13). ACM, New York, NY, 697--708.
[68]
X. Wang, M. Tehranipoor, and J. Plusquellic. 2008. Detecting malicious inclusions in secure hardware: Challenges and solutions. In Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2008 (HOST’08). 15--19.
[69]
J. B. Wendt and M. Potkonjak. 2014. Hardware obfuscation using PUF-based logic. In Proceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’14). 270--271.
[70]
K. Xiao, D. Forte, and M. M. Tehranipoor. 2015. Efficient and secure split manufacturing via obfuscated built-in self-authentication. In Proceedings of the 2015 IEEE International Symposium on Hardware Oriented Security and Trust (HOST’15). 14--19.
[71]
K. Xiao and M. Tehranipoor. 2013. BISA: Built-in self-authentication for preventing hardware Trojan insertion. In Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’13). 45--50.
[72]
K. Xiao, X. Zhang, and M. Tehranipoor. 2013. A clock sweeping technique for detecting hardware Trojans impacting circuits delay. IEEE Design Test 30, 2 (April 2013), 26--34. 10.1109/MDAT.2013.2249555
[73]
Y. Xie, C. Bao, and A. Srivastava. 2015. Security-aware design flow for 2.5d IC technology. In Proceedings of the 5th International Workshop on Trustworthy Embedded Devices (TrustED’15). ACM, New York, NY, 31--38.
[74]
X. Zhang and M. Tehranipoor. 2011a. Case study: Detecting hardware Trojans in third-party digital IP cores. In Proceedings of the 2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST’11). 67--70.
[75]
X. Zhang and M. Tehranipoor. 2011b. RON: An on-chip ring oscillator network for hardware Trojan detection. In Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE’11). 1--6.
[76]
X. Zhang, K. Xiao, M. Tehranipoor, J. Rajendran, and R. Karri. 2013. A study on the effectiveness of Trojan detection techniques using a red team blue team approach. In Proceedings of the 2013 IEEE 31st VLSI Test Symposium (VTS’13). 1--3.
[77]
B. Zhou, R. Adato, M. Zangeneh, T. Yang, A. Uyar, B. Goldberg, S. Unlu, and A. Joshi. 2015. Detecting hardware Trojans using backside optical imaging of embedded watermarks. In Proceedings of the 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC’15). 1--6.
[78]
B. Zhou, W. Zhang, S. Thambipillai, and J. K. J. Teo. 2014. A low cost acceleration method for hardware Trojan detection based on fan-out cone analysis. In Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS’14). 1--10. 10.1145/2656075.2656077

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    cover image ACM Transactions on Design Automation of Electronic Systems
    ACM Transactions on Design Automation of Electronic Systems  Volume 22, Issue 1
    January 2017
    463 pages
    ISSN:1084-4309
    EISSN:1557-7309
    DOI:10.1145/2948199
    • Editor:
    • Naehyuck Chang
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    Publication History

    Published: 27 May 2016
    Accepted: 01 March 2016
    Revised: 01 January 2016
    Received: 01 September 2015
    Published in TODAES Volume 22, Issue 1

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    Author Tags

    1. Hardware security and trust
    2. attack model
    3. countermeasures
    4. hardware Trojan attacks

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