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Constrained polygon transformations for incremental floorplanning

Editor: C. L. Liu Authors:

Swanwa Liao,

Mario A. Lopez,

Dinesh MehtaAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 6, Issue 3

Pages 322 - 342

https://doi.org/10.1145/383251.383255

Published: 01 July 2001 Publication History

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Abstract

A productivity-driven methodology for incremental floorplanning is described and the constrained polygon transformation problem, a key step of this methodology, is formulated. The input to the problem consists of a floorplan computed using area estimates and the actual area required for each subcircuit of the floorplan. Informally, the objective is to change the areas of the modules without drastically changing their shapes or locations. We show that the constrained polygon transformation problem is NP-hard and present several fast algorithms that produce results within a few percent of a theoretical lower bound on several floorplans.

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Cited By

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Harish PNarayanan P(2013)Designing Perspectively Correct Multiplanar DisplaysIEEE Transactions on Visualization and Computer Graphics10.1109/TVCG.2012.13519:3(407-419)Online publication date: 1-Mar-2013
https://dl.acm.org/doi/10.1109/TVCG.2012.135
Li XMa YHong XWakabayashi K(2009)A novel thermal optimization flow using incremental floorplanning for 3D ICsProceedings of the 2009 Asia and South Pacific Design Automation Conference10.5555/1509633.1509723(347-352)Online publication date: 19-Jan-2009
https://dl.acm.org/doi/10.5555/1509633.1509723
MA YLI XWANG YHONG X(2009)Thermal-Aware Incremental Floorplanning for 3D ICs Based on MILP FormulationIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E92.A.2979E92-A:12(2979-2989)Online publication date: 2009
https://doi.org/10.1587/transfun.E92.A.2979
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Index Terms

Constrained polygon transformations for incremental floorplanning
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Partitioning and floorplanning
2. Theory of computation
  1. Design and analysis of algorithms
    1. Approximation algorithms analysis
      1. Routing and network design problems
  2. Randomness, geometry and discrete structures
    1. Computational geometry

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 6, Issue 3

July 2001

169 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/383251

Editor:
C. L. Liu
Univ. of Illinois at Urbana-Champaign, Urbana, IL

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 July 2001

Published in TODAES Volume 6, Issue 3

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Harish PNarayanan P(2013)Designing Perspectively Correct Multiplanar DisplaysIEEE Transactions on Visualization and Computer Graphics10.1109/TVCG.2012.13519:3(407-419)Online publication date: 1-Mar-2013
https://dl.acm.org/doi/10.1109/TVCG.2012.135
Li XMa YHong XWakabayashi K(2009)A novel thermal optimization flow using incremental floorplanning for 3D ICsProceedings of the 2009 Asia and South Pacific Design Automation Conference10.5555/1509633.1509723(347-352)Online publication date: 19-Jan-2009
https://dl.acm.org/doi/10.5555/1509633.1509723
MA YLI XWANG YHONG X(2009)Thermal-Aware Incremental Floorplanning for 3D ICs Based on MILP FormulationIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences10.1587/transfun.E92.A.2979E92-A:12(2979-2989)Online publication date: 2009
https://doi.org/10.1587/transfun.E92.A.2979
Li XMa YHong X(2009)A novel thermal optimization flow using incremental floorplanning for 3D ICs2009 Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2009.4796505(347-352)Online publication date: Jan-2009
https://doi.org/10.1109/ASPDAC.2009.4796505
Li XMa YHong X(2008)An efficient thermal optimization flow using incremental floorplanning for 3D microprocessors2008 9th International Conference on Solid-State and Integrated-Circuit Technology10.1109/ICSICT.2008.4735044(2321-2324)Online publication date: Oct-2008
https://doi.org/10.1109/ICSICT.2008.4735044
Feng YMehta DYang H(2006)Constrained floorplanning using network flowsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2004.82587723:4(572-580)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TCAD.2004.825877
Feng YMehta DYang HPedram MAlpert C(2003)Constrained "Modern" FloorplanningProceedings of the 2003 international symposium on Physical design10.1145/640000.640030(128-135)Online publication date: 6-Apr-2003
https://dl.acm.org/doi/10.1145/640000.640030

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Constrained "Modern" Floorplanning

Modern floorplanning based on fast simulated annealing

Modern floorplanning based on B^*-tree and fast simulated annealing

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Constrained "Modern" Floorplanning

Modern floorplanning based on fast simulated annealing

Modern floorplanning based on B*-tree and fast simulated annealing

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Modern floorplanning based on B^*-tree and fast simulated annealing