research-article

Enhancing Flash Memory Reliability by Jointly Considering Write-back Pattern and Block Endurance

Authors:

Yuan-Hao Chang,

Yuan-Hung Kuan,

Ming-Chang Yang,

Pi-Cheng HsiuAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 23, Issue 5

Article No.: 64, Pages 1 - 24

https://doi.org/10.1145/3229192

Published: 22 August 2018 Publication History

Abstract

Owing to high cell density caused by the advanced manufacturing process, the reliability of flash drives turns out to be rather challenging in flash system designs. To enhance the reliability of flash drives, error-correcting code (ECC) has been widely utilized in flash drives to correct error bits during programming/reading data to/from flash drives. Although ECC can effectively enhance the reliability of flash drives by correcting error bits, the capability of ECC would degrade while the program/erase (P/E) cycles of flash blocks is increased. Finally, ECC could not correct a flash page, because a flash page contains too many error bits. As a result, reducing error bits is an effective solution to further improve the reliability of flash drives when a specific ECC is adopted in the flash drive. This work focuses on how to reduce the probability of producing error bits in a flash page. Thus, we propose a pattern-aware write strategy for flash reliability enhancement. The proposed write strategy considers both the P/E cycle of blocks and the pattern of written data while a flash block is allocated to store the written data. Since the proposed write strategy allocates young blocks (respectively, old blocks) for hot data (respectively, cold data) and flips the bit pattern of the written data to the appropriate bit pattern, the proposed strategy can effectively improve the reliability of flash drives. The experimental results show that the proposed strategy can reduce the number of error pages by up to 50%, compared with the well-known DFTL solution. Moreover, the proposed strategy is orthogonal with all ECC mechanisms so that the reliability of the flash drives with ECC mechanisms can be further improved by the proposed strategy.

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Cited By

Tseng SChen TYang M(2024)Are Superpages Super-fast? Distilling Flash Blocks to Unify Flash Pages of a Superpage in an SSD2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00055(630-642)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00055
Li QYe MCui YRen TKuo TXue C(2022)Resolving the Reliability Issues of Open Blocks for 3-D NAND Flash: Observations and StrategiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319748741:11(4076-4087)Online publication date: 1-Nov-2022
https://dl.acm.org/doi/10.1109/TCAD.2022.3197487
Hsieh YHuang PChen PChang YKang WYang MShih W(2020)Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.301288039:11(4115-4128)Online publication date: Nov-2020
https://doi.org/10.1109/TCAD.2020.3012880
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Enhancing Flash Memory Reliability by Jointly Considering Write-back Pattern and Block Endurance

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 23, Issue 5

September 2018

310 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/3268934

Editor:
Naehyuck Chang
Korea Advanced Institute of Science and Technology, Korea

Issue’s Table of Contents

Copyright © 2018 ACM.

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Association for Computing Machinery

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 22 August 2018

Accepted: 01 May 2018

Revised: 01 May 2018

Received: 01 October 2017

Published in TODAES Volume 23, Issue 5

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Cited By

Tseng SChen TYang M(2024)Are Superpages Super-fast? Distilling Flash Blocks to Unify Flash Pages of a Superpage in an SSD2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00055(630-642)Online publication date: 2-Mar-2024
https://doi.org/10.1109/HPCA57654.2024.00055
Li QYe MCui YRen TKuo TXue C(2022)Resolving the Reliability Issues of Open Blocks for 3-D NAND Flash: Observations and StrategiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319748741:11(4076-4087)Online publication date: 1-Nov-2022
https://dl.acm.org/doi/10.1109/TCAD.2022.3197487
Hsieh YHuang PChen PChang YKang WYang MShih W(2020)Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.301288039:11(4115-4128)Online publication date: Nov-2020
https://doi.org/10.1109/TCAD.2020.3012880
Wang YTan JMao RLi T(2020)Temperature-Aware Persistent Data Management for LSM-Tree on 3D NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.2982623(1-1)Online publication date: 2020
https://doi.org/10.1109/TCAD.2020.2982623

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