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In this paper systematic simulation-based methodologies for integrated circuit (IC) manufacturing technology development and technology transfer are presented. In technology development, technology computer-aided design (TCAD) tools are... more
In this paper systematic simulation-based methodologies for integrated circuit (IC) manufacturing technology development and technology transfer are presented. In technology development, technology computer-aided design (TCAD) tools are used to optimize the device and process parameters to develop a new generation of IC manufacturing technology by reverse engineering from the target product specifications. While in technology transfer to manufacturing co-location, TCAD
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This paper describes a virtual manufacturing system consisting of technology computer-aided design tools for semiconductor manufacturing companies. This virtual factory is shown to be very efficient for development of advanced process... more
This paper describes a virtual manufacturing system consisting of technology computer-aided design tools for semiconductor manufacturing companies. This virtual factory is shown to be very efficient for development of advanced process technology evaluation of process manufacturability, and improvement of existing fabrication processes. By using computer aids, the design and manufacturability of the target technology can be evaluated prior to actual
Research Interests: Computer Science, Semiconductor Manufacturing, Computer Aided Design, Advanced Manufacturing, Computer Aided Manufacturing, and 9 morecomputer Integrated manufacturing, Manufacturing Engineering, Fabrication, Design for Manufacturability, Design for Manufacture, Pharmacological, Integrated Circuit, Virtual Reality In Manufacturing, and Integrated Circuit Design
ABSTRACTHot-carrier effect was studied for different channel doping profiles in nMOSFET devices with effective channel length near 100 nm using a device simulator. The test structures for device simulation were generated using gate oxide... more
ABSTRACTHot-carrier effect was studied for different channel doping profiles in nMOSFET devices with effective channel length near 100 nm using a device simulator. The test structures for device simulation were generated using gate oxide thickness of 3 nm. The channel doping profiles used were abrupt- and graded-retrograde types with low surface and high substrate concentrations, and conventional step profiles with high surface and low substrate concentrations. For accurate device simulation, a hydrodynamic model for semiconductors was used to simulate the non-local transport phenomena in the devices. The simulation results indicate that for ultra-short channel devices, the current drivability and the hot-carrier effects depend on the shape of channel doping profiles. For a given supply voltage, the hot-carrier effects in ultra-short channel devices can be controlled by optimizing the channel doping profiles.
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A customer-centric business model using the electronic media for world commerce in the semiconductor industry is presented. It is shown that the proposed model has a great potential to meet customer demands rapidly and cost-effectively... more
A customer-centric business model using the electronic media for world commerce in the semiconductor industry is presented. It is shown that the proposed model has a great potential to meet customer demands rapidly and cost-effectively and improve customer satisfaction. The model, also, has a great potential to offer an overall improvement in the efficiency and satisfaction of a firm's sales
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A dedicated semiconductor foundry (DSF) provides a cost-effective integrated circuit (IC) manufacturing technology and wafer fabrication services to fabless semiconductor companies (FSC). However, each FSC requires its product-specific... more
A dedicated semiconductor foundry (DSF) provides a cost-effective integrated circuit (IC) manufacturing technology and wafer fabrication services to fabless semiconductor companies (FSC). However, each FSC requires its product-specific technology and technology development services. This paper presents an operating foundry business model for an efficient technology development services. The potential benefits of the proposed model in improving the efficiency and effectiveness
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A business model using the Internet channel for world commerce in the semiconductor industry is presented. The electronic media for commerce is found to be crucial to meet customer demands timely and cost-effectively. The strategies to... more
A business model using the Internet channel for world commerce in the semiconductor industry is presented. The electronic media for commerce is found to be crucial to meet customer demands timely and cost-effectively. The strategies to setup an infrastructure for electronic commerce and the potential benefits of electronic commerce for the semiconductor design and manufacturing companies are described
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This paper presents sub-90 nm symmetric and asymmetric source-drain junction-field-effect transistor (JFET) devices for ultra-low voltage operation. The JFET devices are suitable for ultra-low voltage analog applications by overcoming the... more
This paper presents sub-90 nm symmetric and asymmetric source-drain junction-field-effect transistor (JFET) devices for ultra-low voltage operation. The JFET devices are suitable for ultra-low voltage analog applications by overcoming the limitations of advanced MOSFET devices and CMOS technologies. However, the performance of sub-90 nm channel-JFETs is limited by higher off-state leakage current and lower ON/OFF current ratio. In this paper,
Research Interests: Engineering, Electrical Engineering, Materials Science, Numerical Analysis, Leakage Current, and 14 moreLow Power, Cmos, Low Power Electronics, High performance, MOSFET, Transistor, Device Simulation, Double Gate, Ultra Low Power, Ultra-Low Voltage, Threshold Voltage, Field effect transistor, JFET, and JUNCTION FIELD EFFECT TRANSISTOR
This paper presents a systematic investigation of the hot-carrier effect in deep sub-micron silicon nMOSFET devices. A Hydrodynamic model for semiconductors was used to simulate the local carrier heating and the non-local transport... more
This paper presents a systematic investigation of the hot-carrier effect in deep sub-micron silicon nMOSFET devices. A Hydrodynamic model for semiconductors was used to simulate the local carrier heating and the non-local transport phenomena in nMOSFETs of effective channel lengths 41, 66, 96, and 126 nrn under various biasing conditions. Test structures for device simulation were generated by using a super-steep retrograde channel profile with subsurface peak concentration of l×1018 cm−3, and a gate oxide thickness of 3 nm. Superb MOSFET device characteristics were obtained for all devices. The simulation results show a significant decrease in substrate current, electron impact ionization rate, and peak electron temperature near the drain end of the channel with the decrease in supply voltage. The distribution of electrons into the substrate due to local electron heating is shown to be responsible for hot-carrier reliability in ultra-short channel silicon nMOSFET devices.
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This paper addresses hot-carrier related reliability issues in deep submicron silicon nMOSFET devices. In order to monitor the hot-carrier induced device degradation, the substrate current was measured for devices with varying channel... more
This paper addresses hot-carrier related reliability issues in deep submicron silicon nMOSFET devices. In order to monitor the hot-carrier induced device degradation, the substrate current was measured for devices with varying channel lengths (20 um - 0.24 um) under various biasing conditions. Deep submicron devices experience velocity saturation of channel carriers due to extremely high lateral electric fields. To evaluate the effects of velocity saturation in the channel, the pinch-off length in the channel was extracted for all the devices of the target technology. It was observed that for very short channel devices, carriers in most of the channel experience velocity saturation and almost the entire channel gets pinched off. It is shown in this paper that for very short channel devices, the pinch-off length in the channel is limited by the effective channel length, and that velocity saturation effects are critical to the transport of channel carriers.
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ABSTRACTExperimental and simulation studies were conducted in an attempt to understand the effects of collimator life time on the Ti and TiN film growth rates and conformalities in sputter deposition processes. The Ti and TiN films were... more
ABSTRACTExperimental and simulation studies were conducted in an attempt to understand the effects of collimator life time on the Ti and TiN film growth rates and conformalities in sputter deposition processes. The Ti and TiN films were deposited with and without collimation. The hexagonal cells of the collimator used in this study have a 1:1 aspect ratio. A Monte Carlo based simulator was used to calculate the angular distributions of species exiting from a collimator cell and the percentage decrease in the rate of film growth as a function of the collimator life time. Then, a low pressure deposition process simulator, EVOLVE, was used to predict the conformalities of deposited films in contacts or vias, assuming that the films were uniformly deposited on the side-walls of collimator cells. We conclude that the loss in growth rate is largely due to the shrinkage in the cross sectional area of the collimator cell inlets. We arrive at this conclusion after comparing an estimated film...
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ABSTRACT This paper describes methodologies to improve process and device simulation throughput for integrated circuit manufacturing companies. Presently available hardware, process and device simulation software, and their usage in a... more
ABSTRACT This paper describes methodologies to improve process and device simulation throughput for integrated circuit manufacturing companies. Presently available hardware, process and device simulation software, and their usage in a typical semiconductor company were considered as reference to estimate the improvement in computational efficiency and the associated cost. In a company of N active users, the estimated improvement in computational efficiency with respect to the present performance is shown to be more than N and 5N times in an uninterrupted and a distributed computing environment respectively
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In this paper, the harmonic distortion (HD) in the underlap double-gate MOSFETs (UDG-MOSFETs) with high- k spacers is analyzed. The HD occurs due to the nonlinearity in the device performance and therefore, a detailed analysis of the HD... more
In this paper, the harmonic distortion (HD) in the underlap double-gate MOSFETs (UDG-MOSFETs) with high- k spacers is analyzed. The HD occurs due to the nonlinearity in the device performance and therefore, a detailed analysis of the HD as a function of spacer dielectric constant (k) is critical to ensure device reliability for RF performance. In this paper, the analysis is performed for the primary components, the second-order distortion (HD2), and the third-order distortion (HD3) along with the total HD. The parameters analyzed for the HD study of the UDG-MOSFETs with high- k spacers are the drain current, the transconductance, and the transconductance generation factor. The results of the analysis suggest a reduction in the distortion phenomenon for the high- k spacer devices, thereby ensuring reliability of these devices for RF applications. Also, a detailed analysis of HD2 and HD3 as a function of k of the high- k spacers are performed using UDG-MOSFETs in cascode and differential amplifier circuits.
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ABSTRACT Technology CAD that accurately predicts the process and device characteristics of anticipated wafer fabrication technology is indispensable for future IC fabrication and device development. This tutorial provides a detailed... more
ABSTRACT Technology CAD that accurately predicts the process and device characteristics of anticipated wafer fabrication technology is indispensable for future IC fabrication and device development. This tutorial provides a detailed survey of the challenging issues of TCAD in technology and device design, insight into the foundation of TCAD tools, calibration of physical models for predictive bulk-process and device simulations, and practical examples form the industrial usage of TCAD in research and development.