Neuromorphic Computing

Brain-inspired hyperdimensional (HD) computing emulates cognition tasks by computing with hypervectors as an alternative to computing with numbers. At its very core, HD computing is about manipulating and comparing large patterns, stored in memory as hypervectors: the input symbols are mapped to a hypervector and an associative search is performed for reasoning and classification. For every classification event, an associative memory is in charge of finding the closest match between a set of learned hypervectors and a query hypervector by using a distance metric. Hypervectors with the i.i.d. components qualify a memory-centric architecture to tolerate massive number of errors, hence it eases cooperation of various methodological design approaches for boosting energy efficiency and scalability. This paper proposes architectural designs for hyperdimensional associative memory (HAM) to facilitate energy-efficient, fast, and scalable search operation using three widely-used design approaches. These HAM designs search for the nearest Hamming distance, and linearly scale with the number of dimensions in the hypervectors while exploring a large design space with orders of magnitude higher efficiency. First, we propose a digital CMOS-based HAM (D-HAM) that modularly scales to any dimension. Second, we propose a resistive HAM (R-HAM) that exploits timing discharge characteristic of nonvolatile resistive elements to approximately compute Hamming distances at a lower cost. Finally, we combine such resistive characteristic with a current-based search method to design an analog HAM (A-HAM) that results in faster and denser alternative. Our experimental results show that R-HAM and A-HAM improve the energy-delay product by 9.6× and 1347× compared to D-HAM while maintaining a moderate accuracy of 94% in language recognition.

Un vehículo aéreo no tripulado, conocido también como drone, es una aeronave que se caracteriza por la ausencia de un piloto humano a bordo. Los drones han tenido importancia desde ya más de una década. En la actualidad tienen aplicaciones tanto académicas como industriales. Para la presente tesis se basa en un drone tipo cuadrocóptero, que se caracteriza por sustentar gracias a sus cuatro motores. Este, desde un punto de vista ingenieril, se trata de un sistema altamente no lineal que presenta perturbaciones y ruido que no permiten tener un estabilidad en pleno vuelo. Esta aeronave tiene un costo amigable; por eso, ha sido tratado como mesa de prueba para la elaboración de controladores avanzados, por lo que se piensa diseñar un regulador cuadrático gaussiano LQG con control neuronal para un prototipo cuadrocóptero. Para ello, se requiere un estudio previo de las redes neuronales aplicadas a la teoría de control; el modelamiento directo, el cual se basa en las ecuaciones diferenciales que gobiernan la dinámica de la aeronave; el modelamiento inverso, el cual pasa por un proceso de identificación de sistema basado en el modelo paramétrico autorregresivo y que gracias a la red neuronal se podrá identificar usando el algoritmo de aprendizaje de retropropagación o backpropagation. El controlador LQG es un controlador avanzado, por lo que se piensa importar a manera de código para que la red pueda emularlo y, de esa manera obtener el control neuronal. Se quiere obtener el control de los ángulos de inclinación del cuadrocóptero con el fin de mantenerlo estable en un punto determinado; por eso, se tiene un sistema regulador. Como etapa de prueba se realiza la simulación. Se hacen cálculos teóricos para poder comparar y calibrar los resultados obtenidos por el modelamiento inverso.

Real-time network intrusion and anomaly detection systems designed for battery powered devices are in high demand. This paper presents a study of unsupervised and supervised memristor based neuromorphic systems for such tasks. AutoEncoder (AE) and Multilayer Perceptron (MLP) algorithms are used to design memristor based intrusion and anomaly detection systems. The autoencoder shows strong intrusion detection performance with accuracy greater than 92.5% on zeroday attack packets. A real-time online incremental learning and anomaly detection system is also designed using the effective anomaly detection abilities of the AE. The learning system uses two autoencoders, one AE is pretrained for classifying network packets as normal and malicious, and the second AE is initialized with random weights and learns malicious data incrementally. Thus, this system is able to flag new attack classes during runtime. The real-time intrusion detection system performs with an accuracy greater than 89.7...

Three dissimilar methodologies in the field of artificial intelligence (AI) appear to be following a common path toward biological authenticity. This trend could be expedited by using a common tool, artificial nervous systems (ANS), for recreating the biology underpinning all three. ANS would then represent a new paradigm for AI with application to many related fields.

Scientists have given a fascinating new insight into the next steps to develop fast, energy-efficient, future computing systems that use light instead of electrons to process and store information-incorporating hardware inspired directly by the functioning of the human brain. [30] Apart from pattern recognition, the new type of computer could also prove useful in another economically relevant field: for optimization tasks such as high-precision smartphone route planners. [29] "We basically combined advances in neural networks and machine-learning with quantum Monte Carlo tools," says Savona, referring to a large toolkit of computational methods that physicists use to study complex quantum systems. [28] As cosmologists and astrophysicists delve deeper into the darkest recesses of the universe, their need for increasingly powerful observational and computational tools has expanded exponentially. [27] Now, a team of scientists at MIT and elsewhere has developed a neural network, a form of artificial intelligence (AI), that can do much the same thing, at least to a limited extent: It can read scientific papersand render a plain-English summary in a sentence or two. [26] To address this gap in the existing literature, a team of researchers at SRI International has created a human-AI image guessing game inspired by the popular game 20 Questions (20Q), which can be used to evaluate the helpfulness of machine explanations. [25]

Humans and other terrestrial animals use vision to traverse novel cluttered environments with apparent ease. On one hand, although much is known about the behavioral dynamics of steering in humans, it remains unclear how relevant perceptual variables might be represented in the brain. On the other hand, although a wealth of data exists about the neural circuitry that is concerned with the perception of self-motion variables such as the current direction of travel, little research has been devoted to investigating how this neural circuitry may relate to active steering control. Here we present a cortical neural network model for visually guided navigation that has been embodied on a physical robot exploring a real-world environment. The model includes a rate based motion energy model for area V1, and a spiking neural network model for cortical area MT. The model generates a cortical representation of optic flow, determines the position of objects based on motion discontinuities, and combines these signals with the representation of a goal location to produce motor commands that successfully steer the robot around obstacles toward the goal. The model produces robot trajectories that closely match human behavioral data. This study demonstrates how neural signals in a model of cortical area MT might provide sufficient motion information to steer a physical robot on human-like paths around obstacles in a real-world environment, and exemplifies the importance of embodiment, as behavior is deeply coupled not only with the underlying model of brain function, but also with the anatomical constraints of the physical body it controls.

—Neuromorphic hardware like SpiNNaker offers massive parallelism and efficient communication of small pay-loads to accelerate the simulation of spiking neurons in neural networks. In this paper, we demonstrate that this hardware is also beneficial for other for applications which require massive parallelism and the large-scale exchange of small messages. More specifically, we study the scalability of PageRank on SpiNNaker and compare it to an implementation on traditional hardware. In our experiments, we show that PageRank on SpiNNaker scales better than on traditional multicore architectures.

In this paper, we present an FPGA-based architecture for histogram generation to support event-based camera optical flow calculation. Our proposed histogram generation mechanism reduces memory and logic resources by storing the time difference between consecutive events, instead of the absolute time of each event. Additionally, we explore the trade-off between system resource usage and histogram accuracy as a function of the precision at which time is encoded. Our results show that across three event-based camera benchmarks we can reduce the encoding of time from 32 to 7 bits with a loss of only approximately 3% in histogram accuracy. In comparison to a software implementation, our architecture shows a significant speedup.

In this technical report we present novel results of the dopamine neuromodulation inspired modulation of a polyaniline (PANI) memristive device excitatory learning STDP. Results presented in this work are of two experiments setup computer simulation and physical prototype experiments. We present physical prototype of inhibitory learning or iSTDP as well as the results of iSTDP learning.

Neuromorphic computing architectures demand the development of analog, non-volatile memory components operating at femto-Joule/bit operation energy. Electronic components working in this energy range require devices operating at ultrafast timescales. Among different non-volatile, analog memories, ferroelectric tunnel junctions (FTJs) have emerged as an important contender due to their voltage-driven operation leading to extreme energy-efficiency. Here, we report a study on the switching timescale and linear conductance modulation of organic FTJs comprising a metal/ferroelectric/semiconductor (MFS) stack with different morphologies of ferroelectric copolymer P(VDF-TrFE) ultrathin films. The results show that due to different annealing temperatures and protocols, the spin-coated copolymer films are modified significantly, which can have a large effect on the switching timescales and threshold fields of the FTJs with the best quality devices having a projected switching timescale of sub-nanosecond range. An improvement in switching speed by 7 orders of magnitude can be obtained with an increase of the programming voltage by less than a factor of 2 in these devices. This ultrafast switching of ferroelectric domains in our FTJs leads to pico to femto joule range of operation energy per bit opening the pathways for energy efficient and fast operating non-volatile memories while devices with higher domain pinning sites show a route for tuning analog conductivity for bio-realistic neuromorphic architectures.

Recently, 2-D cross-point array of resistive random access memory (RRAM) has been proposed for implementing the weighted sum and weight update operations to accelerate the neuro-inspired learning algorithms on chip. This paper aims to extend such 2-D cross-point array to 3-D vertical array for storing and computing the large-scale weight matrices in the neural network. Considering the fabrication and 3-D integration of analog synapses (i.e., multilevel RRAM devices) are premature at this stage, we propose using today's available digital or binary RRAM devices for implementing a ternary neural network, which aggressively reduces the weight precision to ternary levels (+1, 0, −1) for the weighted sum in both feedforward and backward inference, while the multiple 3-D layers could serve for accumulating the small errors in a higher precision format for weight update. Compared to the 2-D implementation , the proposed 3-D vertical implementation shows larger read/write margin for weighted sum/weight update, smaller latency, and energy consumption for weight update. This paper demonstrates the attractiveness for building a monolithic 3-D neuromorphic hardware platform. Index Terms-Monolithic 3-D integration, multilayer perceptron (MLP), neural network, neuromorphic computing, resistive memory.

Energy efficiency, parallel information processing, and unsupervised learning make the human brain a model computing system for unstructured data handling. Different types of oxide memristors can emulate synaptic functions in artificial neuromorphic circuits. However, their cycle‐to‐cycle variability or strict epitaxy requirements remain a challenge for applications in large‐scale neural networks. Here, solution‐processable ferroelectric tunnel junctions (FTJs) with P(VDF‐TrFE) copolymer barriers are reported showing analog memristive behavior with a broad range of accessible conductance states and low energy dissipation of 100 fJ for the onset of depression and 1 pJ for the onset of potentiation by resetting small tunneling currents on nanosecond timescales. Key synaptic functions like programmable synaptic weight, long‐ and short‐term potentiation and depression, paired‐pulse facilitation and depression, and Hebbian and anti‐Hebbian learning through spike shape and timing‐dependent plasticity are demonstrated. In combination with good switching endurance and reproducibility, these results offer a promising outlook on the use of organic FTJ memristors as building blocks in artificial neural networks.

In this paper we present a novel switched-capacitor implementation of short-term synaptic dynamics with simultaneous depression and facilitation. The developed circuit model is a modified version of a model of neurotransmitter release derived from biological measurements. Despite the simplicity of the circuit the rich dynamics of the original model can be delivered. By completely relying on SC techniques for all calculations, our circuit is significantly less sensitive to process variations and easier to calibrate than commonly employed subthreshold circuits. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Functionality and robustness of the circuit are verified by simulations and comparisons to the original model.

We demonstrate a solid-state spiking artificial neuron based upon an insulator-to-metal (IMT) transition material element that operates at an unprecedented low voltage (0.8 V). We have developed a general coupled electrical-thermal device model for IMT based devices to accurately predict experimental outcomes. From the experiment and simulation, we show that voltage scalability to sub 0.3 V is possible by scaling of the IMT based neuron.

ABSTRACT Process variation has an increasingly dramatic effect on delay and power as process geometries shrink. Even if the amount of variation remains the same as in previous generations, it accounts for a greater percentage of process geometries as they get smaller. So an accurate prediction of path delay and power variability for real digital circuits in the current technologies is very important; however, its main drawback is the high runtime cost. In this paper, we present a new fast EDA tool which accelerates Monte Carlo based statistical static timing analysis (SSTA) for complex digital circuit. Parallel platforms like Message Passing Interface and POSIX® Threads and also the GPU-based CUDA platform suggests a natural fit for this analysis. So using these platforms, Monte Carlo based SSTA for complex digital circuits at 32, 45 and 65 nm has been performed. and of the pin-to-output delay and power distributions for all basic gates are extracted using a memory lookup from Hspice and then the results are extended to the complex digital circuit in a hierarchal manner on the parallel platforms. Results show that the GPU-based platform has the highest performance (speedup of 19x). The correctness of the Monte Carlo based SSTA implemented on a GPU has been verified by comparing its results with a CPU based implementation.