Introduction to Digital Logic Design

Appendix A of CO&A

Dr. Farag

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 Outline
• Boolean Algebra
• Gates
• Combinational Circuits
– Simplifications of Boolean Functions
– Multiplexers, Decoders, PLA, ROM, Adders
• Sequential Circuits
– Flip-Flops
– Registers
– Counters

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 Boolean Algebra
• Similar to traditional algebra but it defines a set of logical
operations and variables
• Basic operations: AND, OR, NOT (., +, _)
• These operations are defined by their truth tables
• Other operations can be derived from the basic ones. Ex:
NAND, NOR, XOR, XNOR

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 Boolean Algebra (Cont)
• It defines a set of postulates and another set of
identities that can be derived from these postulates
• A NAND E = NOT(AE) = Ā OR Ē. Proof?

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 Gates
• To implement any logic function we need a functionally
complete set of gates. Ex (AND, OR, NOT), (AND,
NOT), (OR, NOT) (NAND), (NOR)
• How to implement all basic functions by NAND??
Examine its truth table. Same for NOR
• From manufacturing point of view, using only one type
of gates to implement the circuit is very advantageous.
Why? Regular -> Simple -> easy to design -> cheap
• Gates are the basic building blocks of all digital
systems. They are implemented using electronics
components (transistors, diodes, resistors, etc.)
• Different families are TTL, CMOS, ECL, etc. Not our
problem

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 Combinational Logic Circuits
• It is an interconnected set
of gates whose output at
any times depends solely
on the input at that instant
of time. (NOT on a
previous output state)
• These circuits have n
inputs & m outputs.
• They can be defined in
terms of truth tables,
circuits diagrams, or
Boolean equations
• Implement the following
truth by using SOP or
POS. Check equivalency
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Combinational Logic Circuits (simplification)
• Simplification: algebraic
rules, karnaugh maps, or
Quine-McKluskey tables
• The output of Table 3 can
be expressed:
– F = A’BC’ + A’BC + ABC’ =
B(A’+C’) ??
• Problem: algebraic rules
depend mainly upon
observation & experience
• A more systematic way to
simplify digital logic
expressions is the use of
karnaugh maps
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 Combinational Logic Circuits (Karnaugh)
• The map is an array of 2n squares (n # of inputs)
• How do you fill the map from a truth table??
• To use an expression, it should be in canonical form
• General rules of using the map:
– Combine ones into groups of (1, 2, 4, 8, …) squares
– Form the largest group size
– Form the min number of groups
– Two group should not intersect unless this will enable a small
group to be larger in size
• Some input combinations shall not occur and in this
situation we call the outputs, “do not care” conditions
• These “ds” can be used as either 1 or 0
• Example: designing an incrementer for a BCD number,
see Table 4 and Figure 10 in the following slide
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 Combinational Logic Circuits (Karnaugh)

• Exercise: Design a 4-bit combinational circuit 2’s complementer

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 Combinational Logic Circuits (QMA)
• Quine-Mckluskey Algorithm is a systematic method to
obtain the minimum form of a Boolean expression
• The details of the algorithm are described in the
handout
• The algorithm is best described by an example
• Minimize the following function
• F(A, B, C, D) = Σ (1, 5, 6, 7, 11, 12, 13, 15)
• This can be expresses as F = A’B’C’D + A’BC’D +
A’BCD’ + A’BCD + AB’CD + ABC’D’ + ABC’D + ABCD
• The minimal expression is F = A’C’D + A’BC + ABC’ +
ACD
• Quiz: Try it using the decimal approach

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Applications of Combinational Logic Circuits
• NAND and NOR implementation
• Multiplexer: a circuit that has multiple inputs and only
one output. At any time one of the input is selected as
output based on the value on the select line(s)
• Below is the truth table for a 4-to-1 multiplexer
• Implementation?? Application ex: Inputs to PC

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Applications of Combinational Logic (Cont)
• A decoder has n input lines and 2n output lines. Only
one output line is selected based on the input
• Example: Instruction Op code decoding
• With an additional input line, a decoder can be used as
a demultiplexer which connects its single input to one of
its outputs based on the value on the address lines
• PLA (Programmable Logic Array) has the objective of
developing a general purpose chip that can be readily
adapted to specific purposes
• It can be implemented by making every possible
connection through a fuse. Undesired connections are
removed by blowing their fuses
• This kind is called field-PLA
• See next slide

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Applications of Combinational Logic (Cont)

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Applications of Combinational Logic (Cont)
• ROM is considered a combinational circuit because the
outputs are a function only of the current inputs

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Applications of Combinational Logic (Cont)
• How to implement the function of ALU. The basic circuit
is the binary adder
• Sum = A’B’C + A’BC’ + ABC + AB’C’
• Carry = AB + AC + BC
• Implementation??

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 Applications of Combinational Logic (Cont)
• We can form n-bit adders by cascading n 1-bit adders
• The carry of a unit is fed to the next one (ripple adders)
• The problem with ripple adders is the increasing delay
• The solution is using carry lookahead technique
• C0 = A0B0
• C1 = A1B1 + A1A0B0 + B1A0
• C2, ….. etc.
• Usually a full adder (32-bit say) is constructed from a
number of modules (8-bit) adders where the carries are
rippled between modules but each module uses carry
lookahead to derive internal carry signals.
• Quiz: Design an 8-bit carry lookahead adder using two
4-bit units (derive all internal and external carry signals
and draw the final diagram)
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 Sequential Logic Circuits
• Circuits whose new
output depends not only
on the current input but
also on the past history of
that input (in other words
on the current output too)
• Basic application: making
memory units (Flip-Flops)
• A Flip-Flop is a bistable
device that has two
outputs (one is the
complement of the other:
Q and Q’)
• S-R latch: Implementation
two NORs with feedback
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 Sequential Logic Circuits (Cont)
• S-R characteristic or transition table

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 Sequential Logic Circuits (Applications)
• Clocked S-R Flip-Flop: Using AND at the input
• D Flip-Flop: One input is negated and used as the
second input. Implementation & characteristic table
• J-K Flip-Flop: it differs in that all input combinations are
allowed. The last case (J=K=1) causes the output to
toggle, a very important feature
• Implementation and table
• Flip-Flips are used to implement registers. There are two
types of registers
• A parallel register is a set of 1-bit memories that can be
read or written simultaneously. See the following slide
• A shift register implements the shits function. See the
following slide

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Sequential Logic Circuits (Applications)

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 Sequential Logic Circuits (Applications)
• Counters are one of the
most important
applications
• A counter is a register
whose value is
incremented by 1 modulo
its capacity upon the
reception of the clock
• Counters come into two
flavors:
– Ripple counters: straight
forward but slow
– Synchronous counters:
Faster but more involved

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 Sequential Logic Circuits (Applications)
• Synchronous counters
design example. First
derive the excitation
table of the JK Flip-
Flop
• Construct the truth
table then design the
input to each latch
• For each input, use
combinational design
to implement the
required circuit

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