Design Differentiator Amplifier
Design Differentiator Amplifier
Achieved by:
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Theoretical Background
Chapter I
OP-Amp
An operational amplifier (op-amp) is a linear integrated circuit that incorporates a DC-coupled, high-gain differential amplifier and other circuitry that give it specific characteristics. The ideal op-amp has certain unattainable specifications, but hundreds of types of operational amplifiers are available, which vary in specific ways from the ideal op-amp. Important specifications include very large open-loop gain, high input impedance, and low output impedance. There are other specifications for op-amp that are important in certain applications. These specifications can be divided into two categories: DC parameters and AC parameters. DC parameters include input bias current, input offset current and input offset voltage. Input bias current ( I Bias ) is the average of the input currents required at each input terminal of the op-amp. Input offset current ( I OS ) is the absolute value of the difference between the DC bias currents.
IBias
I B1 2
I B2
(1)
Ios
give zero output voltage.
IB1 IB2
(2)
Input offset voltage ( VIO ) is the amount of voltage that must be applied between the input terminals of an op-amp to
Since the input stage of all op-amps is a differential amplifier, there are two inputs marked with the symbols (+) and (-). These symbols refer to the phase of the output signal compared to the input signal and should be read as non-inverting (+) and inverting (-) rather than plus or minus. If the non-inverting input is more positive than the inverting input, the output will be positive. If the inverting input is more positive, then the output will be negative. The symbol for an op-amp is shown in Figure 1(a). Figure 1(b) shows a typical 8-pin dual-in-package (DIP) with an identifier for pin 1. And Figure 2 shows the pin diagram for LM 741 op-amp.
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Differentiator Amplifier
A differentiator circuit produces an output that is proportional to the derivative or rate of change of the input voltage over time. Differentiator circuit can be constructed as shown using an operational amplifier, a resistor, and a capacitor. Unlike an ideal integrator circuit where the slightest DC offset in the input eventually drives the output into saturation, for the differentiator we need not be concerned about a DC offset in the input since the derivative of a constant is always zero. For this circuit, it can be shown that:
Vout
RC
dVin dt
Since the output voltage of a differentiated is proportional to the input frequency, high frequency signals (such as electrical noise) may saturate or cutoff the amplifier. For this reason: a resistor is placed in series with the capacitor in the input as shown in Figure 5. This establishes high frequency limit beyond which differentiation no longer occurs:
g%
1 2SR in Cin
To achieve greater attenuation at higher frequencies (or prevent oscillation), a feedback capacitor is added in parallel with the feedback resistor. This establishes another break frequency that can be calculated as in the integrator. Fig.3: Stable Differentiator Circuit
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Frequency Response
The frequency response of an amplifier is the variation in the output as the frequency is varied. The analysis of the frequency response of an amplifier can be considered in three frequency ranges: the low-, mid-, and high-frequency regions. In the low-frequency region the capacitors used for DC isolation (AC coupling) and bypass operation affect the lower cutoff (lower 3-dB) frequency. In the mid- frequency range only resistive elements affect the gain, the gain remaining constant. In the high-frequency region of operation, stray wiring capacitances and device inter-terminal capacitances will determine the circuit's upper cutoff frequency.
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Chapter II
Av = 0.1 at 10 Hz =
Input Voltage (volt) 0 0.499 0.99 1.499 1.989 2.499 2.989 3.499 3.989 4.499
Output Voltage (volt) 0 0.495 0.989 1.484 1.978 2.473 2.967 3.462 3.957 4.451
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Fig.4: the Relationship between the input and output From the same expression VOut = Am (2 f) RC Cos (2 f t) and from the frequency Response that see later, the differentiator begins differentiates the input at 10 Hz and to value of output not exceed 20 V, then the differentiator work as inverting.
Output Voltage (volt) 0.100013 0.500065 1.00013 1.500194 2.000259 2.460319 2.940381 3.420443 3.900506 4.380568 4.86063 5.340692
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1 1 1 1 1 1 1 1 1
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Chapter III
We draw the differentiator amplifier without feedback capacitor as you can see below:
And then we draw the differentiator amplifier with feedback capacitor, to calculate the upper cutoff frequency as you can see below:
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From the two pages coming later, each one has graph of frequency response the first one ha sfrequency response without feedback capcitor and the second one with feedback capacitor. We must calculate the value of capacitor that prevent the high frequency as this: The High frequency begins at 20 V equal 20.045 kHz then:
1 2
C = 0.13 nF We can can see in the second graph the lower and upper cutoff frequency.
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conclusions:
In this project we know that the practical diffrentiator is different than ideal. And when you want to design the diffrentiator you must taken many things in your consideration, such as upper and lower cutoff frequency,and the band width of the amplifier. To prevent a high frequency problem in this diffrentiator we use the low pass filter, you can see that in feedback in fig.7. The relationship between input voltage and output voltage is linear in linear Region. The best thing in this project we know how we can use the other software" PSpice" to build schematic and simulation it.
Refrences:
1. Electronic circuit analysis and Design, by Donald A Neamen. 2. OrCad 15.7