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RP Report 2014H123032G

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DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

BITS G540 RESEARCH PRACTICE

Report submitted in partial fulfillment for Award of the degree of master of engineering

DESIGN OF FRONT END AMPLIFIER FOR OPTICAL RECEIVERS

Submitted by-

Supervisor-

Rahul Jaiswal

Dr. Priyanka Desai

ABSTRACT

This research practice tries to discover the design of an optical receiver in umc 180nm library.
Trying to keep the silicon area minimal in the design, concept of equalization and inductive
peaking is also introduced in the design. The front-end amplifier is divided into two stages, the
trans impedance amplifier (TIA) and the limiter amplifier (LA). Design is simulated with Cadence
Spectre simulator. Simulations are performed to ensure robust operation under process
variations. One of the target of the design is to keep power level below 10mW

TABLE OF CONTENTS
ABSTRACT..... I
1. INTRODUCTION ..1
1.1 Fundamentals of Optical Communication
1.2 LASERS
1.3 Light Emitting Diodes (LEDs)
1.4 Optical Fiber
1.5 Optical Reciever

2.TRANSIMPEDANCE AMPLIFIER ..3


2.1 Single Resistor TIA
2.2 Common Gate TIA
2.3 Regulated-Cascade TIA
2.4 Shunt-Shunt Feedback TIA

3. LIMITING AMPLIFIER ..6


3.1 Resistive Load Differential Amplifier
3.2 Gain Expression

4. INDUCTIVE PEAKING ...8


4.1 Series Inductive Peaking
4.2 Shunt Inductive Peaking

5. EQUALIZER ....9
6. DESIGN

FLOW11

7. DESIGN WORK..13
8. REFERENCES 20

1. INTRODUCTION

1.1 Fundamentals of Optical Communication

Data is represented as light signal inside an optical cable. It has to be converted back to an electrical
signal at the target system where that data has to be used. Optical receiver is used to convert the
light signal into electrical signal to be used in the target system.
The building block of an optical _fiber communication system consists of a light source at its
transmitter, an optical fiber cable to carry the light signal and an optical receiver at the receiver
side to detect the signal in optical form and convert it into an electrical form.

1.2 LASERS
Lasers produce coherent light which can be focused in a narrow point. Lasers are constructed
from semiconductor diodes. The light can be emitted from the surface of the diode or edge of
the diode. Accordingly lasers are of two types. Surface emitters and edge emitters.

1.3 LIGHT EMITTING DIODES (LEDs)


The working principle of the LED is based on emission of photons due to recombination of holes
and electrons in a semiconductor device, number of carriers present in the active LED region is
proportional to the forward current through the LED.

1.4 OPTICAL FIBER


An optical fiber is a dielectric waveguide that operates at optical frequencies. This fiber
waveguide is normally cylindrical in form. It converts electromagnetic energy in the form of light
to within its surfaces and guides the light in a direction parallel to its axis.

1.5 OPTICAL RECEIVER

Optical receivers are used to detect light coming out of fiber at the destination of the optical
communication system Photodiode converts optical signal to an electrical current signal.
Trans-impedance amplifier that follows the photodiode amplifies current signal and convert it into
a voltage signal. Limiting amplifier further amplifies the signal. Limiting amplifier is followed by
a clock and data recovery circuit (CDR). CDR extracts the carrier and data signal from the received
signal at the output of the optical receiver.

2. TRANSIMPEDANCE AMPLIFIER
The TIA is the most critical part of an optical receiver design because its noise, gain and frequency
performance largely determines the overall data rate that can be achieved in an optical system. The
function of a TIA is to convert the input current from the external photodiode to a voltage output.
The TIA has a large transimpedance gain and a low sensitivity to the photodiode capacitance.
These characteristics are important because the input photocurrent is very small.
Although the structure of TIA offers large gain, the signal produced by TIA still suffers from small
amplitude, usually on the order of a few tens of millivolts. Therefore, the TIA must be followed
by a LA, which boosts the voltage swing and matches the output impedance to drive the decision
making circuit

2.1 Single Resistor TIA


The basic objective of a TIA is to convert a current into a voltage signal. A resistor is able to do
this. Consequently, the simplest TIA topology one can imagine consists of a single resistor.

2.2 Common Gate TIA


The problem with the single-resistor TIA is the limited transimpdeance bandwidth product which
is governed only by the capacitance of the photodiode. As a result, the BW of a single resistor
TIA is less. The common-gate TIA improves this fundamental trade-o_ between transimpedance
gain and bandwidth.

2.3 Regulated-Cascade TIA


Feedback can be applied to the common-gate TIA to increase its performance This leads to the
regulated-cascode TIA. This is shown in Fig. 2.7. By contrast with the common-gate TIA, the gate
voltage of transistor M1 is not fixed as in the regulated-cascode TIA topology. The effective
transconductance of M1 can be regulated by amplifying the voltage at the source of this transistor
with an inverting voltage gain.

Regulated Cascade TIA

2.4 Shunt-Shunt Feedback TIA


Yet another possibility to convert a current into a voltage, a negative feedback network senses
the voltage at the output and returns a proportional current to the input. This configuration is
known as shunt-shunt feedback TIA configuration.

3. LIMITING AMPLIFIER
The bandwidth and the output swing are two critical parameters for the LA circuit design. Unlike
the TIA, whose bandwidth should set to be approximately 70% of the data rate, the bandwidth of
the LA is designed to be equal to the data rate. The cascaded gain stages are used to implement the
role of a limiter amplifier. In order to understand the properties of LA, the performance of the
cascaded gain stages is studied

In order to know the output swing of the LA, we need to examine the total gain of the LA.
It is given by

ATotal = (Ao)N
This result from small-signal analysis only offers a conservative estimation for the output swing of the
LA. Typically, the second or third gain stage of the LA senses sufficiently large input swing so that it
operates in the switching'state. Therefore, it is able to offer large output swing.

3.1 Resistive Load Differential Amplifier


The simplest circuit for the gain stage is resistive load different amplifier. Due to the symmetry
of the design, the small signal performance can be analyzed with the aid of half-circuit model

Resistive Load Differential Amplifier

GAIN EXPRESSION

By cascading several resistive load differential amplifiers, a LA is designed. As can be seen,


because the last stage is operated in non-linear region, the small signal can be converted into large
output swing signal exhibiting short rise and fall time.

4. INDUCTIVE PEAKING
The limitation of the bandwidth of TIA is primarily due to the large capacitance either at the input or
the output nodes. Therefore, if an inductor is inserted to resonate with the capacitance, the bandwidth
can be enhanced. This method is called "inductive peaking", and may be applied to the three topologies
discussed above. There are two types of inductive peaking, series peaking and shunt peaking.

Series Inductive Peaking


Series inductive peaking utilizes the inductor series with the input of the TIA. series inductive
peaking suffers from the requirement of using very large inductor, usually on the order of luH. The
monolithic inductor cannot offer this large value. Therefore, it is possible to use a bond wire
instead, which means that the length and shape of the wire and the capacitance of the photodiode
must be controlled tightly.

Shunt Inductive Peaking


Shunt inductive peaking occurs when the inductor appears in parallel with the output

5. EQUALIZER
NEED- PHOTODIODES ARE BOTTLENECK
The bandwidth of an electrical signal generated from a photodiode is in MHz range (<10MHz) for
a n-well/p-sub photodiode. The bandwidth of a channel in an optical fiber is in GHz range. It means
the electrical bandwidth of a photodiode restricts how fast the data can be accessed. Increasing this
bandwidth thus guarantees the higher data speed and bandwidth. Photodiode implemented in
CMOS process is thus a critical element in restricting the data access.

EQUALIZATION
A circuit which response is exactly inverse to that of a photodiode can be used to increase the
bandwidth of a CMOS photodiode. This circuit is called an equalizer

When the responses of the photodiode and equalizer circuits are multiplied in time domain, the
resultant signal can have a high bandwidth as depicted in the diagram. Multiplication in time
domain corresponds to addition in frequency domain. Equalization is used in this work. An
equalizer circuit is designed to extend the bandwidth limited by the use of a CMOS integrated
photodiode in an optical receiver.

10

6. DESIGN FLOW

First, the specifications for the circuit such as the bandwidth are determined. Next, the parameters
of the circuit such as the resistor value are set according to the results of hand calculation.
Subsequently, a schematic view of the circuit is created using the Cadence Composer followed by
the circuit simulation using Spectre. After the circuit specifications are satisfactorily met, the
circuit layout is created using the Virtuoso Layout Editor

11

The DRC verifies whether the layout satisfies the geometric constrains of the AMI05 process. The
LVS compares the layout to the schematic to ensure that the intended functionality is implemented.
If the layout passes the DRC and LVS check, post simulation is carried by plugging the parasitic
capacitors of the layout into the original schematic. After the results of the post-simulation meet
the circuit specification, the layout is converted to CIF format and sent to be fabricated.

12

7. DESIGN WORK
Phase 1
A photodiode is expected to produce a 20 uA peak to peak current signal.
The TIA should amplify the current signal to be larger than 60mVp_p'
Therefore, the transimpedance gain of TlA should be larger than 3 k ohm. The LA should be able
to boost the swing to 3.5V at least in order to drive the Decision making circuit

A) DESIGN AND SIMULATION OF 20uA PEAK TO PEAK CURRENT SOURCE,


I had used both pulse and sinusoidal source as pulse source also get distorted while
propagating
.

Period is 20 us and amplitude (peak to peak) is 20 uA

13

A1) Pulse source

A2) SINUSOIDAL SOURCE

14

B) DESIGN OF TIA AMPLIFIER (First Stage)


TIA is modified to differential circuit in order to suppress the fluctuations of power supply and
substrate noise. The RI resistor and MI, M2 transistors forms a current mirror to supply a constant
current flow for the differential circuits. The transistors of M3, M4, M5 and M6 are differential
pairs of resistive feedback TIA. The M3 and M5 transistors act as common-source amplifier to
provide the voltage gain. The Rf resistors offer resistive feedback. The diode connected PMOS
transistors, M4 and M6, are used as load resistors. All the transistors have a gate length of 0.18um

R1=1O.6IkOhm

Rf= 4.53kQ

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SIMULATION RESULTS

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THIS GRAPH SHOWS INPUT CURRENT VS OUTPUT VOLTAGE


AS REQUIRED CURRENT IN THE RANGE OF micro Ampere IS CONVERTED TO
VOLTAGE IN THE SCALE OF Millivolts

EFFECT OF INCREASING RF (FEEDBACK RESISTANCE) ON OUTPUT VOLTAGE

FOR
RF=4.53KOhm,9.06KOhm,13.59KOhm,18.12Kohm,22.65KOhm27.18Kohm

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SYMBOL INSTANCE BUILT ( TO BE USED IN FURTHER DESIGN)

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8. REFERNCES

[1] G. Keiser, Optical fiber communications, ser. McGraw-Hill series in electrical and computer
engineering: Communications and signal processing. McGraw-Hill, 2000

[3] O. M. Saravanakumar, N. Kaleeswari, K. Rajendran,Design and Analysis of Two-Stage


Operational Transconductance Amplifier (OTA) using Cadence tool, ISSN 2250-2459

[3] S. Sze and K. Ng, Physics of Semiconductor Devices. Wiley, 2006

[4]Gupta,Levitan,Selavo,Chiarull, iHigh-Speed Optoelectronics Receivers in SiGe, University of


Pittsburgh

[5] T. Lee, The Design of CMOS Radio-Frequency Integrated Circuits.

[6] Pramod Ghimire, Equalizer for an Integrated Optical Receiver in 65nm CMOS,LUND
University,June 2013

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