AND8241/D

A 5.0 V/2.0 A Standby

Power Supply for INTEL
Compliant ATX Applications
Prepared by: Christophe Basso
ON Semiconductor

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APPLICATION NOTE

ATX power supply units (PSU) require a standby section

who keeps alive some particular areas of the motherboard.
Among the live sections are the USB ports, the Ethernet
controller and so on. The INTEL ATX Power Supply Design
Guide 2.01 (rev. June 04) describes the standby voltage rail
needed for this purpose. This is the +5.0 VSB section (3.3.3):
Output voltage: 5.0 V, 5%
Nominal load current: 2.0 A
500 ms pulses current (USB wake--up event): 2.5 A
Input power less than 1.0 W at 230 Vac for an output
power of 500 mW
Power on time: 2.0 s maximum
Short circuit protection with auto--recovery

subharmonic mode. A simple resistor to ground injects

the right compensation level.
Over Power Protection: a resistive network to the bulk
reduces the peak current capability and accordingly
harnesses the maximum power at high line. As this is
done independently from the auxiliary VCC, the design
gains in simplicity and execution speed.
Latch--off input: some PC manufacturers require a
complete latch--off in presence of an external event, e.g.
overtemperature. The controller offers this possibility
via a dedicated input.
Frequency dithering: the switching frequency (here
65 kHz) is modulated during operation. This naturally
spreads the harmonic content and reduces the peak
value when analyzing the signature.

On top of these requirements, most of PSU designers use

the standby power supply as an auxiliary rail to power the
main controller. This is an auxiliary 12--13 V rail or, if an
UC384X is implemented, this rail can go up to 20 V. When
put in standby, a small switch shuts down the controller by
interrupting this rail.
To help designers quickly fulfilling the above needs, the
NCP1027 has been introduced. This DIP 8 package hosts a
high performance controller together with a low RDS(on)
700 V BVdss MOSFET. On top of the standby needs, we
have packed other interesting goodies in this circuit. They
are summarized below:
Brown--out detection: the controller will not allow
operation in low mains conditions. You can adjust the
level at which the circuit starts or stops operation.
Ramp compensation: designing in Continuous
Conduction Mode helps to reduce conduction losses.
However, at low input voltage (85 Vac), the duty--cycle
might exceed 50%, and the risk exists to enter a

Semiconductor Components Industries, LLC, 2005

December, 2005 -- Rev. 0

Design Description
A full CCM operation gave us an adequate performance
in this particular case, with good full load efficiency results
as we will see. The part switches at 65 kHz which represents
a good trade--off between switching losses and EMI control.
A brown--out circuit was implemented, turning the SMPS on
around 80 Vac and turning it off at 60 Vac. Different values
can easily be selected by altering the dedicated resistive
network. Please note that this network impedance has a
direct influence on the standby power. To limit the amount
of current the supply can deliver at high line, it is necessary
to limit the propagation delay effects. The NCP1027 hosts
an exclusive circuitry used to reduce the maximum peak
current as the line increases. We will see that, once
implemented around the auxiliary diode, it does not affect
the standby power and nicely harnesses the maximum
power. The electrical schematic of the board appears on
Figure 1.

Publication Order Number:

AND8241/D

AND8241/D
TR1:
Lp = 3.4 mH
Np:Ns = 1:0.06
Np:Naux = 1:0.15

Bulk

R10
2.8 Meg

C7
100 mF
16 V

R11
2.2 Meg

R7
1k

C5
10 nF

R6
150 k
0.5 W

13 V

L1
2.2 mH

D1
MBRD835L
+

C1
1500 mF

R5
47

+ C2
1500 mF

R3
100
U3

D4
1N4937

+ C10
47 mF
400 V

R14
560 k

U1
NCP1027

C13
1 mF

8
7

R4
1k

C6
10 nF

R9
27 k

+
U2
TL431
R2
10 k

4
C9
100 pF

R8
78 k

R1
10 k

C4
0.1 mF

3
C8
10 mF
10 V

TR1

D4
1N4937

Aux.

C3
220
mF

5 V--2 A

R13
47 k

U3b

C11
2.2 nF
Type = Y1

Figure 1. The application board electrical schematic without the EMI filter for simpler representation.

Let us start the review by the transformer description.

where:
Lp, the primary inductance, 3.4 mH
N, the turn ratio, 0.06
Fsw, the switching frequency, 65 kHz
Vin, the input voltage
Vout, the output voltage
Calculations lead to the following mode transition load
values:

Transformer

The design of the transformer section represents the most

difficult part as standby power in no--load and 0.5 W output
must be respected. Various iterations have lead us to adopt
the following characteristics:
Lp = 3.4 mH
Np:Ns_power = 1:0.06
Np:Ns_aux = 1:0.152
The auxiliary winding in this case delivers 12.5 V but it
can be set to any other value, depending on the main
controller VCC. The turn ratio limits the reflected value on
the drain to less than 100 V, without risks of biasing the
MOSFET body diode at the lowest input voltage. This
transformer is available from Coilcraft under a reference
detailed in the Bill Of Material (BOM).
As we have seen, our design operates in CCM at full load
but obviously enters the Discontinuous Conduction Mode
(DCM) at light loads. The transition point can be evaluated
using the following formula:

NVin + Vout 2
Rc = 2LpN2Fsw
NVin

Lowest line, Vin = 120 Vdc: Rc = 4.56 or Iout = 1.0 A

Highest line, Vin = 370 Vdc: Rc = 2.4 or Iout = 2.0 A
Please note that low line is actually 85 Vac but the ATX
PSU including a large bulk capacitor, we can neglect the
ripple given the low output power of this converter, hence a
120 V value. At the highest line, the design operates at the
boundary between CCM and DCM. The duty--cycle at full
load and lowest input line can be evaluated via the flyback
static transfer function:
D=

Vout
NVin + Vout

(eq. 2)

The highest duty--cycle is found to be 41%. However, this

number is likely to increase a little, given the presence of the
leakage inductance.

(eq. 1)

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AND8241/D
Ramp Compensation

If the limit is set to 750 mA, then we have:

Being in CCM with a duty--cycle close to 50% (or above

50% in transient conditions), we need ramp compensation.
Several ways exist to evaluate the amount of ramp
compensation. The quickest one evaluates the off slope of
the secondary inductance and injects around 50% of this
slope through a compensating ramp (Sa ) into the controller.
With the NCP1027, the ramp compensation level is set via
a simple resistor connected from pin 2 to the ground, as
shown in Figure 1.
We can calculate the off slope, the one actually needed to
evaluate Sa , by reflecting the output voltage over the primary
inductance. The slope is projected over a complete
switching period.

Ifinal = 750 m + 100 100 n = 753 mA

3.4 m

(eq. 8)

Ifinal = 750 m + 374 100 n = 761 mA

3.4 m

(eq. 9)

The difference looks small but it often leads to a

significant different in output current capabilities, especially
with larger propagation delays. Hence, the need to act in
high line conditions via a dedicated circuitry.
The NCP1027 hosts a special section used to reduce the
maximum peak current limit as the mains increases. The
system works by connecting a resistive network to the bulk
capacitor, as Figure 2 depicts:

V
+ Vf
6 15 m
Soff = out
Tsw =
= 441 mA15 ms
0.06 3.4 m
NLp

Bulk

(eq. 3)
ROPPH

The NCP1027 features a current--mode architecture using

a SENSEFETt device. That is to say, the controller does not
directly sense the current via a resistor but through a Kelvin
cell. For this particular circuit, the cell ratio can be modeled
as an equivalent sense resistor of 350 m. This current slope
will thus become a voltage slope having a value of:
Soff = 0.441 0.375 = 165 mV15 ms

+
Cbulk

(eq. 4)

lb1

7
lb3

If we chose 50% of this down slope, then the final

compensation ramp will present a slope of:
Sa =

U1
NCP1027

lb2

Soff
= 83 mV15 ms = 5.53 kVs (eq. 5)
2

Following the data sheet indications, we evaluate the

resistor value to be:
Rramp = 7562 = 91 k
0.083

ROPPL

(eq. 6)

In case no ramp compensation is required, pin 2 must be

tied to VCC , the adjacent pin. As experiments were carried
at lower input voltages (Cbulk is small on the demo board),
it was decided to slightly increase the amount of ramp
compensation by reducing Rramp to 78 k.

Figure 2. A possible option to reduce the

peak excursion consists of connecting a
resistive divider to the bulk capacitor.

By injecting a current Ib3 proportional to Vbulk , the

maximum peak current limits reduces. Analytically
obtaining the right value for Ib3 might represent a
complicated exercise as many parameters play a role. To the
opposite, a simple experimental method can be setup to
obtain the value of the needed current:
1. Configure your working power supply as
suggested by Figure 3 or 4. These figures are
purposely simplified for ease of understanding of
the added circuitry. Figure 3 represents the safest
way to run the measurement as the dc power
supply injects current via an optoisolator without
sharing the converters ground. An amp--meter is
inserted to read the current Ib3. Leave the dc bias
to zero for now.
2. Power the converter and set the input voltage to
the highest of your specification. Let us assume it
is 375 Vdc.

Over Power Protection (OPP)

Power supply controllers sensing the primary current to

check whether it goes over a certain limit often face
propagation delay problems. That is to say, despite the
current limit detection by a dedicated comparator, the
information takes a certain amount of time to propagate
through the logic circuits and eventually reset the latch.
During this time, the primary current keeps increasing by a
rate given by the primary inductance and the input voltage.
Hence, we can quickly see the effects of a 100 ns delay at
high line or low line:
V
Ifinal = Ipeak_max + in tproper
Lp

(eq. 7)

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AND8241/D
5. At a certain time, if you continue to increase the
current in pin 7, the converter enters in protection
mode. The current flowing in pin 7 and the voltage
on it prior to the shutdown, correspond to the
variables you look for. In this example, we measured
a Vf voltage of 2.45 V and a current of 31 mA.

3. Increase the output current to the point where the

system should shut down per specification. Lets
say 3.2 A for this design.
4. Start to increase the variable power supply dc
voltage until the amp--meter deviates. Increase
carefully because you deal with hundred of mA only.
R4
10 k

U1
NCP1027

R2
10 k

8
7
S

3
+

Aux

Variable
Power Supply

IB3
R3
10 k

Figure 3. An isolated way to safely inject current into pin 7 at high line.

1
2

U1
NCP1027

R2
100 k

7
S

3
Aux

IB3

R3
10 k

Variable
Power Supply

Figure 4. A non--isolated way to inject current into pin 7 at high line.

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AND8241/D
The preliminary curve showing the relationship between
the injected current and the maximum peak current setpoint
appears in Figure 5. We can see that 31 mA corresponds to

a 20% reduction in the maximum peak current capability.

The Vf parameter specifies the voltage at which pin 7 starts
to pump in current. It is around 2.5 V as we can see it.

(IPEAK--IPEAKOPP)/IPEAK (%)

90.0%
80.0%
70.0%
60.0%
50.0%
40.0%
30.0%
20.0%
10.0%
0.0%
0

50

100

150

200

LOPP CURRENT (mA)

Figure 5. Maximum Peak Current Setpoint Reduction

vs. Pin 7 Injected Current

To compute the resistor values, we need to define the

range within which the OPP reduction should activate. As
we do not want any OPP action at low input voltages, we will
select resistors to start reducing at Vin = 200 Vdc, with a
clamp at Vin = 375 Vdc. Using the following equations and
our collected data leads us to the final values:
VbulkH = 375 Vdc
VbulkL = 200 Vdc
= 31 mA
IOPP
Vf
= 2.45 V
VbulkH --VbulkL
V = 70 k
IOPP(VbulkL --Vf) f

(eq. 10)

V
--V
ROPPH = ROPPL bulkL f = 5.6 M
Vf

(eq. 11)

ROPPL =

Unfortunately, despite the good behavior of the network,

its permanent presence on the bulk rail will affect the
consumption in standby. When you chase every hidden
milli--watt, it can become a nasty problem. To avoid this
trouble, a simple solution around the auxiliary winding can
be worked out. This is presented in Figure 6. During the on
time, where the power switch is turned on, the input voltage
appears across the primary transformer. Given the auxiliary
diode configuration, N . Vin + Vout also appears on the
cathode, N being the primary to secondary turn ratio. As this
voltage moves up and down with the bulk level, we can
perfectly use it for our OPP purposes. Due to its pulsating
low voltage nature, power consumption will be the smallest.

VCC
C7
100 mF
16 V
R7
1k

Aux.

D4
1N4937
1

ROPPH
560 k

U1
NCP1027

8
7

3
C8
10 mF
10 V

4
C9
100 pF

R8
78 k

5
ROPPL
47 k

U3b

Figure 6. The auxiliary diode lends itself very well to

a cheap and energy efficient OPP implementation.

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AND8241/D
Hooking an oscilloscope probe on D4 cathode gives us the
bulk image evolution between its minimum and maximum
values. We can then run the calculation again to obtain
ROPPH and ROPPL :
VbulkH = 55 Vdc
VbulkL = 37 Vdc
= 31 mA
IOPP
Vf
= 2.45 V

V
--V
Rupper = Rlower bulk1 BO
VBO
Rlower = VBO

Rupper
Rlower

2
PBO = 330
= 27 mW.
4.02 Meg

On the board, we purposely modified these values to

further improve the standby power.

OUTPUT CURRENT (A)

Auxiliary Winding

Without OPP

The auxiliary winding is set to deliver 13 V nominal when

the converter is fully loaded. To avoid any VCC drops during
transient loading, e.g. sudden load removal, the main VCC
capacitor C7 has been increased to 100 mF, leading to a
stable VCC in no--load conditions. The resistor R7 sets
the Overvoltage Protection (OVP) level by adjusting
the injected current in pin 1 internal shunt in case of
problems. With 1.0 k, the OVP level is set to
VOVP = 1.0 k 7.0 m + 8.7 = 15.7 V typical on the
auxiliary winding. Different values can be obtained by
changing the resistor values or the ratio between the power
and auxiliary windings.

4
With OPP

2
1
0
240

260

280

300

320

= 4.0 M
= 22 k

Total power dissipation at nominal line is then

Figure 7 shows the results before and after OPP

implementation. The output current stays below 3.5 A in all
cases which is well within specs.

(eq. 13)

Suppose we want to start at Vin = 110 Vdc (77 Vac) and

stop operation at Vin = 70 Vdc (50 Vac), then applying
Equations 12 and 13 leads to the following values:

ROPPH = 580 k 560 k after tweak

ROPPL = 41 k 47 k after tweak

Vbulk1 --Vbulk2
IBO (Vbulk1 --VBO)

(eq. 12)

340

360

INPUT VOLTAGE (Vdc)

Clamping Section

Figure 7. Over Power Protection at work keeps the

output current below 3.5 A.

The converter uses an RCD clamp to safely limit the

voltage excursion on the MOSFET drain. Failure to keep
Vds (t) below 700 V will permanently damage the circuit. In
application where the input line can be subject to strong
high--voltage parasitic pulses, we recommend the usage of
a Transient Voltage Suppressor (TVS), that will hard clamp
all potentially lethal spikes on the drain. Figure 8 portrays
the way to wire the TVS. Finally, the TVS offers superior
performance in standby power compared to the RCD clamp.
Simply because the RCD clamp always activates since the
capacitor discharges via the resistor R as soon the leakage
inductance is reset. Unfortunately, even in standby, this
mechanism generates light losses. If you want to further save
50 mW, a TVS is of good usage. A 200 V TVS has shown
to be a good solution here. You can use the 1.5KE200A from
ON Semiconductor for instance.

Brown--out

Brown--out (BO) detection offers a means to protect the

converter in presence of low input voltages by stopping
switching operation until the mains comes back to a normal
value. The circuit works by observing a fraction of the bulk
level via a resistive divider routed to pin 2. When the level
on pin 2 lies below 0.6 V, the controller does not allow
switching operation, but the high--voltage current source
maintains the VCC on pin 1. Then, as soon as pin 2 voltage
crosses 0.6 V, the VCC is ready to power the chip and
switching can start. As this occurs, pin 2 injects around
12 mA (IBO ) in the resistive bridge to create a hysteresis. The
designer must thus select the turn--on and turn--off voltages
to further apply the following equations:

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AND8241/D
Secondary Side

Vbulk

D2
1.5KE220A

The secondary side uses a Schottky diode featuring an

8.0 A capability and a breakdown voltage of 35 V. This is
enough since high line conditions imply a Peak Inverse
Voltage (PIV) of:

PIV = NVin + Vout = 0.06 370 + 5 = 27.2 V

(eq. 14)

5
D1
1N4937

The forward voltage Vf goes down to 0.41 V @ Tj = 125

which, neglecting ohmic losses, induces conduction losses
of:

Pdiode = IRMS2Rd + IavgVf 2 0.41 = 0.8 W

(eq. 15)

The output capacitor Cout is selected to a) pass the

adequate RMS current b) limit the undershoot V when the
output is banged by a current step I. The undershoot depth
of a closed--loop converter having a bandwidth fc can be
evaluated via the following formula:

Figure 8. A TVS must be used if the input voltage

can be subject to high voltage spikes.

V =

I
fcCout

Calculations gave us a value of 2.4 mF, made of two

low--impedance 10 V/1200 mF capacitors.
A TL431 ensures a stable regulation at 5.0 V via a type--2
amplifier. R3 and the NCP1027 internal pullup resistor set
the midband gain, whereas C4 sets the zero position. The
small capacitor C9 filters out residual noise and adds a high
frequency pole, acting together with the optocoupler one.
The step load response is clean, without any ringing at both
high and low line conditions. The circuit can be slightly
modified to add some more soft--start, in case designers
would fear output overshoots. Figure 10 shows how to
connect a 1.0 mF/10 V capacitor to soften the start--up
sequence:

Figure 9. Always check the voltage on the drain at

the highest line condition (265 Vac).
D1
MBRD835L

L1
2.2 mH
+5 V

C1
1500 mF

C2
1500 mF

C3
220 mF
0

R3
100

R4
1k

U3

(eq. 16)

C4
0.1 mF

X3
TL431

Css
1 mF

R1
10 k

R2
10 k

Figure 10. A 1.0 mF capacitor connected on the TL431

strengthens the startup sequence.

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AND8241/D
The basic description being done, let us have a look at the board performance. Standby measurements were captured with
a Yokogawa WT210 on a board after it warmed up for 15 minutes. Please make sure the WT210 volt--mater is placed before
the current shunt, otherwise its input impedance will degrade the low--power measurements by 30 mW at high line.
Static Measurements

Vin = 230 Vac

Tambient = 25C
Pout = 0
Pout = 0.5 W
Pout = 10 W

Pin = 88 mW
Pin = 779 mW
Pin = 12.3 W

Vaux = 10.14 V
Vaux = 11.64 V
Vaux = 12.14 V

= 64.2%
= 81.3%

Please note that replacing R6 by a 200 V TVS as mentioned in the text, reduces the input power at 0.5 W @ 230 Vac down
to 715 mW and 73 mW at no load.
Pout = 0
Pout = 0

Pin = 98 mW at Vin = 265 Vac with RCD

Pin = 85 mW at Vin = 265 Vac with TVS

Tcase NCP1027 = 50C at Pout = 10 W

Short--circuit temperature: NCP1027 Tcase = 42C, Tdiode = 52C
Maximum output current: 3.0 A @ 265 Vac
Vin = 85 Vac
Tambient = 25C
Pout = 0
Pout = 0.5 W
Pout = 10 W

Pin = 54 mW
Pin = 704 mW
Pin = 12.6 W

Vaux = 10.15 V
Vaux = 11.6 V
Vaux = 12.6 V

= 71%
= 79.5%

Tcase NCP1027 = 60C at Pout = 10 W

Short--circuit temperature: Tcase NCP1027 = 44C, Tdiode = 52C
Maximum output current: 3.1 A
Dynamic Measurements

Some critical waveforms have been captured on the demonstration board and are reproduced below:

Figure 11. Short--Circuit Protection, Drain--Source Waveform

In Figure 11, we can see the power supply operating in a

so--called hiccup mode, trying to re--start as soon as the
internal timer has elapsed. The resulting duty--burst stays

below 8%, keeping all component temperatures at a moderate

level. This is an auto--recovery type of protection, implying
a re--start when the fault is removed (Vin = 230 Vac).

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AND8241/D

10 W
0W
0.5 W

Figure 12. Startup Sequence at Three Loading Conditions

Figure 12 shows a typical startup sequence, captured at

different output levels (0, 0.5 W and 10 W) for Vin = 85 Vac.
Changing the input voltage does not modify the shape of the

waveform. This waveform has been captured with the

1.0 mF wired as suggested by Figure 10.

Figure 13. Load step where Vout is banged from 0.1 A to 2.5 A with a
1.0 A/ms slew--rate (Vin = 85 Vac).

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AND8241/D

Figure 14. Load step where Vout is banged from 0.1 A to 2.5 A with a
1.0 A/ms slew--rate (Vin = 230 Vac).

Figures 13 and 14 represent the step load response from

the standby mode to the wake--up mode, featuring a
variation from 100 mA up to 2.5 A. The spike you can see

on the waveforms comes from the current discontinuity

indured by the LC filter inductor L1 .

Figure 15. Peak--to--peak ripple, Pout = 0.5 W, Cable length = 30 cm, Vin = 85 Vac.

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AND8241/D

Figure 16. Peak--to--peak ripple, Pout = 0.5 W, Cable length = 30 cm, Vin = 230 Vac.

Figures 15 and 16 display the ripple amplitude when the

board enters skip cycle, mainly at a 0.5 W output power. The

measurement has been carried at two line levels and using

30 cm long cables to mimic a real PSU cabling connector.

High Line

Low Line

Figure 17. EMI signature, low line and high line in quasi--peak, Pout = 10 W.

Figure 17 shows the advantage of EMI jittering, offering

a clean signature at both line levels. As the sweep is

successfully made in Quasi--Peak (QP) it implies immediate

compliance in average mode.

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AND8241/D

High Line

Low Line

Figure 18. Peak Output Current in Short--Circuit at Both Line Conditions: 6.3 A

54 ms

676 ms

Figure 19. Output Current Waveform in Short--Circuit

Some PC application specs require the output average and

RMS currents in short--circuit to stay within given limits.
With this design, we have obtained the following results at
high--line:

S Ipeak = 6.4 A
S Iout,av = 6.4 x 54 / 676 = 511 mA
S Iout,rms = 6.4

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54 = 1.8 A
676

AND8241/D
PCB Views

The PCB routing includes large copper areas around the

integrated circuit to maximize its power dissipation. The

diode is placed on the copper side and due to its low Vf, it
leads to good thermal performance.

Figure 20. The PCB Copper Area of the Demonstration Board

Figure 21. The SMD Positions on the Copper Side

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AND8241/D

Figure 22. Component Side View

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AND8241/D
Bill of Material
Manufacturer
Part Number

Substitution
Allowed

Lead
Free

General
Semiconductor

DF08M

Yes

No

20%

Panasonic

EEUFC1C122

Yes

47 mF/400 V

20%

Panasonic

ECA2GHG470

Yes

Capacitor, Y1 Class

2.2 nF/400 V

20%

Vishay

WKP222

No

Capacitor, X2 Class

220 nF/275 V

20%

Evox Rifa

PHE840MX6220M

No

C13

Radial Lead Electrolityc Capacitor

1 mF/50 V

20%

Panasonic

EEUFC1H1R0

Yes

C3

Radial Lead Electrolityc Capacitor

220 mF/16 V

20%

Panasonic

EEUFC1C221

Yes

C4

SMD Capacitor

100 nF

10%

Epcos

B37872--K5104--K60

Yes

C5

Polyester Chip Capacitor

10 nF/630 V

10%

Vishay

MKT1822--310

Yes

C6

SMD Capacitor

10 nF

10%

Epcos

B37872--K5103--K60

Yes

C7

Radial Lead Electrolityc Capacitor

10 mF/63 V

20%

Elna

RE3--63V100M

Yes

C8

Radial Lead Electrolityc Capacitor

100 mF/10 V

20%

Panasonic

EEUFC1A101

Yes

C9

SMD Capacitor

1 nF

10%

1206

Epcos

B37872--K5102--K60

Yes

DPAK

Designator

Quantity

Description

Value

Tolerance

B1

Single--Phase Bridge Rectifier

800 V

NA

C1,C2

Radial Lead Electrolityc Capacitor

1200 mF/16 V

C10

Radial Lead Electrolityc Capacitor

C11

C12

Footprint

1206

1206

Manufacturer

D1

Schottky Barrier Rectifier

35 V/8 A

NA

ON Semiconductor

MBRD835L

Yes

Yes

D2,D4

Fast--Recovery Rectifier

600 V/1 A

NA

ON Semiconductor

1N4937

Yes

Yes

J1

PCB Connector

NA

NA

Multicomp

JR--201S

Yes

J2

PCB Connector

NA

NA

Weidmuller

PM5.08

Yes

L1

Inductor, 2.2 mH, 2.5 A

2.2 mH

NA

Wurth Elektonic

744772022

Yes

L2

Common Mode Inductor, 2*27 mH

27 mH

NA

Schaffner

RN114--0,8/02

Yes

R1

Axial Lead Resistor 1/4w

10 k

5%

Neohm

CFR25J10K0

Yes

R10

Axial Lead Resistor 1/4w

2.8 M

5%

Neohm

CFR25J2M8

Yes

R11

Axial Lead Resistor 1/4w

2.2 M

5%

Neohm

CFR25J2M2

Yes

R13

Axial Lead Resistor 1/4w

47 k

5%

Neohm

CFR25J47K0

Yes

R14

Axial Lead Resistor 1/4w

560 k

5%

Neohm

CFR25J560K

Yes

R2

SMD Resistor

10 k

1%

1206

Vishay

CRCW1206101J

Yes

R3

SMD Resistor

100

1%

1206

Vishay

CRCW1206100RJ

Yes

R4

Axial Lead Resistor 1/4w

680

5%

Neohm

CFR25J680

Yes

R5

Axial Lead Resistor 1/4w

47

5%

Neohm

CFR25J47

Yes

R6

Axial Lead Resistor 1w

150 k/1 W

5%

Neohm

CFR100J150K0

Yes

R7

Axial Lead Resistor 1/4w

1 k

5%

Neohm

CFR25J1K0

Yes

R8

SMD Resistor

78 k

1%

1206

Vishay

CRCW1206781J

Yes

R9

SMD Resistor

27 k

1%

1206

Vishay

CRCW1206271J

Yes

U1

NCP1027

NA

NA

DIP8

ON Semiconductor

NCP1027

No

Yes

U2

Adjustable Shunt Regulator

2.5--36 V/
1--100 mA

2.20%

TO92

ON Semiconductor

TL431

No

Yes

U3

Optocoupler

NA

NA

DIP4

Vishay

SFH615A

No

T1

Transformer

NA

NA

Coilcraft

DA2077--AL

No

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15

AND8241/D

SENSEFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).

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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights
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