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    4051 PDF

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    4051 PDF

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    UNISONIC TECHNOLOGIES CO.

    , LTD
    4051

    CMOS IC

    8-CHANNEL ANALOG
    MULTIPLEXERS/DEMULTIPLEXERS
    SOP-16

    DESCRIPTION
    UTC 4051 is single 8-channel analog multiplexers/demultiplexers
    for application as digitallycontrolled analog switches.
    The device has three binary control inputs and an inhibit input. It
    feature low ON impedance and very low OFF leakage current.
    Control of analog signals up to the complete supply voltage range
    can be achieved.

    FEATURES

    DIP-16

    TSSOP-16

    * Wide Analog Voltage Range: VDDVEE = 3V~18V.


    (Note: VEE must beVSS)
    * Break-Before-Make Switching Eliminates Channel Overlap.
    * Linearized Transfer Characteristics
    * Implement an SP8T solid state switch effectively.
    * PintoPin Replacement for CD4051

    *Pb-free plating product number: 4051L

    ORDERING INFORMATION
    Order Number
    Normal
    Lead Free Plating
    4051-S16-R
    4051L-S16-R
    4051-S16-T
    4051L-S16-T
    4051-P16-R
    4051L-P16-R
    4051-P16-T
    4051L-P16-T
    4051-D16-T
    4051L-D16-T

    Package

    Packing

    SOP-16
    SOP-16
    TSSOP-16
    TSSOP-16
    DIP-16

    Tape Reel
    Tube
    Tape Reel
    Tube
    Tube

    www.unisonic.com.tw
    Copyright 2005 Unisonic Technologies Co., LTD

    1 of 6
    QW-R502-054,A

    4051

    CMOS IC

    PIN CONFIGURATION
    X4

    16 VDD

    X6

    15 X2

    14 X1

    X7

    X5

    12 X3

    INH

    11 A

    VEE

    10 B

    VSS

    9 C

    UTC 4051

    13 X0

    PIN DESCRIPTION
    PIN No.
    3
    6
    7
    8
    11,10,9
    13,14,15,12,1,5,2,4
    16

    SYMBAL
    X
    INH
    VEE
    VSS
    A,B,C
    X0~X7
    VDD

    NAME AND FUNCTION


    Common Input/Output
    Inhibit Inputs
    Supply Voltage
    Ground
    Binary Control Inputs
    Independent Inputs/Outputs
    Positive Supply Voltage

    UNISONIC TECHNOLOGIES CO., LTD


    www.unisonic.com.tw

    2 of 6
    QW-R502-054,A

    4051

    CMOS IC

    ABSOLUTE MAXIMUM RATING


    PARAMETER
    DC Supply Voltage (Referenced to VEE, VSSVEE)

    SYMBOL
    VDD

    RATINGS
    -0.5 ~ +18

    UNIT
    V

    Input or Output Voltage (DC or Transient)


    VIN, VOUT
    -0.5 ~ VDD +0.5
    V
    (Referenced to VSS for Control Inputs and VEE for Switch I/O)
    Input Current (DC or Transient), per Control Pin
    IIN
    10
    mA
    Switch Through Current
    ISW
    25
    mA
    500
    mW
    Power Dissipation
    PD
    mW/
    Derating above 65
    7

    Junction Temperature
    TJ
    125

    Operating Temperature Range


    TOPR
    -40 ~ +125

    Storage Temperature Range


    TSTG
    -40 ~ +150
    Note: 1.Absolute maximum ratings are those values beyond which the device could be permanently damaged.
    Absolute maximum ratings are stress ratings only and functional device operation is not implied.
    2.The device is guaranteed to meet performance specification within 0~70 operating temperature range
    and assured by design from 40~125.

    ELECTRICAL CHARACTERISTICS (Ta=25, unless otherwise specified.)


    PARAMETER
    SYMBOL
    TEST CONDITIONS
    MIN
    TYP
    MAX
    SUPPLY REQUIREMENTS (Voltages Referenced to VEE)
    VDD 3.0VSSVEE
    3
    18
    Power Supply Voltage Range
    VDD
    VDD=5V
    0.005
    5
    Control Inputs: VIN = VSS or VDD
    Quiescent Current per
    Switch I/O: VEE VI/O VDD,
    IQ
    VDD=10V
    0.010
    10
    Package
    and Vsw500mV(Note 2)
    VDD=15V
    0.015
    20
    =25
    only
    (The
    channel
    T
    a
    VDD=5V
    (0.07 A/kHz) f + IQ
    Total Supply Current
    (Dynamic Plus Quiescent, VDD=10V
    ID(AV) component, (VIN-Vout)/Ron, is (0.20 A/kHz) f + IQ
    not included.)
    Per Package)
    (0.36 A/kHz) f + IQ
    VDD=15V
    SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to VEE)
    Recommended PeaktoPeak
    VI/O
    Channel On or Off
    0
    VDD
    Voltage Into or Out of the Switch
    Recommended Static or Dynamic
    Vsw Channel On
    0
    600
    Voltage Across the Switch
    Output Offset Voltage
    VO(OFF) VIN = 0V, No Load
    10
    Vsw500mV
    VDD=5V
    250
    1050
    ON Resistance
    VIN = VIL or VIH (Control), and
    RON
    VDD=10V
    120
    500
    VIN = 0 to VDD (Switch)
    VDD=15V
    80
    280
    ON Resistance Between VDD=5V
    25
    70
    Any Two Channels in the
    RON
    VDD=10V
    10
    50
    Same Package
    10
    45
    VDD=15V
    VIN = VIL or VIH (Control)
    0.05
    100
    Channel to Channel or Any
    OffChannel Leakage Current
    IOFF
    One Channel, VDD=15V
    Capacitance, Switch I/O
    CI/O
    Inhibit = VDD
    10
    Capacitance, Common O/I
    CO/I
    Inhibit = VDD
    17
    Pins Not Adjacent
    0.15
    Capacitance, Feedthrough
    CI/O
    Pins Adjacent
    0.47
    (Channel Off)

    UNISONIC TECHNOLOGIES CO., LTD


    www.unisonic.com.tw

    UNIT
    V
    A

    VPP
    mV
    V

    nA
    pF
    pF
    pF

    3 of 6
    QW-R502-054,A

    4051

    CMOS IC

    ELECTRICAL CHARACTERISTICS(Cont.)
    PARAMETER
    SYMBOL
    TEST CONDITIONS
    CONTROL INPUTS INHIBIT A, B, C (Voltages Referenced to VSS)
    VDD=5V
    Low Level Input Voltage
    VIL
    RON= per spec, IOFF = per spec
    VDD=10V
    VDD=15V
    VDD=5V
    High Level Input Voltage
    VIH
    RON= per spec, IOFF = per spec
    VDD=10V
    VDD=15V
    Input Leakage Current
    ILEAK VIN= 0 or VDD, VDD=15V
    Input Capacitance
    CIN

    MIN

    TYP

    MAX

    UNIT

    1.5
    3.0

    6.75
    3.5
    7
    11

    2.25
    4.50
    4.0
    2.75
    5.5
    8.25
    0.00001
    5.0

    V
    0.1
    7.5

    A
    pF

    DYNAMIC ELECTRICAL CHARACTERISTICS


    (CL = 50pF, Ta=25, VEEVSS, unless otherwise specified)
    PARAMETER

    SYMBOL

    Propagation Delay Times


    Switch Input to Switch
    Output (RL = 10 k)

    tPLH, tPHL

    Inhibit to Output

    tPHZ, tPLZ
    tPZH, tPZL

    Control Input to Output

    tPLH, tPHL

    Total Harmonic Distortion

    THD

    VDDVEE
    Vdc
    5
    10
    15
    5
    10
    15
    5
    10
    15
    10

    TEST CONDITIONS
    tPLH, tPHL =(0.17 ns/pF)CL + 26.5ns
    tPLH, tPHL =(0.08 ns/pF)CL + 11ns
    tPLH, tPHL =(0.06 ns/pF)CL + 9ns
    (RL=10k, VEE=VSS)
    Output 1 or 0 to High Impedance,
    or High Impedance to 1 or 0 Level
    RL = 10 k, VEE = VSS

    MIN

    TYP

    MAX

    35
    15
    12
    350
    170
    140
    360
    160
    120
    0.07

    90
    40
    30
    700
    340
    280
    720
    320
    240

    UNIT
    ns

    ns

    ns

    RL = 10K, f = 1 kHz, Vin = 5 VPP


    %
    RL = 1k, VIN = 1/2 (VDDVEE) pp,
    Bandwidth
    BW
    10
    17
    MHz
    CL = 50pF, 20 Log (Vout/Vin) = -3dB)
    RL=1K, VIN = 1/2 (VDDVEE) pp
    Off Channel Feedthrough
    10
    -50
    dB
    Attenuation
    fIN = 4.5 MHz
    RL = 1k, VIN = 1/2 (VDDVEE) pp
    Channel Separation
    10
    -50
    dB
    fIN = 3MHz
    Crosstalk, Control Input to
    R1 = 1k, RL = 10k Control
    10
    75
    mV
    Common O/I
    tTLH = tTHL = 20ns, Inhibit = VSS
    Note 1. Data of TYP is intended as an indication of the ICs potential performance.
    2. For voltage drops across the switch(Vsw)>600mV (>300mV at high temperature), excessive VDD current
    may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The
    reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

    UNISONIC TECHNOLOGIES CO., LTD


    www.unisonic.com.tw

    4 of 6
    QW-R502-054,A

    4051

    CMOS IC

    TEST CIRCUIT

    VDD

    VDD

    VDD

    IN/OUT

    OUT/IN

    VEE

    VDD
    LEVEL
    CONVERTED
    CONTROL

    OUT/IN

    IN/OUT

    CONTROL

    VEE

    Switch Circuit Schematic

    TRUTH TABLE
    16

    Control Inputs
    INHIBIT C
    B

    ON Switches

    0
    0
    0
    0

    0
    0
    0
    0

    0
    0
    1
    1

    0
    1
    0
    1

    X0
    X1
    X2
    X3

    0
    0
    0
    0

    1
    1
    1
    1

    0
    0
    1
    1

    0
    1
    0
    1

    X4
    X5
    X6
    X7

    1
    x
    x = Dont Care

    None

    INH 6
    A 11
    B 10
    C 9

    X0 13

    VDD

    LEVEL
    CONVERTER
    8

    VSS

    BINARY TO 1 - OF - 8
    DECODER WITH
    INHIBIT

    VEE

    X1 14
    X2 15
    X3 12

    3X

    X4 1
    X5 5
    X6 2
    X7 4
    UTC 4051 Functional Diagram

    UNISONIC TECHNOLOGIES CO., LTD


    www.unisonic.com.tw

    5 of 6
    QW-R502-054,A

    4051

    CMOS IC

    TYPICAL CHARACTERISTICS
    350

    VDD = 7.5 V
    300 VEE = - 7.5 V

    "ON" Resistance, RON ()

    "ON" Resistance, RON ()

    350

    Ta =25

    250
    200
    150
    100
    50
    0
    -10 -8.0 -6.0 -4.0 -2.0

    2.0 4.0 6.0 8.0 10

    Input Voltage , VIN (V)

    VDD = 5.0 V
    300 VEE = -5.0 V
    Ta =25

    250
    200
    150
    100
    50
    0
    -10 -8.0 -6.0 -4.0 -2.0

    2.0 4.0 6.0 8.0 10

    Input Voltage , VIN (V )

    350
    "ON" Resistance, RON ()

    VDD = 2.5 V
    300 VEE = - 2.5 V
    Ta =25

    250
    200
    150
    100
    50
    0
    -10 -8.0 -6.0 -4.0 -2.0

    2.0 4.0 6.0 8.0 10

    Input Voltage , VIN (V )

    UTC assumes no responsibility for equipment failures that result from using products at values that
    exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
    other parameters) listed in products specifications of any and all UTC products described or contained
    herein. UTC products are not designed for use in life support appliances, devices or systems where
    malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
    whole or in part is prohibited without the prior written consent of the copyright owner. The information
    presented in this document does not form part of any quotation or contract, is believed to be accurate
    and reliable and may be changed without notice.

    UNISONIC TECHNOLOGIES CO., LTD


    www.unisonic.com.tw

    6 of 6
    QW-R502-054,A

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