POWER designer

Expert tips, tricks, and techniques for powerful designs

No.
No 119
o. 120
19
Calculating Losses and Junction Temperature for
Feature Article ............... 1-7 High-Power-Density Switching Converters
High-Power Density — By Matthew Reynolds, Principal Applications Engineer
Switching Regulators
LM2830/31/32 ......................2 Introduction
Today’s silicon fabrication technology has allowed power conversion ICs to increase
Dual High-Power Density power density by an order of magnitude from the technology that existed just five
Switching Regulator years ago. Smaller geometries and other power-process improvements have enabled
LM26400Y ............................4 National Semiconductor to create more efficient devices. Increases in efficiency are
realized by new intellectual property including lower RDS-ON and lower capacitive
devices. Further, smaller silicon geometries decrease the size of the logic circuits,
allowing for a greater amount of space for the main power-pass elements.
In the last five years, National Semiconductor has leveraged new process tech-
nologies and created a family of buck, boost, and buck-boost converters, as well
as Single-Ended Primary Inductor Converters (SEPICs) in small packages that
are industry leaders in power density. Examples of devices available today are
the LM2734Z, LM2830/31/32 buck converters, and the LM2735 boost and
SEPIC converter. The LM2734Z has an input voltage range of 3V to 20V and
a switching frequency of 3 MHz. The LM2830/31/32 buck converters hold a
leadership position in power density as does the LM2735 converter. This article
will provide an overview of these devices as well as application circuits and tips
that are helpful in using high-density DC-DC monolithic converters.
To explain how fabrication process developments increase efficiency, one must
first understand power losses in a monolithic DC-DC converter. Losses can be
categorized into two types: conduction losses and switching losses. Conduction
losses are the easiest to understand, and these will be addressed first.
Conduction Losses
All silicon devices have resistance associated with them. Conduction of current
through resistances in the IC and package results in IRMS2 x R power losses.
To illustrate the losses within a DC-DC converter, it is useful to consider the
buck converter. The buck converter is the most common DC-DC converter
today. This topology produces an output voltage lower in magnitude than the
input voltage.

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High power density 550 kHz, 1.6 MHz, or 3 MHz frequency

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VOUT
VIN
(Down to 0.6V)
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IN SW
Microcontroller,
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On
Memory,
Off EN CPLD,
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FB
PGND
Internal compensation
simplifies design

Ultra-low 30 nA Cycle-by-cycle current limit

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LM2831 Efficiency vs Output Current

96
Product ID IOUT Packaging 94
LM2830 1A SOT23-5, LLP-6 92
Efficiency (%)

LM2831 1.5A SOT23-5, LLP-6 90

88
LM2832 2A eMSOP-8, LLP-6
86
84
82

80
0 0.5 1 1.5
Ideal for use in multimedia set-top boxes, USB–
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2
POWER designer
Calculating Losses and Junction Temperature for High-Power-Density
Switching Converters
Area 1 TS
SS V CC V DD Control FET
VIN
VDIFF
VSW
+VL - D’TS
VSW VOUT
LOGIC
IIND -AVE
IIND

Area 2 Area 4
VFB
-
+ VREF
+
- Synchronous FET VDIFF
and Body Diode Area 3 DTS
TD TD TD
V EN V FB GND Area 5

Figure 3. Losses within a Buck Converter

Figure 1. Simplified Buck Converter Schematic
D = Duty Cycle
A simplified diagram of a synchronous converter D’ = (1 - D)
and its associated waveforms are shown in Figure 1 FSW = Switching Frequency
and Figure 2. The power loss during the DTS interval is:
PCTRL = IRMS x VDIFF x D
VIN or PCTRL = IRMS2 x RDSON - CTRL x D
VSW(t) TON TOFF
where IRMS is the output-load current in a buck
converter.
t During the D’TS period, the bottom synchronous
VIN - VOUT
VL(t)
FET is on. RDSON-SYNC can be empirically cal-
culated knowing the load current and the voltage
t difference between GND and the switch node.
VOUT The power loss during the D’TS interval is:
PSYNC = IRMS x VDIFF x D’
IL(t) iL or PSYNC = IRMS2 x RDSON - SYNC x D’
Switching Losses
D TS t
Switching losses are a bit more difficult to calculate,
Figure 2. Simplified Buck Converter Waveforms
but with good bench practices very accurate results
can be obtained.
Switching losses occur during the transition from
Figure 3 is an illustration of the typical switch-node one MOSFET being turned on while the other
voltage and inductor-current waveform. These wave- MOSFET is being turned off. Figure 3 illustrates
forms explain the losses in one switching cycle. that this transition occurs twice in one switching
The conduction losses for one full switching cycle cycle (Area 3 and Area 4). The inductor current is
are illustrated in Area 1 and Area 2. During the continuous; therefore there will always be a path
DTS part of a switching cycle, the control FET for this current even if both MOSFETs are off. The
is on, and conduction losses in Area 1 are calcu- synchronous MOSFET body diode conducts the
lated. RDSON-CTRL can be empirically calculated by current during the dead time when both MOSFETs
knowing the load current and the voltage difference are off. A typical switching cycle is as follows: Start
between VIN and the switch node. with the control MOSFET on, and the synchro-
nous MOSFET off. At time DTS, the converter’s
loop signals the control MOSFET to turn off. Both
power.national.com
3
 Tiny Boost Regulator Provides Ease-of-Use and
High Output Current

LM2735 Delivers 2.1A Switch, Internal Compensation in Tiny Packages

Typical Application Circuit

Efficiency vs Load Current VOUT = 12V
VIN VOUT
15 µH 100
2.7V to 5.5V 12V 5 VIN
90

330 pF 80

Efficiency (%)
100 kΩ
3 VIN
4 3
70
EN FB 10 µF
LM2735 2 60
GND
5 1 50
VIN SW
40
22 µF
30
0.01 0.1
Output Load (A)

Features
High Output Current
• 2.1A Switch current over full temperature range
• Boost from 5V to 12V at 700 mA

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• Internal compensation allows for ease-of-use and minimal external components
• 1.6 MHz operating frequency uses tiny passive components
• SOT23-5, LLP-6, and eMSOP8 packages ideal for space constrained applications

Product ID VIN Range Switch Current VOUT Max Frequency Ideal For Package
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LM2733 2.7V to 14V 1A 40V 1.60 MHz current sources SOT23-5
LCD and OLED displays for portable SOT23-5
NEW 520 KHz applications, USB powered devices, LLP-6,
LM2735 2.7V to 5.5V 2.1A 24V 1.60 MHz white LED current source eMSOP-8

For FREE samples, datasheets, online design tools, and more, visit us today:
power.national.com

4
POWER designer
Calculating Losses and Junction Temperature for High-Power-Density
Switching Converters
MOSFETs are to be off for a short period of time in was common to see 50 nS rise and fall times five
order to eliminate “shoot through”. Shoot through is years ago. Today, similar applications with newer
a term used to describe what would happen if both technology delivering 5 nS rise and fall times are
MOSFETs were on at the same time, and allowing commonly seen. This is a significant improvement
VIN to be shorted to ground. This would create a very in order of magnitude.
large current spike through both MOSFETs. As the By looking at the previous equations for transition
current ramps down in the control MOSFET, the losses, one can see how the switching losses easily
body-diode current increases. There are losses associ- could be much greater in a lower switching-fre-
ated with this transition, and it can be approximated quency converter, depending on the two different
with simple geometry. The area of the two triangles is technologies being compared. These improvements
a fairly good approximation of the power loss in the in switching transition times have allowed National
rising and falling transitions. The area of a triangle is to create 3 MHz converters with decreased losses
1/2 base x height. The power loss during the falling compared to previous generations of lower
transition is: switching-frequency converters. Higher switching-
PSWF = 1/2(VIN x IOUT x FSW x TFALL) frequency converters also allow the customer to use
The power loss during the rising transition is: smaller external capacitors and inductors allowing
PSWR = 1/2(VIN x IOUT x FSW x TRISE) for a much smaller total application space.
The losses associated with the time that only the A significant loss in a buck converter application
synchronous FET body diode is on are: is the conduction loss in the external inductor.
PDIODE = (VD x IOUT x FSW x TD) The inductor has continuous current through the
DTS and D’TS periods, and RDCR losses can be
The quiescent power losses associated with power-
significant. For a given amount of PCB space for a
ing internal circuitry can be empirically measured
converter, a lower-value inductor will allow a larger
by powering the device and disconnecting any load
wire diameter and lower power loss.
from the output. The input current drawn multiplied
by the input voltage is a good approximation of the The time that the body diode is on (time TD), is
quiescent power loss. another significant power loss that can be minimized
with proper design. This time can increase or
PQ = IIN x VIN
decrease depending on changes in input voltage
Now that all significant power losses have been and output load. By implementing active circuitry
calculated, the overall efficiency can be calculated: that minimizes this time, the body diode losses are
POUT POUT
Efficiency = H = = minimized within the IC. Many National synchro-
PIN POUT + PLOSS
nous-buck-converter designs use active circuitry
Where PLOSS = PSWF + PSWR + PDIODE +PSYNC +PCTRL +PQ
that reduces this time.
After understanding the most significant losses
associated with a buck converter, it will be easier to Thermals
see how recent advances in silicon technology have After it is understood how losses in a DC-DC
allowed National Semiconductor to create a family converter are calculated, it becomes easier to
of high-density SOT-23 switchers. One of the easiest determine the temperature of the silicon junction
methods to describe the improvements is to discuss of a specific application.
a common myth about monolithic power converters Calculating junction temperature with any amount
and efficiency. It is fairly common to hear that “if of accuracy when using monolithic DC-DC
you want to improve efficiency, you need to use a converters has always been difficult for the customer.
lower switching-frequency device”. This is true only Often there is a recommended maximum junction
when comparing two DC-DC converters that are temperature from the IC manufacturer without an
fabricated on similar processes. As an example, it accurate means of measuring this temperature.
power.national.com
5
POWER designer
Calculating Losses and Junction Temperature for High-Power-Density
Switching Converters
The junction temperature of the device needs to be Therefore it would be improper to calculate the
calculated to ensure reliable operation in a given junction temperature using the R⍜JC value given on
application. There are many “rules of thumb” and the datasheet, while monitoring just the top-case
helpful guides within National’s datasheets. Fol- temperature.
lowing are also a couple of easy methods that will In order to properly calculate the junction tempera-
approximate the junction temperature of the device ture in the laboratory, one could define a thermal
in a specific application. impedance that allows us to measure the top-case
R⍜JA, R⍜JC, and R⌿JC Definitions: temperature with a thermal sensor attached. Let
R⍜JA: Thermal impedance from silicon junction to R⌿JC represent the thermal impedance associated
ambient air temperature. The units of measurement with just the top case to silicon junction.
are °C/Watt. Another common thermal impedance used to
T -T calculate junction temperature in the laboratory
R5JA = J A
PDISSIPATION is R⌿J-PCB. This thermal impedance is defined as
the thermal resistance from the silicon junction to
R⍜JC: Thermal impedance from silicon junction to
the ground lead of the device.
device case temperature.
These two thermal impedances allow the end user
TJ - TCASE
R5JC = to calculate the junction temperature of our devices
PDISSIPATION
using the following method.
Most data sheets contain values for R⍜JA and R⍜JC ROCASE-AMB
for each package. The datasheet values for R⍜JA and
TCASE
R⍜JC are given so that a comparison can be made COCASE-AMB

between the thermal performances of one package

ROJ-CASE
to another. To compare packages, all other variables COJ-CASE
INTERNAL
must be held constant (such as PCB size, copper PDISS Small PDISS-TOP TAMBIENT
weight, thermal vias, and power dissipation). This Large PDISS-PCB
sheds some light on package performance, but it TJUNCTION

can be misleading to use these values to calculate the ROJ-PCB COJ-PCB

actual junction temperature in a given application.

DEVICE
R⍜JA is the sum of smaller thermal impedances EXTERNAL ROPCB-AMB

(see simplified thermal model in Figure 4). To PDISS

TPCB
illustrate thermal impedance, an electrical analogy is PCB
COPCB-AMB

commonly used. Thermal resistance is analogous to

electrical resistance. Potential is analogous to tem- Figure 4. Monolithic DC-DC Converter Thermal Model
perature delta, and current is analogous to power
flow. The capacitors shown in Figure 4 represent As is shown in the thermal model in Figure 4, a
delays that are present from the time that power few quick observations can be made about calculat-
and its associated heat is increased or decreased ing junction temperature. Power dissipation from
from a steady state in one medium until the time other components and devices will thermally couple
that the heat increase or decrease reaches a steady into the device under test. This may seem obvious
state in the other medium. when stated explicitly, but when one looks at the
A common mistake is to assume that the top-case equation that determines the junction temperature
temperature represents the appropriate temperature of the device under test, only its internal power
when calculating R⍜JC. In fact, R⍜JC represents the dissipation is taken into account. The external power
thermal impedance of all six sides of a package, not dissipation is accounted for to some extent if one uses
just the top side. the R⌿JC and/or the R⌿J-PCB method of determining
junction temperature.
6
POWER designer
Calculating Losses and Junction Temperature for High-Power-Density
Switching Converters
In most DC-DC converters, most of the heat Once thermal impedance is found and by working
is dissipated from the silicon to the package to backwards, it is possible to determine the maximum
the PCB, and finally to the ambient air. A much power dissipation or ambient temperature that keeps
smaller amount of heat is dissipated from the
TJ - TTOP-CASE
silicon to the case and then to the ambient air. The RCJC =
PDISSIPATION
split depends on how the device is manufactured.
The device could be manufactured with a heat slug the junction temperature at or below the recommended
on the top or bottom of the die. Often a bottom maximum of 125°C.
thermal pad is used. Therefore, it is recommended Example: The LM2735 SOT-23 Boost Converter
to thermocouple to the case of the device and the Junction Temperature
ground lead to accurately measure the smallest VIN = 5V
thermal impedance. By using the smallest thermal
impedance path, the error in calculating the junction VOUT = 12V
temperature will be reduced. IOUT = 500 mA
Many of National’s high-density converters con- PLOSS = PDISS = 475 mW
tain an internal thermal-shutdown circuit. When
Airflow = 0 LFM
the silicon reaches an approximate temperature of
165°C, the device shuts down until the temperature TA @ Shutdown = 112˚C
reduces to approximately 150°C. Taking advantage TTOP-CASE @ Shutdown = 134˚C
of the thermal shutdown allows the user to calculate
the R⍜JA or R⌿JC of a specific application with 165°C - 112°C
R5JA = = 112°C/W
reasonable accuracy. 0.475W

Calculating TJ 165°C - 134°C

RCJC = = 65°C/W
During the prototyping stage of the design, the 0.475W
specific application is placed in a thermal chamber. 125°C - TA
R5JA = = 112°C/W
Enough power in the device is dissipated to obtain 0.475W
a good thermal impedance value. It is important
to remember that thermal impedance is not static As long as the ambient air temperature is below
over all input voltages, output voltages, and output 72°C, the junction temperature will be within
current. Each time the specifications change, the specification.
thermal impedance may change. 125°C - TTOP-CASE
RCJC = = 65°C/W
The ambient air temperature should be increased and 0.475W
the top-case, ambient air temperature, and VOUT or
VSW should be monitored. When the device shuts As long as the top-case temperature is below 94°C, the
down, the two temperatures are recorded. The result junction temperature will be within specification.
is the ambient air temperature, the top-case tempera- This is a first-order approximation and reasonable
ture, and the internal power dissipation. Next, the success has been achieved with matching actual
value for R⍜JA and/or R⌿JC can be calculated. This junction temperature and measurements of TJ. This
is quite simple to accomplish, and is necessary if the approximation is a much better method than simply
design may be marginal with regard to thermals. using the thermal impedance numbers included in
By knowing the ambient air and the top-case temper- the device datasheet. ■
ature when the junction is at 165°C, one can calculate
the specific application thermal impedance.

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7
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