FCH25N60N — N-Channel SupreMOS® MOSFET

December 2013

FCH25N60N
N-Channel SupreMOS® MOSFET
600 V, 25 A, 126 mΩ
Features Description
• RDS(on) = 108 mΩ (Typ.) @ VGS = 10 V, ID = 12.5 A The SupreMOS® MOSFET is Fairchild Semiconductor’s next
• Ultra Low Gate Charge (Typ. Qg = 57 nC) generation of high voltage super-junction (SJ) technology
• Low Effective Output Capacitance (Typ. Coss(eff.) = 262 pF) employing a deep trench filling process that differentiates it from
the conventional SJ MOSFETs. This advanced technology and
• 100% Avalanche Tested
precise process control provides lowest Rsp on-resistance,
• RoHS Compliant superior switching performance and ruggedness. SupreMOS
MOSFET is suitable for high frequency switching power con-
Application verter applications such as PFC, server/telecom power, FPD TV
power, ATX power, and industrial power applications.
• Solar Inverter
• AC-DC Power Supply

G
G
D TO-247
S
S

MOSFET Maximum Ratings TC = 25oC unless otherwise noted.

Symbol Parameter FCH25N60N Unit
VDSS Drain to Source Voltage 600 V
VGSS Gate to Source Voltage ±30 V
- Continuous (TC = 25oC) 25
ID Drain Current A
- Continuous (TC = 100oC) 16
IDM Drain Current - Pulsed (Note 1) 75 A
EAS Single Pulsed Avalanche Energy (Note 2) 861 mJ
IAR Avalanche Current (Note 1) 8.3 A
EAR Repetitive Avalanche Energy (Note 1) 2.2 mJ
MOSFET dv/dt 100
dv/dt V/ns
Peak Diode Recovery dv/dt (Note 3) 20
(TC = 25oC) 216 W
PD Power Dissipation
- Derate Above 25oC 1.72 W/oC
o
TJ, TSTG Operating and Storage Temperature Range -55 to +150 C
Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds o
TL 300 C

Thermal Characteristics
Symbol Parameter FCH25N60N Unit
RθJC Thermal Resistance, Junction to Case, Max. 0.58 o
C/W
RθJA Thermal Resistance, Junction to Ambient, Max. 40

©2011 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FCH25N60N FCH25N60N TO-247 Tube N/A N/A 30 units

Electrical Characteristics TC = 25oC unless otherwise noted.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V,TJ = 25oC 600 - - V
ΔBVDSS Breakdown Voltage Temperature
ID = 1 mA, Referenced to 25oC - 0.74 - V/oC
/ ΔTJ Coefficient
VDS = 480 V, VGS = 0 V - - 10
IDSS Zero Gate Voltage Drain Current μA
VDS = 480 V, TJ = 125oC - - 100
IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V - - ±100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 μA 2.0 - 4.0 V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 12.5 A - 0.108 0.126 Ω

Dynamic Characteristics
Ciss Input Capacitance - 2520 3352 pF
VDS = 100 V, VGS = 0 V,
Coss Output Capacitance - 103 137 pF
f = 1 MHz
Crss Reverse Transfer Capacitance - 3.2 5 pF
Coss Output Capacitance VDS = 380 V, VGS = 0 V, f = 1 MHz - 55 - pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 480 V, VGS = 0 V - 262 - pF
Qg(tot) Total Gate Charge at 10V VDS = 380 V, ID = 12.5 A, - 57 74 nC
Qgs Gate to Source Gate Charge VGS = 10 V - 10 - nC
Qgd Gate to Drain “Miller” Charge (Note 4) - 18 - nC
ESR Equivalent Series Resistance (G-S) f = 1 MHz - 1 - Ω

Switching Characteristics
td(on) Turn-On Delay Time - 21 52 ns
tr Turn-On Rise Time VDD = 380 V, ID = 12.5 A, - 22 54 ns
td(off) Turn-Off Delay Time VGS = 10 V, RG = 4.7 Ω - 68 146 ns
tf Turn-Off Fall Time (Note 4) - 5 20 ns

Drain-Source Diode Characteristics

IS Maximum Continuous Drain to Source Diode Forward Current - - 25 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 75 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 12.5 A - - 1.2 V
trr Reverse Recovery Time VGS = 0 V, ISD = 12.5 A, - 370 - ns
Qrr Reverse Recovery Charge dIF/dt = 100 A/μs - 7 - μC

Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. IAS = 8.3 A, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 25 A, di/dt ≤ 200 A/μs, VDD ≤ 380 V, starting TJ = 25°C.
4. Essentially independent of operating temperature typical characteristics.

©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
Typical Performance Characteristics

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

100 100
VGS = 15V
10V
8V
6V

ID, Drain Current[A]

4V
ID, Drain Current[A]

o
10 25 C

10
o
150 C o
-55 C

1 *Notes:
*Notes:
1. 250μs Pulse Test
o
1. VDS = 20V
2. TC = 25 C 2. 250μs Pulse Test
0.3 1
0.05 0.1 1 10 30 2 4 6 8
VDS, Drain-Source Voltage[V] VGS, Gate-Source Voltage[V]

Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
350 100

300
Drain-Source On-Resistance

IS, Reverse Drain Current [A]

o
150 C
250
RDS(ON) [mΩ],

10
o
25 C
200
VGS = 10V

150 VGS = 20V *Notes:

1. VGS = 0V
o
*Note: TC = 25 C 2. 250μs Pulse Test
100 1
0 20 40 60 80 0.4 0.6 0.8 1.0 1.2
ID, Drain Current [A] VSD, Body Diode Forward Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

5
10 10
Coss
VGS, Gate-Source Voltage [V]

4 VDS = 120V
10 8
VDS = 300V
Ciss VDS = 480V
Capacitances [pF]

3
10 6
Crss
2
10 *Note: 4
1. VGS = 0V
2. f = 1MHz
1
10 Ciss = Cgs + Cgd (Cds = shorted) 2
Coss = Cds + Cgd
Crss = Cgd *Note: ID = 12.5A
0
10 0
0.1 1 10 100 600 0 10 20 30 40 50 60
VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]

©2011 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs. Temperature vs. Temperature
1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
1.1
BVDSS, [Normalized]

RDS(on), [Normalized]
2.0

1.0 1.5

1.0
0.9
*Notes: *Notes:
1. VGS = 0V 0.5
1. VGS = 10V
2. ID = 1mA 2. ID = 12.5A
0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C] o
TJ, Junction Temperature [ C]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
100 30
10μs

100μs
25
1ms
ID, Drain Current [A]

10
ID, Drain Current [A]

10ms
20
DC

1 Operation in This Area

15
is Limited by RDS(on)

10
*Notes:
0.1 o
1. TC = 25 C
o 5
2. TJ = 150 C
3. Single Pulse
0.01 0
1 10 100 1000 25 50 75 100 125 150
o
VDS, Drain-Source Voltage [V] TC, Case Temperature [ C]

Figure 11. Transient Thermal Response Curve

1
ZθJC(t), Thermal Response [oC/W]

0.5
Thermal Response [ZθJC]

0.2
0.1
0.1
0.05
PDM
0.02
t1
0.01 t2
0.01
*Notes:
o
Single pulse 1. ZθJC(t) = 0.58 C/W Max.
2. Duty Factor, D = t1/t2
3. TJM - TC = PDM * ZθJC(t)
1E-3
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t1Rectangular
t,1Rectangular Pulse
, Rectangular Duration
PulseDuration
Pulse [sec]
Duration[sec]
[sec]

©2011 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
IG = const.

Figure 12. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off

Figure 13. Resistive Switching Test Circuit & Waveforms

VGS

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

©2011 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2011 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
Mechanical Dimensions

Figure 16. TO-247, Molded, 3-Lead, Jedec Variation AB

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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TO247-003

©2011 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com

FCH25N60N Rev. C1
 FCH25N60N — N-Channel SupreMOS® MOSFET
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Datasheet contains the design specifications for product development. Specifications
Advance Information Formative / In Design
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Rev. I66

©2011 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com

FCH25N60N Rev. C1