FQP8N60C — N-Channel QFET® MOSFET

April 2014

FQP8N60C
N-Channel QFET® MOSFET
600 V, 7.5 A, 1.2 Ω

Description Features
These N-Channel enhancement mode power field effect • 7.5 A, 600 V, RDS(on) = 1.2 Ω (Max.) @ VGS = 10 V,
transistors are produced using Fairchild s proprietary, ID = 3.75 A
planar stripe, DMOS technology. This advanced • Low Gate Charge (Typ. 28 nC)
technology has been especially tailored to minimize on- • Low Crss (Typ. 12 pF)
state resistance, provide superior switching performance,
• 100% Avalanche Tested
and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high
efficiency switched mode power supplies, active power
factor correction, electronic lamp ballasts based on half
bridge topology.

GD G
S TO-220

Absolute Maximum Ratings T C

o
= 25 C unless otherwise noted.

Symbol Parameter FQP8N60C Unit

VDSS Drain-Source Voltage 600 V
ID Drain Current - Continuous (TC = 25°C) 7.5 A
- Continuous (TC = 100°C) 4.6 A
IDM Drain Current - Pulsed (Note 1) 30 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 230 mJ
IAR Avalanche Current (Note 1) 7.5 A
EAR Repetitive Avalanche Energy (Note 1) 14.7 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C) 147 W
- Derate above 25°C 1.18 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
Maximum lead temperature for soldering purposes,
TL 300 °C
1/8" from case for 5 seconds
* Drain current limited by maximum junction temperature.

Thermal Characteristics
Symbol Parameter FQP8N60C Unit
RθJC Thermal Resistance, Junction-to-Case, Max. 0.85 °C/W
RθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 °C/W

©2004 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
Package Marking and Ordering Information
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FQP8N60C FQP8N60C TO-220 Tube N/A N/A 50 units

Electrical Characteristics T C
o
= 25 C unless otherwise noted.

Symbol Parameter Test Conditions Min Typ Max Unit

Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 600 -- -- V
∆BVDSS Breakdown Voltage Temperature
ID = 250 µA, Referenced to 25°C -- 0.7 -- V/°C
/ ∆TJ Coefficient
IDSS VDS = 600 V, VGS = 0 V -- -- 1 µA
Zero Gate Voltage Drain Current
VDS = 480 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA

On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V
RDS(on) Static Drain-Source
VGS = 10 V, ID = 3.75 A -- 1.0 1.2 Ω
On-Resistance
gFS Forward Transconductance VDS = 40 V, ID = 3.75 A -- 8.7 -- S

Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, -- 965 1255 pF
Coss Output Capacitance f = 1.0 MHz -- 105 135 pF
Crss Reverse Transfer Capacitance -- 12 16 pF

Switching Characteristics
td(on) Turn-On Delay Time VDD = 300 V, ID = 7.5 A, -- 16.5 45 ns
tr Turn-On Rise Time RG = 25 Ω -- 60.5 130 ns
td(off) Turn-Off Delay Time -- 81 170 ns
(Note 4)
tf Turn-Off Fall Time -- 64.5 140 ns
Qg Total Gate Charge VDS = 480 V, ID = 7.5 A, -- 28 36 nC
Qgs Gate-Source Charge VGS = 10 V -- 4.5 -- nC
Qgd Gate-Drain Charge (Note 4) -- 12 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

IS Maximum Continuous Drain-Source Diode Forward Current -- -- 7.5 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 30 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 7.5 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 7.5 A, -- 365 -- ns
Qrr Reverse Recovery Charge dIF / dt = 100 A/µs -- 3.4 -- µC


1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 7.3 mH, IAS = 7.5 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25oC.
3. ISD ≤ 7.5 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25oC.
4. Essentially independent of operating temperature.

©2004 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
 !    

VGS
Top : 15.0 V
10.0 V
1 8.0 V
10 7.0 V 10
1

6.5 V
6.0 V

ID, Drain Current [A]

5.5 V o
ID, Drain Current [A]

150 C
Bottom : .0 V

o
0
10 25 C
o
10
0 -55 C

※ Notes : ※ Notes :
10
-1
1. 250µs Pulse Test 1. VDS = 40V
2. TC = 25℃ 2. 250µ s Pulse Test
-1
10
-1 0 1 2 4 6 8 10
10 10 10
VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

3.5

1
10
3.0
Drain-Source On-Resistance

IDR, Reverse Drain Current [A]

VGS = 10V
2.5
RDS(ON) [Ω ],

2.0
0
10

1.5
VGS = 20V

※ Notes :
1.0
150℃ 25℃ 1. VGS = 0V
※ Note : TJ = 25℃ 2. 250µs Pulse Test

0.5 10
-1

0 5 10 15 20 0.2 0.4 0.6 0.8 1.0 1.2 1.4

ID, Drain Current [A] VSD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs Figure 4. Body Diode Forward Voltage

Drain Current and Gate Voltage Variation with Source Current
and Temperature

2000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
1800 Crss = Cgd
10 VDS = 120V
1600
VGS, Gate-Source Voltage [V]

1400 Ciss VDS = 300V

8
Capacitance [pF]

1200 VDS = 480V

1000 Coss 6

800
4
600 ※ Notes ;
1. VGS = 0 V
Crss 2. f = 1 MHz
400
2
200 ※ Note : ID = 8A

0 0
-1 0 1 0 5 10 15 20 25 30
10 10 10
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

©2004 Fairchild Semiconductor Corporation 3 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
 !     (continued)

1.2 3.0
Drain-Source Breakdown Voltage
2.5

Drain-Source On-Resistance
1.1
BVDSS, (Normalized)

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0

0.9 ※ Notes :
1. VGS = 0 V ※ Notes :
0.5 1. VGS = 10 V
2. ID = 250 µA
2. ID = 4 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C]
o TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

vs Temperature vs Temperature

2
10 8
Operation in This Area
is Limited by R DS(on) 10 µs

100 µs
1
10 6
1 ms
ID, Drain Current [A]

ID, Drain Current [A]

10 ms
100 ms
DC
0
10 4

10
-1
2
※ Notes :
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
10
-2
0
0
10 10
1
10
2 3
10 25 50 75 100 125 150
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature

0
10
ZθJC(t), Thermal Response [oC/W]

D = 0 .5

0 .2

10
-1
0 .1

0 .0 5
※ N o te s :
1 . Z θ J C (t) = 0 .8 5 ℃ /W M a x .
0 .0 2 2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C (t)
0 .0 1
PDM
-2 s in g le p u ls e
10
t1
t2
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
t1 , S q u a r e W a v e P u l s e D u r a t i o n [ s e c ]

Figure 11. Transient Thermal Response Curve

©2004 Fairchild Semiconductor Corporation 4 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
VGS
Same Type
50KΩ
as DUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd

DUT
IG = const.
3mA

Charge

Figure 12. Gate Charge Test Circuit & Waveform

RL VDS
VDS 90%

VGS VDD
RG

10%
VGS
V
10V
GS
DUT
td(on) tr td(off)
tf
t on t off

Figure 13. Resistive Switching Test Circuit & Waveforms

L 1 BVDSS
VDS EAS = ---- L IAS2 --------------------
2 BVDSS - VDD
BVDSS
ID
IAS
RG
VDD ID (t)

V
10V
GS
GS DUT VDD VDS (t)
tp
tp Time

Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms

©2004 Fairchild Semiconductor Corporation 5 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
DUT +

VDS

I SD
L

Driver
RG
Same Type
as DUT VDD

VGS • dv/dt controlled by RG

• ISD controlled by pulse period

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

I SD
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

VSD VDD

Body Diode
Forward Voltage Drop

Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

©2004 Fairchild Semiconductor Corporation 6 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
Mechanical Dimensions

Figure 16. TO220, Molded, 3-Lead, Non Jedec Variation AB

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without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-
ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT220-003

©2004 Fairchild Semiconductor Corporation 7 www.fairchildsemi.com

FQP8N60C Rev. C0
 FQP8N60C — N-Channel QFET® MOSFET
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Datasheet contains the design specifications for product development. Specifications
Advance Information Formative / In Design may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later

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Rev. I68
©2004 Fairchild Semiconductor Corporation 8 www.fairchildsemi.com
FQP8N60C Rev. C0