Biasing PDF
Biasing PDF
Biasing PDF
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LTSPICE
Biasing Schemes
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Recap
Common Source(CS) Configuration
Transfer Characterstics in Common Source(CS)
Configuration
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I-V Characterstics of common Source
amplifer
iD
C
B
Load Line
Q
vGS= vIQ
Slope of
Load Line ?
A
2/5/2018 vDS = vo
Transfer Characterstics of common Source amplifer
iD
VDD
BC:Triode
VDD =VDSQ Region
VOB
VOC
BIASING in MOS Amplifier Circuits
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Biasing in MOS Amplifier Circuits
Bias Methodologies:
1. Fixing VGS;
2. Fixing VG and a degenerated resistor;
3. Using a Drain-to-Gate feedback Resistor;
4. Using a constant current source.
BIASING by Fixing VGS
Voltage Q
divider
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BIASING by Fixing VGS
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Temperature Effects
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BIASING by Fixing VGS
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I-V curves with only fixing bias
VG is constant
I D VGS
ID
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BIASING by Fixing VG and connecting
a resistance in the source
• Resistance ,R provides a S
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Biasing
Chapter 4
by Fixing V and Connecting
MOS field-Effect Transistors (MOSFETs)
GS
Figure 4.30
Resistance in the source
FIGURE 4.30 Biasing using a fixed voltage at the gate, VG, and a resistance in the source lead, RS: (a)
basic arrangement; (b) reduced variability in ID
Coupling of a Signal Source to
the gate using a capacitor CC1
Signal to be
amplified (ac input)
Practical implementation using single and
two supplies
FIGURE 4.30 (c) practical implementation using a single supply (e) practical implementation using two
supplies.
Biasing MOSFET using large drain to gate
feedback resistor RG
•Negative feedback
mechanism
Figure 4.32 Biasing the MOSFET using a large drain-to-gate feedback resistance, RG.