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SN65HVD485E Half-Duplex RS-485 Transceiver: 1 Features 3 Description
SN65HVD485E Half-Duplex RS-485 Transceiver: 1 Features 3 Description
SN65HVD485E
SLLS612E – JUNE 2004 – REVISED DECEMBER 2015
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (8) 4.91 mm × 3.90 mm
SN65HVD485E VSSOP (8) 3.00 mm × 3.00 mm
PDIP (8) 9.81 mm × 6.35 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
R R R R
A A
RE RE
RT RT
B B
DE DE
D D D D
A B A B
R R
D D
R RE DE D R RE DE D
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65HVD485E
SLLS612E – JUNE 2004 – REVISED DECEMBER 2015 www.ti.com
Table of Contents
1 Features .................................................................. 1 9 Detailed Description ............................................ 12
2 Applications ........................................................... 1 9.1 Overview ................................................................. 12
3 Description ............................................................. 1 9.2 Functional Block Diagram ....................................... 12
4 Revision History..................................................... 2 9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 12
5 Device Comparison Table..................................... 3
6 Pin Configuration and Functions ......................... 3 10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
7 Specifications......................................................... 4
10.2 Typical Application ............................................... 14
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4 11 Power Supply Recommendations ..................... 18
7.3 Recommended Operating Conditions ...................... 4 12 Layout................................................................... 18
7.4 Thermal Information .................................................. 5 12.1 Layout Guidelines ................................................. 18
7.5 Electrical Characteristics: Driver ............................... 5 12.2 Layout Example .................................................... 18
7.6 Electrical Characteristics: Receiver .......................... 5 13 Device and Documentation Support ................. 19
7.7 Power Dissipation Characteristics ............................ 6 13.1 Device Support...................................................... 19
7.8 Supply Current .......................................................... 6 13.2 Documentation Support ........................................ 20
7.9 Switching Characteristics: Driver .............................. 6 13.3 Community Resources.......................................... 20
7.10 Switching Characteristics: Receiver........................ 6 13.4 Trademarks ........................................................... 20
7.11 Dissipation Ratings ................................................. 7 13.5 Electrostatic Discharge Caution ............................ 20
7.12 Typical Characteristics ............................................ 7 13.6 Glossary ................................................................ 20
8 Parameter Measurement Information .................. 8 14 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
• Added Pin Configuration and Functions section, Feature Description section, Device Functional Modes, Application
and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
• Deleted Ordering Information table ....................................................................................................................................... 1
• Changed Thermal Information table ...................................................................................................................................... 5
• Added Power Dissipation Characteristics table...................................................................................................................... 6
D, DGK, P Packages
8-Pin SOIC, VSSOP, PDIP
Top View
R 1 8 VCC
RE 2 7 B
DE 3 6 A
D 4 5 GND
Pin Functions
PIN
TYPE DESCRIPTION
NAME NO.
A 6 Bus input/output Driver output or receiver input (complementary to B)
B 7 Bus input/output Driver output or receiver input (complementary to A)
D 4 Digital input Driver data input
DE 3 Digital input Driver enable, active high
GND 5 Reference potential Local device ground
R 1 Digital input Receive data output
RE 2 Digital input Receiver enable, active low
VCC 8 Supply 4.5-V to 5.5-V supply
7 Specifications
7.1 Absolute Maximum Ratings
(1) (2)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VCC Supply voltage –0.5 7 V
Voltage range at A or B –9 14 V
Voltage range at any logic pin –0.3 VCC + 0.3 V
Receiver output current –24 24 mA
Voltage input range, transient pulse, A and B, through 100 Ω (see Figure 15) –50 50 V
TJ Junction temperature 170 170 °C
Continuous total power dissipation Refer to Dissipation Ratings
Tstg Storage temperature –65 130 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet.
(2) See Thermal Information for information on maintenance of this specification for the DGK package.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
(2) See the Package Thermal Characterization Methodologies application note (SZZA003) for an explanation of this parameter.
(1) All typical values are at 25°C and with a 5-V supply.
(1) All typical values are at 25°C and with a 5-V supply.
(1) All typical values are at 25°C and with a 5-V supply.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
(3) In accordance with the low-k thermal metric definitions of EIA/JESD51-3.
(4) In accordance with the high-k thermal metric definitions of EIA/JESDS1-7.
80 5
TA = 25°C
4.5 VCC = 5 V
60
40 3.5
20 VCC = 0 V 3
RL = 60Ω
2.5
0 VCC = 5 V
2
−20 1.5
1
−40
0.5
−60 0
−8 −6 −4 −2 0 2 4 6 8 10 12 0 10 20 30 40 50
VI − Bus Input Voltage − V IO − Differential Output Current − mA
Figure 1. Bus Input Current vs Bus Input Voltage Figure 2. Driver Differential Output Voltage
vs Differential Output Current
A IOA
II 27 Ω
0 V or 3 V VOD 50 pF
D
27 Ω
B IOB
VOC
Figure 3. Driver Test Circuit, VOD and VOC Without Common-Mode Loading
375 Ω
VTEST = −7 V to 12 V
0 V or 3 V VOD 60 Ω
375 Ω
VTEST
27 Ω
A VA 3.25 V
D
Signal 27 Ω VB 1.75 V
B
Generator 50 Ω VOC VOC(PP) ∆VOC(SS)
50 pF
VOC
3V
INPUT 1.5 V 1.5 V
0V
RL = 54 Ω VOD tPLH tPHL
CL = 50 pF VOD(H)
Signal 90%
Generator 50 Ω OUTPUT 0V
10% VOD(L)
tr tf
A S1
D Output 3V
0 V or 3 V B 1.5 V 1.5 V
DE
3 V if Testing A Output
0V
0 V if Testing B Output CL = 50 pF tPZH 0.5 V
RL = 110 Ω
DE
VOH
Signal Output 2.5 V
Generator 50 Ω VOff 0
tPHZ
5V
RL = 110 Ω
A S1
D 3V
0 V or 3 V B Output 1.5 V 1.5 V
DE
0 V if Testing A Output
0V
3 V if Testing B Output CL = 50 pF tPZL
DE tPLZ
5V
Signal Output 2.5 V
50 Ω VOL
Generator
0.5 V
IOS
VO
Voltage
Source
IO
VID
VO
Signal
Generator 50 Ω
VID Input B
1.5 V
A IO 50%
R Input A
B 0V
tPLH tPHL
Signal CL = 15 pF VO VOH
50 Ω 90%
Generator Output 1.5 V
10% V
OL
tr tf
D
VCC
DE
VCC
A
54 Ω
B
3V
R 1 kΩ
0V RE 1.5 V
CL = 15 pF 0V
RE
tPZH tPHZ
Signal VOH
Generator 50 Ω
1.5 V VOH −0.5 V
R
GND
Figure 12. Receiver Enable/Disable Test Circuit and Waveforms, Data Output High
D
0V
DE
VCC
A
54 Ω
B
3V
R 1 kΩ
5V RE 1.5 V
CL = 15 pF 0V
RE
tPZL tPLZ
Signal VCC
Generator 50 Ω
R 1.5 V VOL +0.5 V
VOL
Figure 13. Receiver Enable/Disable Test Circuit and Waveforms, Data Output Low
VCC
Switch Down for V(A) = 1.5 V,
Switch Up for V(A) = −1.5 V
A
1.5 V or R 3V
−1.5 V B 1 kΩ 1.5 V
RE
CL = 15 pF
0V
RE tPZH(SHDN)
Signal tPZL(SHDN)
Generator 50 Ω 5V VOH
R 1.5 V
VOL
0V
Figure 14. Receiver Enable From Shutdown Test Circuit and Waveforms
VTEST
100 Ω
0V
Pulse Generator,
15 µs Duration, 15 µs 1.5 ms −VTEST
1% Duty Cycle
9 Detailed Description
9.1 Overview
The SN65HVD485E device is a half-duplex RS-485 transceiver suitable for data transmission at rates up to 10
Mbps over controlled-impedance transmission media (such as twisted-pair cabling). Up to 64 units of the
SN65HVD485E device can share a common RS-485 bus due to the low bus-input currents of the device. The
device also features a high degree of ESD protection and low standby current consumption of 1 mA (maximum).
VCC
R
RE A
DE B
GND
When the receiver enable pin (RE) is logic low, the receiver is enabled. When the differential input voltage
defined as VID = VA – VB is positive and higher than the positive input threshold (VIT+) the receiver output (R)
turns high. When VID is negative and lower than the negative input threshold (VIT–), the receiver output (R) turns
low. If VID is between VIT+ and VIT–, the output is indeterminate.
When RE is logic high or left open, the receiver output is high impedance and the magnitude and polarity of VID
are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe high when the transceiver is
disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven
(idle bus).
200 kΩ
500 Ω 500 Ω
Input Input
9V 9V 200 kΩ
A Input B Input
VCC VCC
16 V 36 kΩ 16 V 36 kΩ
180 kΩ 180 kΩ
Input Input
36 kΩ
16 V 36 kΩ 16 V
16 V
5Ω
Output
Output
16 V 9V
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
R R R
R R R
RE A RE A RE A
DE B DE B DE B
D D D
D D D
Using independent enable lines provides the most flexible control as it allows for the driver and the receiver to be
turned on and off individually. While this configuration requires two control lines, it allows for selective listening
into the bus traffic whether the driver is transmitting data or not.
Combining the enable signals simplifies the interface to the controller by forming a single direction-control signal.
In this configuration, the transceiver operates as a driver when the direction-control line is high and as a receiver
when the direction-control line is low.
Additionally, only one line is required when connecting the receiver-enable input to ground and controlling only
the driver-enable input. In this configuration, a node receives the data from the bus, receives the data it sends,
and can verify that the correct data has been transmitted.
R R R R
A A
RE RE
RT RT
B B
DE DE
D D D D
A B A B
R R
D D
R RE DE D R RE DE D
1000
Conservative
Characteristics
100
10
100 1k 10k 100k 1M 10M 100M
Data Rate (bps)
5V
100 nF
100nF 100nF
100 nF
1010k
kΩ VCC
R1
R
RxD
MCU/ RE A TVS
UART
DE B
DIR
D
TxD
R2
1010k
kΩ GND
Figure 20. Transient Protection Against ESD, EFT, and Surge Transients
Figure 20 suggests a protection circuit against 10-kV ESD (IEC 61000-4-2), 4-kV EFT (IEC 61000-4-4), and 1-kV
surge (IEC 61000-4-5) transients. Table 3 shows the associated bill of materials.
The current in the termination resistors depends on the differential bus voltage. The standard requires active
drivers to produce at least 1.5 V of differential signal. For a bus terminated with one standard 120-Ω resistor at
each end, this sums to 25-mA differential output current whenever the bus is active. Typically, the
SN65HVD485E device can drive more than 25 mA to a 60-Ω load, which results in a differential output voltage
higher than the minimum required by the standard (see Figure 2).
Supply current increases with signaling rate primarily because of the totem pole outputs of the driver. When
these outputs change state, there is a moment when both the high-side and low-side output transistors are
conducting, which creates a short spike in the supply current. As the frequency of state changes increases, more
power is used.
Figure 21. SN65HVD485E Single-Ended Input (Top), Differential Output (Middle), and Single-Ended Output
(Bottom) at 10 MHz
12 Layout
5
Via to ground
C 4 Via to VCC
R
6 R
R 1
JMP
MCU 7 R
R 5
TVS
6 R
SN65HVD485E 5
Ambient Node
q CA Calculated
Surface Node
qJC Calculated/Measured
Junction
qJB Calculated/Measured
PC Board
13.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 24-Aug-2018
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
HPA01057EDR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP485
& no Sb/Br)
SN65HVD485ED ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP485
& no Sb/Br)
SN65HVD485EDG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP485
& no Sb/Br)
SN65HVD485EDGK ACTIVE VSSOP DGK 8 80 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 NWJ
& no Sb/Br)
SN65HVD485EDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 NWJ
& no Sb/Br)
SN65HVD485EDR ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP485
& no Sb/Br)
SN65HVD485EDRG4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 VP485
& no Sb/Br)
SN65HVD485EP ACTIVE PDIP P 8 50 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 85 65HVD485
& no Sb/Br)
SN65HVD485EPE4 ACTIVE PDIP P 8 50 Green (RoHS CU NIPDAU N / A for Pkg Type -40 to 85 65HVD485
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Aug-2017
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Aug-2017
Pack Materials-Page 2
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