FPGA Implementation of Variable Bit Rate
FPGA Implementation of Variable Bit Rate
FPGA Implementation of Variable Bit Rate
ICIEEIMT 17
Abstract- OFDM has developed into a popular scheme for OFDM transceiver system. Each subcarrier is modulated by
wideband digital communication in both wired and wireless means of orthogonal frequencies. The variable Bit rate OFDM
communications. The next generation communication schemes system can be used for Wireless Personal Area Network
incline to use OFDM systems in order to provide high baud rates, (WPAN) system to achieve high throughput. FPGA can
reduced Inter-carrier interference (IC) and less Inter-symbol
provide the End to end solutions for reprogramming,
interference (ISI). In this paper a Variable Bit rate 16 subcarrier
OFDM Transceiver system is implemented by FPGA and it is networking linear card packet processing, RF, Baseband,
used for high speed WPAN applications. The proposed design has connectivity in wired and wireless communication. The FPGA
been designed using various Bit Pattern generations and Technology offers more flexible, reliable and accurate in
Modulation Techniques like 16 QAM, BPSK, OQPSK, QPSK, simulating, testing, validating and implementing the
BPSK with orthogonal frequencies and synthesized using high designs[5]. The OFDM Transceiver system is coded using
level design tools. The Variable Bit rate OFDM system is coded Verilog HDL, simulated and synthesized using Modelsim and
using Verilog HDL and it is synthesized and simulated using Xilinx tool and it is implemented using a Spartan 2 FPGA
Xilinx ISE and Modelsim tool. Xilinx Spartan2 xc2s200 -6 PQ208 Board. The paper is organized as follows. First, a brief review
FPGA board will be used for testing and demonstration of the
of OFDM Transceiver Design is described in Section II. The
implemented system. The design spends about 33.7 K gates and
consumed Power is about 13mW with the operating frequency of Results for OFDM Transceiver system are discussed in section
49.08MHz. III. Finally, conclusion remarks are presented in section IV.
Keywords – OFDM, BPSK, QAM, QPSK, OQPSK
II. OFDM TRANSCEIVER DESIGN
1. INTRODUCTION
The Digital Data Generator is provided with Variable
data length and it will flow through serially as an input to
Orthogonal frequency division multiplexing (OFDM) is OFDM transmitter. There are 16 subcarriers used in the
able to accomplish a highly efficient form of multi-carrier OFDM system and its Input Data’s X0(t), X1(t),....X15(t),
modulation which is widely used in broadcasting, ADSL and vector modulate these onto sub carriers of frequencies: 0,fd,
wireless technology. OFDM is becoming the preferred 2fd, 3fd,….15 fd, The Discrete Fourier Transform (DFT) of
modulation technique for wireless communications [1]. It is an length N is given by :
efficient data transmission technique that can provide large data
rates depends on the requirement [2]. Various research centers Stage 1 :
in the world are working towards the optimization of OFDM
for countless applications. The attraction of OFDM is mainly 15
due to how the system handles the multipath interference at the X(t) = ∑ Xm(t) exp (2пjmfdt) with fd = 1/T (1)
receiver.
In an OFDM system, more number of orthogonal, m=0
overlapping subcarriers are transmitted in parallel and it is
modulated using several modulation techniques [4]. The input Where,
serial bit pattern generator (128 Bits, 64 Bits) is encoded by Xm - Input Data
linear feedback shift register and encoded bits are modulated
using several modulation schemes like 16 QAM, QPSK, fd – Frequency for first sub carrier
OQPSK and BPSK. There are 16 subcarriers used in the T – Pulse Duration
= 16 * IFFT ({Xm}0,15 )
15
x(t) = ∑ Xm (t) exp (2пjmfdt) (4) Fig.1.OFDM Transmitter Design
OFDM
Signal
REFERENCES
[1] Aanchal Jhingan, Lavish Kansal, “Performance Analysis of FFT-OFDM
and DWT-OFDM over AWGN Channel under the Effect of CFO”,
Indian journal of science and Technology, Vol9(6), Febuary 2016
Fig. 8. OFDM Transmitter signal [2] D.Kalaivai, S.karthikeyan, “VLSI Implementation of Area Efficient and
low power OFDM Transmitter and Receiver”, Indian journal of science
and Technology, Vol8(18), August 2015.
The Functional simulation of the proposed architecture has [3] Murtuza Jeeranwalal, Dr.Shruthi oza, “Implemetation of Efficient 64-
been justified by using Verilog HDL. The various parameters Point FFT/IFFT Block for OFDM Transceiver of IEEE 802.11a”,
obtained from OFDM Transceiver system are listed in Table 2. International Journal of Application or Innovation in Engineering &
Management (IJAIEM)” Volume 3, Issue 5, May 2014.
[4] M.A.Mohamed, J,“ FPGA Synthesis of VHDL OFDM System” Wireless
Table.2. Pers Commun, ) ISSN : 1885 – 1909 (2013) DOI 10.1007/s11277-012-
OFDM Transceiver Output 0786, 2013.
Gate Estimated Minimum Bandwidth of Maximum [5] Nasreen Mev, Brig.R.M. Khaire, “Implemenation of OFDM Transmitter
count for Power period OFDM signal combination and Receiver Using FPGA” International Journal of Soft Computing and
Design Consumption al path delay Engineering (IJSCE)ISSN: 2231- 2307, Volume-3, Issue-3, July 2013.
[6] Manjunath Lakkannavar, Ashwini Desai,G.,“Design and Implementation
33,720 13 mW 20.371ns 228.56 KHz 25.145ns of OFDM using VHDL and FPGA”, International Journal of Engg. And
Advanced Technology (IJEAT) ISSN : 2249 – 8958, Volume-1, Issue 6,
August 2012
The Proposed Architecture is synthesized and [7] Kirubanandasarathy. N & Karthikeyan, K. (2012), “VLSI design and
simulated using Xilinx ISE, Modelsim tool and Spartan2 implementation of MIMO OFDM system for wireless communications”,
xc2s200-6 pq208 FPGA device chip. The Device utilization European Journal of Scientific Research,73(2), 269–277. ISSN 1450-.
summary is listed in Table 3. 216X, 2012.
[8] Jayalakshmi, V., Reddy, T. K., & Shivakumar, K,“Design and
implementation of orthogonal frequency division multiplexing (OFDM)
Table.3. transmission using FPGA”,International Journal of Communications and
Device Utilization summary – Spartan2 2s 200 FPGA Board Engineering, 03(3, 03), 45–51, 2012.
[9] Schulze, H., & Luders, C, “Theory and applications of OFDM and
Logic Used Available Utilization CDMA: Wideband wireless communications. Wiley, ISBN-10:
utilization 04708950698, 2005.
Number of Slices 732 4704 15% [10] Prasad, R., “OFDM for wireless communications systems”, artech
Number of 4 4247 4704 90% house universal personal communications series, ISBN-10: 1580537
input LUTs 960, 2004.
Number of 94 140 67% [11] Loo Kah Cheng “Design of an OFDM Transmitter and Receiver using
bonded IOBs FPGA” UTM, 2004.
Number of 2203 2352 93% [12] Shousheng He and Mats Torkelson, "A New Approach to Pipeline FFT
occupied slices Processor”, IEEE Parallel Processing Symposium, pp.776 – 780, April.
1996.
IV. CONCLUSION: