Syllabus Vlsi Design
Syllabus Vlsi Design
Syllabus Vlsi Design
Course Objectives:
To identify the design for testability methods for combinational & sequential CMOS
Circuits.
To understanding of CMOS fabrication flow, technology scaling, sheet resistance, square
capacitance and propagation delays in CMOS circuits.
To apply the design Rules and draw layout of a given logic circuit and basic circuit
concepts to MOS circuits.
To analyze the behaviour of amplifier circuits with various loads. Analyze the behaviour
of static and dynamic logic circuits. Analyze the various test generation methods for
static and dynamic CMOS circuits.
To Design MOSFET based logic circuit, Amplifier circuits using MOS transistors and
MOSFET based logic circuits using various logic styles like static and dynamic
CMOS.
UNIT-I:
Introduction and Basic Electrical Properties of MOS Circuits: VLSI Design Flow,
Introduction to IC technology, Fabrication process: nMOS, pMOS and CMOS. I ds versus Vds
Relationships, Aspects of MOS transistor Threshold Voltage, MOS transistor Trans, Output
Conductance and Figure of Merit. nMOS Inverter, Pull-up to Pull-down Ratio for nMOS
inverter driven by another nMOS inverter, and through one or more pass transistors. Alternative
forms of pull-up, The CMOS Inverter, Latch-up in CMOS circuits, Bi-CMOS Inverter,
Comparison between CMOS and BiCMOS technology.
MOS Layers, Stick Diagrams, Design Rules and Layout, Layout Diagrams for MOS circuits
Learning Outcomes:
After completing this Unit, students will be able to
189 Page
UNIT-II:
Basic Circuit Concepts: Sheet Resistance, Sheet Resistance concept applied to MOS transistors
and Inverters, Area Capacitance of Layers, Standard unit of capacitance, Some area Capacitance
Calculations, The Delay Unit, Inverter Delays, Driving large capacitive loads, Propagation
Delays, Wiring Capacitances, Choice of layers.
Scaling of MOS Circuits: Scaling models and scaling factors, Scaling factors for device
parameters, Limitations of scaling, Limits due to sub threshold currents, Limits on logic levels
and supply voltage due to noise and current density. Switch logic, Gate logic.
Learning Outcomes:
After completing this Unit, students will be able to
UNIT-III:
Learning Outcomes:
After completing this Unit, students will be able to
UNIT-IV:
190 Page
master slave registers, Clocked CMOS register. Cross coupled NAND and NOR, SR Master
Slave register, Storage mechanism, pipelining
Learning Outcomes:
After completing this Unit, students will be able to
UNIT-V:
CAD Tools for Design and Simulation, Aspects of Design Tools, Test and Testability-System
Partitioning, Layout and Testability, Reset/Initialization, Design for Testability,Testing
Combinational Logic, Testing Sequential Logic, Practical Design for Test (OFT) Guidelines,
Scan Design Techniques, Built-In-Self-Test (BIST), Future Trends.
Learning Outcomes:
After completing this Unit, students will be able to
Identify the design for testability methods for combinational & sequential CMOS circuits
(L1).
Analyze the various test generation methods for static and dynamic CMOS circuits (L3).
Course Outcomes:
Identify the design for testability methods for combinational & sequential CMOS circuits.
Understand CMOS fabrication flow, technology scaling, sheet resistance, square
capacitance and propagation delays in CMOS circuits.
Apply the design Rules and draw layout of a given logic circuit and basic circuit
concepts to MOS circuits.
Analyze the behavior of amplifier circuits with various loads, static and dynamic logic
circuits, various test generation methods for static and dynamic CMOS circuits.
Design MOSFET based logic circuit, Amplifier circuits using MOS transistors and
MOSFET based logic circuits using various logic styles like static and dynamic CMOS
191 Page
TEXT BOOKS:
1. Kamran Eshraghian, “Essentials of VLSI Circuits and Systems”, Douglas and A.
Pucknell and SholehEshraghian, Prentice-Hall of India Private Limited, 2005 Edition.
2. Behzad Razavi , “Design of Analog CMOS Integrated Circuits”, McGraw Hill, 2003
3. Jan M. Rabaey, “Digital Integrated Circuits”, AnanthaChandrakasan and Borivoje
Nikolic, Prentice-Hall of India Pvt.Ltd, 2nd edition, 2009.
REFERENCES:
1. John P. Uyemura, “Introduction to VLSI Circuits and Systems”, John Wiley & Sons,
reprint 2009.
192 Page