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AP7215

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AP7215

600mA CMOS LDO

Features General Description

• Very Low Dropout Voltage The AP7215 low-dropout linear regulator operates from a 3.3V to
• Low Current Consumption: Typ. 50μA 5.5V supply and delivers a guaranteed 600mA continuous load
• Output Voltage: 3.3V current.
• Guaranteed 600mA Output
The high-accuracy output voltage is preset to an internally
• Input Range up to 5.5V
trimmed voltage. An active-low open-drain reset output remains
• Current Limit Protection
asserted for at least 20ms (TYP) after input voltage rises above
• Stable with either electrolytic capacitor or low-ESR the reset threshold.
MLCC (multi-layer ceramic capacitor) Low
Temperature Coefficient The space-saving SOP-8L and SOT89-3L package are suitable
• SOP-8L and SOT89-3L: Available in “Green” Molding for “pocket” and hand-held applications.
Compound (No Br, Sb)
• Lead Free Finish / RoHS Compliant (Note 1)

Applications

• HD/Blue-Ray DVD & MP3/4 Players


• Mobile Handsets and Smart Phones
• Digital Still Camera
• Hand-Held Computers

Ordering Information

AP7215 - 33 X G - 13

Output voltage Package Green Packing


33 : 3.3V S : SOP-8L G : Green 13 : Tape & Reel
Y : SOT89-3L

Package Packaging 13” Tape and Reel


Device
Code (Note 2) Quantity Part Number Suffix
AP7215-33SG-13 S SOP-8L 2500/Tape & Reel -13
AP7215-33YG-13 Y SOT89-3L 2500/Tape & Reel -13
Notes: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied, see EU Directive 2002/95/EC Annex Notes.
2. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be on our website at
http://www.diodes.com/datasheets/ap02001.pdf.

AP7215 Rev. 1 1 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Pin Assignments

(1) SOP-8L (2) SOT89-3L


( Top View )
( Top View )
NC 1 8 EN
3 VROUT
VR OUT 2 7 GND
2 VIN
NC 3 6 VDOUT 1 GND
V IN 4 5 NC
Tab is VIN

Pin Descriptions

Pin No.
Pin Name Description
SOP-8L SOT89-3L
NC 1, 3 , 5 - No Connection
VROUT 2 3 Voltage Output
VIN 4 2 Supply Voltage
VDOUT 6 - VD Output Voltage (Reset Output)
GND 7 1 Ground
EN 8 - Enable (VROUT ON/OFF)

AP7215 Rev. 1 2 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Block Diagram

EN Enable
VIN
On

Off -
ERROR Current
AMP Limit
Bandgap
+
1.2V VROUT

R1
VDOUT

+ R3

R2
-
VD Comp. R4

GND

Absolute Maximum Ratings

Symbol Parameter Rating Unit


ESD HBM Human Body Model ESD Protection 2 KV
ESD MM Machine Model ESD Protection 350 V
VIN Input Voltage +6 V
VROUT Output Voltage GND - 0.3 ~ VIN+ 0.3 V
TJ(MAX) Maximum Junction Temperature 150 ºC
SOP-8L 1.2 W
PD Power Dissipation
SOT89-3L 0.79 W

Recommended Operating Conditions

Symbol Parameter Min Max Unit


VIN Input Voltage 3.3 5.5 V
IOUT Output Current 0 600 mA
TJ Operating Junction Temperature Range -40 125 ºC
TA Operating Ambient Temperature -40 85 ºC

AP7215 Rev. 1 3 of 11 FEBRUARY 2009


www.diodes.com © Diodes Incorporated
AP7215
600mA CMOS LDO

Electrical Characteristics

(TA = 25°C, CIN = 1µF, COUT = 1µF, VIN=5.0V, VEN = VIN, unless otherwise noted)
Symbol Parameter Test Conditions Min Typ. Max Unit
ICCQ Quiescent Current IOUT = 0mA - 50 80 μA
VEN = GND
ISTBY Standby Current 15 30 μA
VIN = 5.0V
Output Voltage
VROUT IOUT = 30mA, VIN = 5V 3.234 3.300 3.366 V
Accuracy
VROUT Temperature
ΔVROUT/ΔTA/VROUT TA =-40°C to 85°C, IOUT = 30mA ±100 ppm / oC
Coefficient
IOUT = 30mA 60 100 mV
VDO Dropout Voltage
IOUT = 100mA 100 250 mV
Maximum Output
IOUT VIN = 5.3V 600 mA
Current
ILIMIT Current Limit VIN = 5.3V 750 mA
ISHORT Short Circuit Current VIN = 5.3V 50 mA
ΔVROUT/ΔVIN/VROU
Line Regulation 4.3V ≤ VIN ≤ 5.5V, IOUT = 30mA 0.01 ±0.2 %/V
T
ΔVROUT Load Regulation 1mA ≤ IOUT ≤ 100mA, VIN = 5.3V 15 50 mV
Power Supply VIN = 4.3V+ 0.5Vp-pAC,
PSRR F= 1KHz 55 dB
Rejection IOUT = 50mA
VEH Output ON 1.6 V
EN Input Threshold
VEL Output OFF 0.25 V
IEN Enable Pin Current -0.1 0.1 μA
VDF VIN Detection Voltage Detect VDOUT fall 3.83 3.91 3.98 V
VDF Hysteresis VDF VDF VDF
VHYS V
Range x1.02 x1.05 x1.08
20 mA
VDOUT = 0.5V, VIN = 2.0V
IVDOUT VDOUT Sink Current
VDOUT = 0.5V, VIN = 3.0V 30
tRP VDOUT Delay Time 10 20 40 ms
Thermal Resistance SOP-8L (Note 3) 124
θJA ºC/W
Junction-to-Ambient SOT89-3L (Note 3) 173
Thermal Resistance SOP-8L (Note 3) 25
θJC ºC/W
Junction-to-Case SOT89-3L (Note 3) 42
Notes: 3. Test conditions for SOP-8L, SOT89-3L: Device mounted on FR-4 substrate, single sided PC board, 2oz copper, with minimum recommended
pad layout.

AP7215 Rev. 1 4 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Typical Application

U1
4 2
VIN VIN VR OUT VR OUT

100K AP7215
ON
CIN VD OUT 6 8 OFF C OUT
VD OUT GND EN
1uF 1uF

Timing Diagram

tRP
20mSec-TYP.

VHYS VDF
VIN

VDOUT

EN

VROUT

AP7215 Rev. 1 5 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Typical Performance Characteristics

Quiescent Current vs Input Voltage Standby Current vs Input Voltage


90 80
80 70
70 60
60

ISTBY (uA)
ICCQ (uA)

50
50
40
40
30
30
20 20
10 10
0 0
3.0 3.5 4.0 4.5 5.0 5.5 6.0 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VIN (V) VIN (V)

Delay Time vs Ambient Temperature Dropout Voltage vs Output Current


28 700
27 600
Delay Time (ms)

26 500
VDO (mV)

25
400
24
23 300
22 200
21 100
20 0
-40 -20 0 20 40 60 80 100 120 0 100 200 300 400 500 600 700
Ambient Temperature (C) IOUT (mA)

Current Limit vs Ambient Temperature Short Circuit Current vs Input Voltage


960 90
940
Current Limit (mA)

920 85
900 80
ISHORT(mA)

880 75
860
840 70
820 65
800 60
780
760 55
-40 -20 0 20 40 60 80 100 120 50
3.0 3.5 4.0 4.5 5.0 5.5 6.0
Ambient Temperature VIN (V)

AP7215 Rev. 1 6 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Typical Performance Characteristics (Continued)

Load Transient Response Load Transient Response


(VIN=4.3V, IOUT=10mA ~300mA) (VIN=4.3V, IOUT=10mA ~600mA)

VIN VIN

VROUT VROUT

IOUT IOUT

Load Transient Response Load Transient Response


(VIN=5.5V, IOUT=10mA~300mA) (VIN=5.5V, IOUT=10mA~600mA)

VIN VIN

VROUT VROUT

IOUT IOUT

AP7215 Rev. 1 7 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Application Note

Input Capacitor
A 1μF ceramic capacitor is recommended to connect between VIN ENABLE/SHUTDOWN Operation
and GND pins to decouple input power supply glitch and noise. The AP7215 is turned on by setting the EN pin high, and is turned
The amount of the capacitance may be increased without limit. off by pulling it low. If this feature is not used, the EN pin should
A lower ESR (Equivalent Series Resistance) capacitor allows the be tied to VIN pin to keep the regulator output on at all time. To
use of less capacitance, while higher ESR type requires more ensure proper operation, the signal source used to drive the
capacitance. This input capacitor must be located as close as EN pin must be able to swing above and below the specified
possible to the device to assure input stability and less noise. For turn-on/off voltage thresholds listed in the Electrical
PCB layout, a wide copper trace is required for both VIN and Characteristics section under VEH and VEL.
GND.
VROUT VDOUT
Suggested Input Capacitance EN=0 0V Φ
Vendor Capacitance Type Series EN=1 3.3V Φ
TAIYO YUDEN 1μF Ceramic LMK212B
Current Limit Protection
Output Capacitor When output current at VROUT pin is higher than current limit
The output capacitor is required to stabilize and help the transient threshold, the current limit protection will be triggered and clamp
response of the LDO. The AP7215 is designed to have excellent the output current to approximately 750mA to prevent
transient response for most applications with a small amount of over-current and protect the regulator from damage due to
output capacitance. The AP7215 is stable with any small ceramic overheating.
output capacitors of 1.0μF or higher value, and the temperature
coefficients of X7R or X5R type. Additional capacitance helps to Short circuit protection
reduce undershoot and overshoot during transient. For When VROUT pin is shorted to GND or VROUT voltage is less than
PCB layout, the output capacitor must be placed as close as 200mV, short circuit protection will be triggered and clamp the
possible to VROUT and GND pins, and keep the leads as short as output current to approximately 50mA.
possible.
VDOUT (reset output)
Suggested Output Capacitance ---Open-Drain Active-Low reset output---
Vendor Capacitance Type Series In general, VDOUT is pulled up by a resistor (100KΩ) to VIN. The
TAIYO YUDEN 1μF Ceramic LMK212B AP7215 microprocessor (μP) supervisory circuitry asserts a
guaranteed logic-low reset during power-up and power-down.
Suggested Resistance Reset is asserted when VIN is below the reset threshold and
Vendor Capacitance Type remain asserted for at least tRP after VIN rises above the reset
YAGEO SMD FR-SK threshold.

As long as VIN is lower than the reset threshold, VDOUT remains at


logic "0". When VIN becomes higher than VHYS, a logic "1" is
asserted after a 20ms time delay defined by tRP

AP7215 Rev. 1 8 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Marking Information

(1) SOP-8L

( Top View )
8 5
Logo YY : Year : 08, 09,10~
AP7215-33 WW : Week : 01~52; 52
Part Number represents 52 and 53 week
YY WW X X X : Internal Code
G : Green
1 4

(2) SOT89-3L

( Top View )
XX : Identification code
XX Y : Year : 0~9
W : Week : A~Z : 1~26 week;
Y W X a~z : 27~52 week;
z represents 52 and 53 week
1 2 3 X : Internal code
A~Z : Green

Device Package type Identification Code


AP7215Y SOT89-3L N8

AP7215 Rev. 1 9 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

Package Information (All Dimensions in mm)

(1) Package Type: SOP-8L

3.85/3.95
5.90/6.10

0.254
0.10/0.20
Gauge Plane
Seating Plane
0.62/0.82
Detail "A"

7°~9° 7°~9°
0.35max. 45°

0.15/0.25
1.30/1.50
1.75max.

Detail "A"
0°/8°

1.27typ 0.3/0.5

4.85/4.95

8x-0.60
5.4

6x-1.27
8x-1.55

Land Pattern Recommendation


(Unit: mm)

(2) Package Type: SOT89-3L

1.40/1.75
Typ 1.60 1.7
2.35/2.60 Typ 2.48

2.7
3.94/4.25

0.4
1.9

1.3
0.80/
1.20

1.45/1.55
Typ 1.50 0.9 1.5
2.90/3.10 Land Pattern Recommendation (Unit: mm)
Typ 3.00
50 (2x)
80 (2x)
4.40/4.60 Typ 4.50
1.40/1.60
Typ 1.50

0.36/0.48 0.41/0.53 0.36/0.48 0.35/0.43


Typ 0.42 Typ 0.47 Typ 0.42 Typ 0.39

AP7215 Rev. 1 10 of 11 FEBRUARY 2009


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AP7215
600mA CMOS LDO

IMPORTANT NOTICE

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further
notice to any product herein. Diodes Incorporated does not assume any liability arising out of the application or use of any product described herein; neither
does it convey any license under its patent rights, nor the rights of others. The user of products in such applications shall assume all risks of such use and will
agree to hold Diodes Incorporated and all the companies whose products are represented on our website, harmless against all damages.

LIFE SUPPORT

Diodes Incorporated products are not authorized for use as critical components in life support devices or systems without the expressed written approval of the
President of Diodes Incorporated.

AP7215 Rev. 1 11 of 11 FEBRUARY 2009


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