Control Integrated POwer

System (CIPOS™)

IGCM20F60GA

Datasheet

For Power Management Application 1 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Table of Contents
CIPOS™ Control Integrated POwer System ........................................................................................................ 3
Features .............................................................................................................................................................. 3
Target Applications ........................................................................................................................................... 3
Description ......................................................................................................................................................... 3
System Configuration ....................................................................................................................................... 3
Pin Configuration .................................................................................................................................................... 4
Internal Electrical Schematic ................................................................................................................................. 4
Pin Assignment ....................................................................................................................................................... 5
Pin Description .................................................................................................................................................. 5
HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) ................................................ 5
VFO (Fault-output and NTC, Pin 14) ................................................................................................................. 6
ITRIP (Over current detection function, Pin 15) ................................................................................................ 6
VDD, VSS (Low side control supply and reference, Pin 13, 16) ....................................................................... 6
VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) ............................................................................... 6
NW, NV, NU (Low side emitter, Pin 17 - 19) ..................................................................................................... 6
W, V, U (High side emitter and low side collector, Pin 20 - 22) ........................................................................ 6
P (Positive bus input voltage, Pin 23)................................................................................................................ 6
Absolute Maximum Ratings................................................................................................................................... 7
Module Section .................................................................................................................................................. 7
Inverter Section.................................................................................................................................................. 7
Control Section .................................................................................................................................................. 7
Recommended Operation Conditions .................................................................................................................. 8
Static Parameters ................................................................................................................................................... 9
Dynamic Parameters ............................................................................................................................................ 10
Bootstrap Parameters .......................................................................................................................................... 10
Thermistor ............................................................................................................................................................. 11
Mechanical Characteristics and Ratings............................................................................................................ 11
Circuit of a Typical Application ........................................................................................................................... 12
Switching Times Definition .................................................................................................................................. 12
Electrical characteristic ....................................................................................................................................... 13
Package Outline .................................................................................................................................................... 14

Datasheet 2 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ-bridge 600V / 20A

Features Description
Fully isolated Dual In-Line molded module The CIPOS™ module family offers the chance for
integrating various power and control components
 Infineon reverse conducting IGBTs with
to increase reliability, optimize PCB size and system
monolithic body diode costs.
 Rugged SOI gate driver technology with stability It is designed to control three phase AC motors and
against transient and negative voltage permanent magnet motors in variable speed drives
 Allowable negative VS potential up to -11V for for applications like an air conditioning, a
refrigerator and a washing machine. The package
signal transmission at VBS=15V
concept is specially adapted to power applications,
 Integrated bootstrap functionality which need good thermal conduction and electrical
 Over current shutdown isolation, but also EMI-save control and overload
protection.
 Temperature monitor
 Under-voltage lockout at all channels The features of Infineon reverse conducting IGBT
are combined with an optimized SOI gate driver for
 Low side emitter pins accessible for all phase
excellent electrical performance.
current monitoring (open emitter)
 Cross-conduction prevention
 All of 6 switches turn off during protection System Configuration
 Lead-free terminal plating; RoHS compliant  3 half bridges with reverse conducting IGBT
 3Φ SOI gate driver
Target Applications  Thermistor
 Dish washers  Pin-to-heasink creepage distance typ. 1.6mm
 Refrigerators
 Washing machines
 Air-conditioners
 Fans
 Low power motor drives

Datasheet 3 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Pin Configuration
Bottom View

Figure 1: Pin configuration

Internal Electrical Schematic

Figure 2: Internal schematic

Datasheet 4 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Pin Assignment
Pin Number Pin Name Pin Description
1 VS(U) U-phase high side floating IC supply offset voltage
2 VB(U) U-phase high side floating IC supply voltage
3 VS(V) V-phase high side floating IC supply offset voltage
4 VB(V) V-phase high side floating IC supply voltage
5 VS(W) W-phase high side floating IC supply offset voltage
6 VB(W) W-phase high side floating IC supply voltage
7 HIN(U) U-phase high side gate driver input
8 HIN(V) V-phase high side gate driver input
9 HIN(W) W-phase high side gate driver input
10 LIN(U) U-phase low side gate driver input
11 LIN(V) V-phase low side gate driver input
12 LIN(W) W-phase low side gate driver input
13 VDD Low side control supply
14 VFO Fault output / Temperature monitor
15 ITRIP Over current shutdown input
16 VSS Low side control negative supply
17 NW W-phase low side emitter
18 NV V-phase low side emitter
19 NU U-phase low side emitter
20 W Motor W-phase output
21 V Motor V-phase output
22 U Motor U-phase output
23 P Positive bus input voltage
24 NC No Connection

Pin Description
HIN(U,V,W) and LIN(U,V,W) (Low side and high
side control pins, Pin 7 - 12)  5k
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility Figure 3: Input pin structure
down to 3.3V controller outputs. Pull-down resistor
of about 5k is internally provided to pre-bias inputs
during supply start-up and a zener clamp is
provided for pin protection purposes. Input Schmitt-
trigger and noise filter provide beneficial noise
rejection to short input pulses.
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according to
Figure 4. Figure 4: Input filter timing diagram

Datasheet 5 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

It is recommended for proper work of CIPOS™ not The IC shuts down all the gate drivers’ power
to provide input pulse-width lower than 1us. outputs, when the VDD supply voltage is below
VDDUV- = 10.4V. This prevents the external power
switches from critically low gate voltage levels
The integrated gate drive provides additionally a during on-state and therefore from excessive power
shoot through prevention capability which avoids dissipation.
the simultaneous on-state of two gate drivers of the
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 VB(U,V,W) and VS(U,V,W) (High side supplies,
and LO3). When two inputs of a same leg are Pin 1 - 6)
activated, only former activated one is activated so VB to VS is the high side supply voltage. The high
that the leg is kept steadily in a safe state. side circuit can float with respect to VSS following
A minimum deadtime insertion of typically 380ns is the external high side power device emitter voltage.
also provided by driver IC, in order to reduce cross- Due to the low power consumption, the floating
conduction of the external power switches. driver stage is supplied by integrated bootstrap
circuit.
VFO (Fault-output and NTC, Pin 14)
The VFO pin indicates a module failure in case of The under-voltage detection operates with a rising
under voltage at pin VDD or in case of triggered supply threshold of typical VBSUV+ = 12.1V and a
over current detection at ITRIP. A pull-up resistor is falling threshold of VBSUV- = 10.4V.
externally required to bias the NTC. VS(U,V,W) provide a high robustness against
negative voltage in respect of VSS of -50V
transiently. This ensures very stable designs even
VDD under rough conditions.
VFO RON ,FLT from ITRIP -Latch
>1
NW, NV, NU (Low side emitter, Pin 17 - 19)
The low side emitters are available for current
from uv -detection
VSS measurements of each phase leg. It is
Thermistor recommended to keep the connection to pin VSS as
CIPOS™
short as possible in order to avoid unnecessary
inductive voltage drops.
Figure 5: Internal circuit at pin VFO
W, V, U (High side emitter and low side collector,
The same pin provides direct access to the NTC,
Pin 20 - 22)
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures, that the resulting These pins are motor U, V, W input pins
voltage can be directly connected to the P (Positive bus input voltage, Pin 23)
microcontroller. The high side IGBT are connected to the bus
ITRIP (Over current detection function, Pin 15) voltage. It is noted that the bus voltage does not
CIPOS™ provides an over current detection exceed 450 V.
function by connecting the ITRIP input with the
motor current feedback. The ITRIP comparator
threshold (typ. 0.47V) is referenced to VSS ground.
An input noise filter (typ: tITRIPMIN = 530ns) prevents
the driver to detect false over-current events.
Over current detection generates a shut down of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
The fault-clear time is set to typical 65us.

VDD, VSS (Low side control supply and

reference, Pin 13, 16)
VDD is the low side supply and it provides power
both to input logic and to low side output power
stage. Input logic is referenced to VSS ground.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1V is present.

Datasheet 6 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Absolute Maximum Ratings

(VDD = 15V and TJ = 25°C, if not stated otherwise)

Module Section

Value
Description Condition Symbol Unit
min max
Storage temperature range Tstg -40 125 °C
Insulation test voltage RMS, f = 60Hz, t =1min VISOL 2000 - V
Operating case temperature range Refer to Figure 6 TC -40 100 °C

Inverter Section

Value
Description Condition Symbol Unit
min max
Max. blocking voltage IC = 250µA VCES 600 - V
DC link supply voltage of P-N Applied between P-N VPN - 450 V
DC link supply voltage (surge) of P-N Applied between P-N VPN(surge) - 500 V
TC = 25°C, TJ<150°C -20 20
Output current IC A
TC = 80°C, TJ<150°C -15 15
Maximum peak output current less than 1ms IC -45 45 A
Short circuit withstand time1 VDC ≤400V, TJ=150°C tSC - 5 µs
Power dissipation per IGBT Ptot - 32.6 W
Operating junction temperature range TJ -40 150 °C
Single IGBT thermal resistance,
RthJC - 3.84 K/W
junction-case

Control Section

Value
Description Condition Symbol Unit
min max
Module supply voltage VDD -1 20 V
High side floating supply voltage
VBS -1 20 V
(VB vs. VS)
VIN -1 10
Input voltage LIN, HIN, ITRIP V
VITRIP -1 10
Switching frequency fPWM - 20 kHz

1
Allowed number of short circuits: <1000; time between short circuits: >1s.

Datasheet 7 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Recommended Operation Conditions

All voltages are absolute voltages referenced to VSS -potential unless otherwise specified.

Value
Description Symbol Unit
min typ max
DC link supply voltage of P-N VPN 0 - 400 V
High side floating supply voltage (VB vs. VS) VBS 13.5 - 18.5 V

Low side supply voltage VDD 14.0 16 18.5 V

ΔVBS, -1 1
Control supply variation - V/µs
ΔVDD -1 1

VIN 0 5
Logic input voltages LIN,HIN,ITRIP - V
VITRIP 0 5
Between VSS - N (including surge) VSS -5 - 5 V

Figure 6: TC measurement point2

2
Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.

Datasheet 8 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Static Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)

Value
Description Condition Symbol Unit
min typ max

Iout = 15A
- 1.6 2.0
Collector-Emitter saturation voltage TJ = 25°C VCE(sat) V
- 1.8 -
150°C

Iout = -15A
- 1.75 2.2
Emitter-Collector forward voltage TJ = 25°C VF V
- 1.8
150°C

Collector-Emitter leakage current VCE = 600V ICES - - 1 mA

Logic "1" input voltage (LIN,HIN) VIH - 2.1 2.5 V

Logic "0" input voltage (LIN,HIN) VIL 0.7 0.9 - V

ITRIP positive going threshold VIT,TH+ 400 470 540 mV

ITRIP input hysteresis VIT,HYS 40 70 - mV

VDD and VBS supply under voltage VDDUV+

10.8 12.1 13.0 V
positive going threshold VBSUV+

VDD and VBS supply under voltage VDDUV-

9.5 10.4 11.2 V
negative going threshold VBSUV-

VDD and VBS supply under voltage VDDUVH

1.0 1.7 - V
lockout hysteresis VBSUVH

Input clamp voltage

Iin = 4mA VINCLAMP 9.0 10.1 12.5 V
(HIN, LIN, ITRIP)

Quiescent VBx supply current

HIN = 0V IQBS - 300 500 µA
(VBx only)

Quiescent VDD supply current

LIN = 0V, HINX=5V IQDD - 370 900 µA
(VDD only)

Input bias current VIN = 5V IIN+ - 1 1.5 mA

Input bias current VIN = 0V IIN- - 2 - µA

ITRIP input bias current VITRIP = 5V IITRIP+ - 65 150 µA

VFO input bias current VFO = 5V, VITRIP = 0V IFO - 60 - µA

VFO output voltage IFO = 10mA, VITRIP = 1V VFO - 0.5 - V

Datasheet 9 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Dynamic Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)

Value
Description Condition Symbol Unit
min typ max
Turn-on propagation delay time ton - 650 - ns
Turn-on rise time VLIN,HIN = 5V; Iout = 15A, tr - 45 - ns
Turn-on switching time VDC = 300V tc(on) 150 ns
Reverse recovery time trr 200 ns
Turn-off propagation delay time toff - 970 - ns
VLIN,HIN = 0V; Iout = 15A,
Turn-off fall time tf - 130 - ns
VDC = 300V
Turn-off switching time tc(off) 200 ns
Short circuit propagation delay time From VIT,TH+ to 10% ISC tSCP - 1250 - ns
Input filter time ITRIP VITRIP = 1V tITRIPmin 530 ns
Input filter time at LIN, HIN for turn
VLIN,HIN = 0V & 5V tFILIN 290 - ns
on and off
Fault clear time after ITRIP-fault VITRIP = 1V tFLTCLR 40 65 200 µs
Deadtime between low side and high
DTPWM 1.5 - - µs
side
Deadtime of gate drive circuit DTIC 380 ns
VDC = 300V, IC = 15A,
IGBT turn-on energy (includes - 400 -
TJ = 25°C Eon µJ
reverse recovery of diode) - 605 -
150°C
VDC = 300V, IC = 15A,
- 430 -
IGBT turn-off energy TJ = 25°C Eoff µJ
- 625 -
150°C
VDC = 300V, IC = 15A,
- 95 -
Diode recovery energy TJ = 25°C Erec µJ
- 225 -
150°C

Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)

Value
Description Condition Symbol Unit
min typ max
Repetitive peak reverse
VRRM 600 V
voltage
VS2 or VS3 = 300V, TJ = 25°C 35
Bootstrap resistance of VS2 and VS3 = 0V, TJ = 25°C 40
RBS1 
U-phase1 VS2 or VS3 = 300V, TJ = 125°C 50
VS2 and VS3 = 0V, TJ = 125°C 65
Reverse recovery time IF = 0.6A, di/dt = 80A/µs trr_BS 50 ns
Forward voltage drop IF = 20mA, VS2 and VS3 = 0V VF_BS 2.6 V

1
RBS2 and RBS3 have same values to RBS1.

Datasheet 10 Ver. 1.6, 2014-06-01

 CIPOS™ IGCM20F60GA

Thermistor
Value
Description Condition Symbol Unit
min typ max
Resistor TNTC = 25°C RNTC - 85 - k
B-constant of NTC
B(25/100) - 4092 - K
(Negative temperature coefficient)

3500

35
Thermistor resistance [kΩ ]

3000 Min.
30
Typ.
Thermistor resistance [kΩ ]

Max.
25
2500
20

2000
15

10
1500
5

1000 0
50 55 60 65 70 75 80 85 90 95 100 105 110 115 120 125 130
Thermistor temperature [℃]

500

0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Thermistor temperature [℃]

Figure 7: Thermistor resistance – temperature curve and table

(For more information, please refer to the application note ‘AN CIPOS-mini 1 Technical description’)

Mechanical Characteristics and Ratings

Value Unit
Description Condition
min typ max
Mounting torque M3 screw and washer 0.59 0.69 0.78 Nm
Flatness Refer to Figure 8 -50 - 100 µm
Weight - 6.15 - g

Figure 8: Flatness measurement position

Datasheet 11 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Circuit of a Typical Application

Figure 9: Application circuit

Switching Times Definition

Figure 10: Switching times definition

Datasheet 12 Ver. 1.6, 2014-06-01

 CIPOS™ IGCM20F60GA

Electrical characteristic

40 40 40
TJ=25 ℃ V DD =15V
36 36 36
Ic, Collector - Emitter current [A]

Ic, Collector - Emitter current [A]

IF, Emitter - Collector current [A]

32 32 32

28 28 28

24 24 24

20 20 20

16 VDD =13V 16 16
VDD =15V
12 12 TJ=25 ℃ 12 TJ=25 ℃
VDD =20V
8 8 TJ=150 ℃ 8 TJ=150℃

4 4 4

0 0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
V CE(sat), Collector - Emitter voltage [V] V CE(sat), Collector - Emitter voltage [V] V F, Emitter - Collector voltage [V]
Typ. Collector – Emitter saturation voltage Typ. Collector – Emitter saturation voltage Typ. Emitter – Collector forward voltage

3 .5 1 .6 600
Eoff, Turn off switching energy loss [mJ]
Eon, Turn on switching energy loss [mJ]

V D C =300V

Erec, Reverse recovery energy loss [uJ]

V D C =300V
High side @ T J =25 ℃ 550
V D D =15V 1 .4
V D D =15V
3 .0 High side @ T J =150 ℃ 500
Low side @ T J =25 ℃ High side @ T J =25 ℃
1 .2 450 High side @ T J =150 ℃
2 .5 Low side @ T J =150 ℃
High side @ T J=25 ℃
400 Low side @ T J =25 ℃
High side @ T J=150 ℃ 1 .0
Low side @ T J =150 ℃
2 .0 350
Low side @ T J =25 ℃
Low side @ T J =150 ℃ 0 .8 300
1 .5 250
0 .6
200
1 .0
0 .4 150

100
0 .5
0 .2
V D C =300V 50
V D D =15V
0 .0 0 .0 0
0 4 8 12 16 20 24 28 32 36 40 0 4 8 12 16 20 24 28 32 36 40 0 4 8 12 16 20 24 28 32 36 40
Ic, C ollector current [A] Ic, C ollector current [A] Ic, C ollector current [A]
Typ. Turn on switching energy loss Typ. Turn off switching energy loss Typ. Reverse recovery energy loss

900 500
V D C =300V V D C =300V
toff, Turn off propagation delay time [ns]
ton, Turn on propagation delay time [ns]

2200 V D C =300V
tc(on), Turn on switching time [ns]

V D D =15V 450 V D D =15V V D D =15V

850
High side @ T J=25 ℃ 400 High side @ T J =25 ℃ 2000 High side @ T J=25 ℃
800 High side @ T J=150 ℃ High side @ T J =150 ℃
350 High side @ T J=150 ℃
Low side @ T J=25 ℃ Low side @ T J =25 ℃
1800 Low side @ T J=25 ℃
750 Low side @ T J=150 ℃ 300 Low side @ T J =150 ℃ Low side @ T J=150 ℃

700 250 1600

200
650 1400
150
600
100 1200

550
50
1000
500 0
0 4 8 12 16 20 24 28 32 36 40 0 4 8 12 16 20 24 28 32 36 40 0 4 8 12 16 20 24 28 32 36 40
Ic, C ollector current [A] Ic, C ollector current [A] Ic, C ollector current [A]
Typ. Turn on propagation delay time Typ. Turn on switching time Typ. Turn off propagation delay time

1200 700 10
V D C =300V
1100 V D C =300V 650
tc(off), Turn off switching time [ns]

, transient thermal resistance [K/W]

V D D =15V
V D D =15V 600
trr, Reverse recovery time [ns]

1000 1
H igh side @ T J =25 ℃
550
900 H igh side @ T J =150 ℃
500
Low side @ T J =25 ℃
800
High side @ T J=25 ℃ 450 Low side @ T J =150 ℃ 0 .1
700 High side @ T J=150 ℃ 400
D : d u ty ratio
Low side @ T J=25 ℃
D = 50%
600 350 D = 20%
Low side @ T J=150 ℃ 0 .0 1
300 D = 10%
500
D = 5%
250
400 D = 2%
200 S in g le p ulse
1 E -3
thJC

300
150
Z

200 100

100 50 1 E -4
0 4 8 12 16 20 24 28 32 36 40 0 4 8 12 16 20 24 28 32 36 40 1 E -7 1 E -6 1 E -5 1 E -4 1 E -3 0 .0 1 0 .1 1 10 100
Ic, C ollector current [A] Ic, C ollector current [A] t P , P u ls e w id th [s e c .]

Typ. Turn off switching time Typ. Reverse recovery time IGBT transient thermal resistance at all
six IGBTs operation

Datasheet 13 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Package Outline

Datasheet 14 Ver. 1.6, 2014-06-01

CIPOS™ IGCM20F60GA

Revision History
Previous Version: Datasheet Ver. 1.5
Major changes since the last revision
Page or Reference Description of change
8 Figure 6 updated
14 Package Outline updated

Datasheet 15 Ver. 1.6, 2014-06-01

Trademarks of Infineon Technologies AG
AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolGaN™, CoolMOS™, CoolSET™, CoolSiC™, CORECONTROL™, CROSSAVE™, DAVE™,
DI-POL™, DrBLADE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™,
HybridPACK™, ISOFACE™, IsoPACK™, i-Wafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™,
POWERCODE™, PRIMARION™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™,
SIPMOS™, SmartLEWIS™, SOLID FLASH™, SPOC™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™
of ARM Limited, UK. ANSI™ of American National Standards Institute. AUTOSAR™ of AUTOSAR development partnership. Bluetooth™ of Bluetooth
SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of
Epcos AG. FLEXGO™ of Microsoft Corporation. HYPERTERMINAL™ of Hilgraeve Incorporated. MCS™ of Intel Corp. IEC™ of Commission
Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR
STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE
OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ of Openwave Systems Inc. RED HAT™
of Red Hat, Inc. RFMD™ of RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of
Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of
Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design
Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex.

Last Trademarks Update 2014-07-17

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