LM2574M-5 0
LM2574M-5 0
LM2574M-5 0
LM2574, LM2574HV
SNVS104F – JUNE 1999 – REVISED MAY 2020
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOIC (14) 8.992 mm × 7.498 mm
LM2574, LM2574HV
PDIP (8) 6.35 mm × 9.81 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2574, LM2574HV
SNVS104F – JUNE 1999 – REVISED MAY 2020 www.ti.com
Table of Contents
1 Features .................................................................. 1 7.3 Feature Description................................................. 11
2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 13
3 Description ............................................................. 1 8 Application and Implementation ........................ 14
4 Revision History..................................................... 2 8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 19
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 9 Power Supply Recommendations...................... 26
6.1 Absolute Maximum Ratings ...................................... 4 10 Layout................................................................... 26
6.2 ESD Ratings.............................................................. 4 10.1 Layout Guidelines ................................................. 26
6.3 Recommended Operating Conditions....................... 4 10.2 Layout Example .................................................... 27
6.4 Thermal Information .................................................. 4 10.3 Grounding ............................................................. 27
6.5 Electrical Characteristics for All Output Voltage 10.4 Thermal Considerations ........................................ 27
Versions ..................................................................... 5 11 Device and Documentation Support ................. 29
6.6 Electrical Characteristics – 3.3-V Version................. 5 11.1 Device Support...................................................... 29
6.7 Electrical Characteristics – 5-V Version.................... 6 11.2 Documentation Support ........................................ 31
6.8 Electrical Characteristics – 12-V Version.................. 6 11.3 Receiving Notification of Documentation Updates 31
6.9 Electrical Characteristics – 15-V Version.................. 6 11.4 Support Resources ............................................... 31
6.10 Electrical Characteristics – Adjustable Version....... 7 11.5 Trademarks ........................................................... 31
6.11 Typical Characteristics ............................................ 8 11.6 Electrostatic Discharge Caution ............................ 31
7 Detailed Description ............................................ 11 11.7 Glossary ................................................................ 31
7.1 Overview ................................................................. 11 12 Mechanical, Packaging, and Orderable
7.2 Functional Block Diagram ....................................... 11 Information ........................................................... 31
4 Revision History
Changes from Revision E (July 2018) to Revision F Page
• Added Device Information table, ESD Ratings table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
• Changed RθJA value in SOIC column to 77.1 ........................................................................................................................ 4
• Split test conditions row of the Electrical Characteristics table to include TJ = 25°C and TJ < 25°C MIN, TYP, and
MAX values............................................................................................................................................................................. 5
• Split test conditions in IL row to rearrange the MIN, TYP, and MAX values ......................................................................... 5
P Package
8-Pin PDIP NPA Package
Top View 14-Pin SOIC
Top View
FB 1 8 NC
NC 1 14 NC
SIG_GND 2 7 OUTPUT
NC 2 13 NC
ON/OFF 3 6 NC
FB 3 12 OUTPUT
PWR_GND 4 5 V
IN SIG_GND 4 11 NC
ON/OFF 5 10 V
IN
PWR_GND 6 9 NC
NC 7 8 NC
Pin Functions
PIN
I/O DESCRIPTION
NAME PDIP SOIC
Feedback sense input pin. Connect to the midpoint of feedback divider to set
FB 1 3 I VOUT for ADJ version or connect this pin directly to the output capacitor for a
fixed output version.
1, 2, 7, 8, 9,
NC 8, 6 — No internal connection, but must be soldered to PCB for best heat transfer.
11, 13, 14
Enable input to the voltage regulator. High = OFF and low = ON. Connect to
ON/OFF 3 5 I
GND to enable the voltage regulator. Do not leave this pin float.
Emitter pin of the power transistor. This is a switching node. Attached this pin
OUTPUT 7 12 O
to an inductor and the cathode of the external diode.
Power ground pins. Connect to system ground and SIF GND, ground pins of
PWR_GND 4 6 —
CIN and COUT. Path to CIN must be as short as possible.
Signal ground pin. Ground reference for internal references and logic. Connect
SIG_GND 2 4 —
to system ground.
Supply input pin to collector pin of high-side transistor. Connect to power
VIN 5 10 I supply and input bypass capacitors CIN. Path from VIN pin to high frequency
bypass CIN and PWR GND must be as short as possible.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
LM2574 45
Maximum supply voltage V
LM2574HV 63
ON/OFF pin input voltage –0.3 VIN V
Output voltage to ground, steady-state –1 V
Power dissipation Internally limited
Lead temperature, soldering (10 s) 260 °C
Maximum junction temperature 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The package thermal impedance is calculated in accordance with JESD 51-7.
(3) Thermal resistances were simulated on a 4-layer, JEDEC board.
(1) All limits specified at room temperature TYP and MAX. All room temperature limits are 100% production tested. All limits at temperature
extremes are specified through correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate
Average Outgoing Quality Level.
(2) The oscillator frequency reduces to approximately 18 kHz in the event of an output short or an overload which causes the regulated
output voltage to drop approximately 40% from the nominal output voltage. This self protection feature lowers the average power
dissipation of the IC by lowering the minimum duty cycle from 5% down to approximately 2% (see Figure 6).
(3) Output pin sourcing current. No diode, inductor or capacitor connected to output pin.
(4) Feedback pin removed from output and connected to 0 V.
(5) Feedback pin removed from output and connected to 12 V for the adjustable, 3.3-V, and 5-V versions, and 25 V for the 12-V and 15-V
versions, to force the output transistor OFF.
(6) VIN = 40 V (60 V for high voltage version).
Figure 11. Supply Current versus Duty Cycle Figure 12. Feedback Voltage versus Duty Cycle
Figure 13. Feedback Pin Current Figure 14. Junction-to-Ambient Thermal Resistance
7 Detailed Description
7.1 Overview
The LM2574 SIMPLE SWITCHER® regulator is an easy-to-use, non-synchronous, step-down DC-DC converter
with a wide input voltage range from 40 V to up to 60 V for a HV version. It is capable of delivering up to 0.5-A
DC load current with excellent line and load regulation. These devices are available in fixed output voltages of
3.3 V, 5 V, 12 V, 15 V, and an adjustable output version. The family requires few external components and the
pin arrangement was designed for simple, optimum PCB layout.
VIN
Unregulated Internal ON / OFF
5 ON / OFF 3
DC Input Regulator
+ 1
CIN Feedback Fixed Gain
R2
Error Amp
+ Compatator 0.5 Amp
+ Switch
R1 ±
± DRIVER
Output L1 VOUT
7 +
Signal 2 D1
1.23 V COUT L
GND 52 kHz
BAND ± GAP Thermal Current O
OSCILLATOR Reset 4
REFRENCE Shutdown Limit A
D
Pwr Gnd
Figure 18. 1.2-V to 55-V Adjustable 500-mA Power Supply With Low-Output Ripple
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
For an input voltage of 8 V or more, the maximum available output current in this configuration is approximately
100 mA. At lighter loads, the minimum input voltage required drops to approximately 4.7 V.
The switch currents in this buck-boost configuration are higher than in the standard buck-mode design, thus
lowering the available output current. Also, the start-up input current of the buck-boost converter is higher than
the standard buck-mode regulator, which can overload an input power source with a current limit less than
0.6 A. Using a delayed turnon or an undervoltage lockout circuit (described in the Negative Boost Regulator
section) would allow the input voltage to rise to a high enough level before the switcher would be allowed to turn
on.
Because of the structural differences between the buck and the buck-boost regulator topologies, the design
procedure can not be used to select the inductor or the output capacitor. The recommended range of inductor
values for the buck-boost design is between 68 μH and 220 μH, and the output capacitor values must be larger
than what is normally required for buck designs. Low-input voltages or high-output currents require a large value
output capacitor (in the thousands of micro Farads).
The peak inductor current, which is the same as the peak switch current, can be calculated from Equation 6.
ILOAD ´ (VIN + VOUT ) + VIN ´ VOUT 1
IP » ´
VIN VIN + VOUT 2 ´ L 1 ´ f OSC
where
• fosc = 52 kHz. Under normal continuous inductor current operating conditions, the minimum VIN represents the
worst case. Select an inductor that is rated for the peak current anticipated. (6)
Also, the maximum voltage appearing across the regulator is the absolute sum of the input and output voltage.
For a −12-V output, the maximum input voltage for the LM2574 is 28 V, or 48 V for the LM2574HV.
Because of the boosting function of this type of regulator, the switch current is relatively high, especially at low
input voltages. Output load current limitations are a result of the maximum current rating of the switch. Also,
boost regulators cannot provide current-limiting load protection in the event of a shorted load, so some other
means (such as a fuse) may be necessary.
CIN: 22 μF, 75 V
Aluminum electrolytic
COUT: 220 μF, 25 V
Aluminum electrolytic
D1: Schottky, 11DQ06
L1: 330 μH, 52627
(for 5 V in, 3.3 V out, use
100 μH, RL-1284-100)
R1: 2k, 0.1%
R2: 6.12k, 0.1%
Figure 23. 3.3-V LM2574HV Inductor Selection Guide Figure 24. 5-V LM2574HV Inductor Selection Guide
Figure 25. 12-V LM2574HV Inductor Selection Guide Figure 26. 15-V LM2574HV Inductor Selection Guide
where
• VREF = 1.23 V (7)
R1 can be between 1 k and 5 k as in Equation 8. For best temperature coefficient and stability with time, use 1%
metal film resistors.
æV ö
R 2 = R 1 ´ ç OUT - 1÷
V
è REF ø (8)
For this example, use Equation 9 and Equation 10.
æ R ö
VOUT = 1.23 ´ ç 1 + 2 ÷
è R1 ø
select
• R1 = 1 k (9)
æV ö æ 24 V ö
R 2 = R 1 ´ ç OUT - 1÷ = 1k ´ ç - 1÷
è VREF ø è 1.23 V ø (10)
R2 = 1 k (19.51−1) = 18.51 k, closest 1% value is 18.7 k
Output pin voltage, 10 V/div Horizontal time base Output pin voltage, 10 V/div Horizontal time base
Inductor current, 0.2 A/div 5 μs/div Inductor current, 0.2 A/div 5 μs/div
Output ripple voltage VOUT = 5 V Output ripple voltage VOUT = 5 V
20 mV/div 500-mA load current 20 mV/div 100-mA load current
AC-coupled L = 330 Μh AC-coupled L = 100 Μh
Figure 28. Continuous Mode Switching Waveforms Figure 29. Discontinuous Mode Switching Waveforms
Output voltage, 50 V/div 500 mA load Output voltage, 50 V/div, 250 mA load
AC-coupled L = 330 Μh AC-coupled L = 68 Μh
100-mA to 500-mA load pulse COUT = 300 Μf 50-mA to 250-mA load pulse COUT = 470 Μf
Horizontal time base: 200 μs/div Horizontal time base: 200 μs/div
Figure 30. Transient Response for Figure 31. Transient Response for
Continuous Mode Operation Discontinuous Mode Operation
10 Layout
10.3 Grounding
The 8-pin molded PDIP and the 14-pin SOIC package have separate power and signal ground pins. Both ground
pins must be soldered directly to wide printed-circuit board copper traces to assure low inductance connections
and good thermal properties.
Most standard aluminum electrolytic capacitors in the 100 μF to 1000 μF range have 0.5-Ω to 0.1-Ω ESR. Higher-
grade capacitors (low-ESR, high-frequency, or low-inductance) in the 100 μF to 1000 μF range generally have
ESR of less than 0.15 Ω.
11.5 Trademarks
E2E is a trademark of Texas Instruments.
WEBENCH, SIMPLE SWITCHER are registered trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 19-Jul-2022
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
LM2574HVM-12/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-12 P+
LM2574HVM-15 NRND SOIC NPA 14 50 Non-RoHS Call TI Level-2A-220C-4 -40 to 125 LM2574HVM
& Green WEEK -15 P+
LM2574HVM-15/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-15 P+
LM2574HVM-3.3/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-3.3 P+
LM2574HVM-5.0 NRND SOIC NPA 14 50 Non-RoHS Call TI Level-2A-220C-4 -40 to 125 LM2574HVM
& Green WEEK -5.0 P+
LM2574HVM-5.0/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-5.0 P+
LM2574HVM-ADJ/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-ADJ P+
LM2574HVMX-12/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-12 P+
LM2574HVMX-15/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-15 P+
LM2574HVMX-3.3/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-3.3 P+
LM2574HVMX-5.0 NRND SOIC NPA 14 1000 Non-RoHS Call TI Level-2A-220C-4 -40 to 125 LM2574HVM
& Green WEEK -5.0 P+
LM2574HVMX-5.0/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-5.0 P+
LM2574HVMX-ADJ/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574HVM Samples
-ADJ P+
LM2574HVN-12/NOPB ACTIVE PDIP P 8 40 RoHS & Green Call TI | SN | NIPDAU Level-1-NA-UNLIM -40 to 125 LM2574HVN Samples
-12 P+
LM2574HVN-15/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574HVN Samples
-15 P+
LM2574HVN-5.0/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574HVN Samples
-5.0 P+
LM2574HVN-ADJ/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574HVN Samples
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jul-2022
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
-ADJ P+
LM2574M-12/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-12 P+
LM2574M-3.3/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-3.3 P+
LM2574M-5.0 NRND SOIC NPA 14 50 Non-RoHS Call TI Level-2A-220C-4 -40 to 125 LM2574M
& Green WEEK -5.0 P+
LM2574M-5.0/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-5.0 P+
LM2574M-ADJ NRND SOIC NPA 14 50 Non-RoHS Call TI Level-2A-220C-4 -40 to 125 LM2574M
& Green WEEK -ADJ P+
LM2574M-ADJ/NOPB ACTIVE SOIC NPA 14 50 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-ADJ P+
LM2574MX-12/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-12 P+
LM2574MX-3.3/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-3.3 P+
LM2574MX-5.0/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-5.0 P+
LM2574MX-ADJ/NOPB ACTIVE SOIC NPA 14 1000 RoHS & Green SN Level-3-260C-168 HR -40 to 125 LM2574M Samples
-ADJ P+
LM2574N-12/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574N Samples
-12 P+
LM2574N-3.3/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574N Samples
-3.3 P+
LM2574N-5.0/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574N Samples
-5.0 P+
LM2574N-ADJ/NOPB ACTIVE PDIP P 8 40 RoHS & Green NIPDAU | SN Level-1-NA-UNLIM -40 to 125 LM2574N Samples
-ADJ P+
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 19-Jul-2022
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Sprocket Holes
Q1 Q2 Q1 Q2
Pocket Quadrants
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
Width (mm)
H
W
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TUBE
T - Tube
height L - Tube length
W - Tube
width
Pack Materials-Page 3
MECHANICAL DATA
NPA0014B
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