Low Input Current Logic Gate

Optocouplers

Technical Data
HCPL-2200
HCPL-2219

Features • Ground Loop Elimination detector threshold with hysteresis.

• 2.5 kV/µs Minimum Common • Pulse Transformer The three state output eliminates
Mode Rejection (CMR) at Replacement the need for a pullup resistor and
VCM = 400 V (HCPL-2219) allows for direct drive of data
• Isolated Buss Driver
• Compatible with LSTTL, busses. The hysteresis provides
TTL, and CMOS Logic • High Speed Line Receiver differential mode noise immunity
• Wide VCC Range (4.5 to 20 V) and eliminates the potential for
• 2.5 Mbd Guaranteed over Description output signal chatter.
Temperature The HCPL-2200/2219 are
• Low Input Current (1.6 mA) optically coupled logic gates that A superior internal shield on the
• Three State Output (No combine a GaAsP LED and an HCPL-2219 guarantees common
Pullup Resistor Required) integrated high gain photo mode transient immunity of
• Guaranteed Performance detector. The detector has a three 2.5 kV/µs at a common mode
from 0°C to 85°C state output stage and has a voltage of 400 volts.
• Hysteresis
• Safety Approval
UL Recognized -2500 V rms Functional Diagram
for 1 minute
CSA Approved
NC 1 8 VCC
VDE 0884 Approved with TRUTH TABLE
VIORM = 630 V peak (POSITIVE LOGIC)
ANODE 2 7 VO LED ENABLE OUTPUT
(HCPL-2219 Option 060
ON H Z
Only) CATHODE 3 6 VE OFF H Z
• MIL-STD-1772 Version ON L H
OFF L L
Available (HCPL-5200/1) NC 4 5 GND
SHIELD

Applications
• Isolation of High Speed
Logic Systems
• Computer-Peripheral
Interfaces
• Microprocessor System
Interfaces

A 0.1 µ F bypass capacitor must be connected between pins 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this
component to prevent damage and/or degradation which may be induced by ESD.
 2

The Electrical and Switching TTL, LSTTL, and CMOS logic and The HCPL-2200/2219 are useful
Characteristics of the HCPL- result in lower power consump- for isolating high speed logic
2200/2219 are guaranteed over tion compared to other high interfaces, buffering of input and
the temperature range of 0°C to speed optocouplers. Logic signals output lines, and implementing
85°C and a VCC range of 4.5 volts are transmitted with a typical isolated line receivers in high
to 20 volts. Low IF and wide VCC propagation delay of 160 nsec. noise environments.
range allow compatibility with

Selection Guide
Small-Outline Widebody
Minimum CMR 8-Pin DIP (300 Mil) SO-8 (400 Mil) Hermetic
Input On- Single Dual Single Single Single and Dual
dV/dt VCM Current Channel Channel Channel Channel Channel
(V/µs) (V) (mA) Package Package Package Package Packages
1,000 50 1.6 HCPL-2200[1] HCPL-0201 HCNW2201
HCPL-2201
HCPL-2202
1.8 HCPL-2231
2,500 400 1.6 HCPL-2219[1]
5,000[2] 300[2] 1.6 HCPL-2211 HCPL-0211 HCNW2211
HCPL-2212
1.8 HCPL-2232
1,000 50 2.0 HCPL-52XX
HCPL-62XX
Notes:
1. HCPL-2200/2219 devices include output enable/disable functionality.
2. Minimum CMR of 10 kV/µs with VCM = 1000 V can be achieved with input current, IF, of 5 mA.

Ordering Information
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-2219#XXX
060 = VDE 0884 VIORM = 630 Vpeak Option*
300 = Gull Wing Surface Mount Option
500 = Tape and Reel Packaging Option

Option data sheets available. Contact your Agilent sales representative or authorized distributor for
information.

*For HCPL-2219 only.

Schematic ICC
VCC
8
IF
IO
+ VO
2 7
VF IE
– VE
3 6
GND
SHIELD 5
 3

Package Outline Drawings

8-Pin DIP Package
9.65 ± 0.25 7.62 ± 0.25
(0.380 ± 0.010) (0.300 ± 0.010)

TYPE NUMBER 8 7 6 5 6.35 ± 0.25

OPTION CODE*
(0.250 ± 0.010)
A XXXXZ DATE CODE

YYWW RU
UL
1 2 3 4 RECOGNITION

1.78 (0.070) MAX.

1.19 (0.047) MAX.

+ 0.076
5° TYP. 0.254 - 0.051
+ 0.003)
(0.010 - 0.002)
4.70 (0.185) MAX.

0.51 (0.020) MIN.

2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES).
*MARKING CODE LETTER FOR OPTION NUMBERS.
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
1.080 ± 0.320 0.65 (0.025) MAX.
(0.043 ± 0.013)
2.54 ± 0.25
(0.100 ± 0.010)

8-Pin DIP Package with Gull Wing Surface Mount Option 300

PAD LOCATION (FOR REFERENCE ONLY)

9.65 ± 0.25 1.016 (0.040)
(0.380 ± 0.010) 1.194 (0.047)

8 7 6 5
4.826 TYP.
(0.190)
6.350 ± 0.25
(0.250 ± 0.010) 9.398 (0.370)
9.906 (0.390)

1 2 3 4

0.381 (0.015)
1.194 (0.047) 0.635 (0.025)
1.778 (0.070)

1.780 9.65 ± 0.25

(0.070) (0.380 ± 0.010)
1.19 MAX.
(0.047) 7.62 ± 0.25
MAX. (0.300 ± 0.010)
+ 0.076
0.254 - 0.051
4.19 MAX. + 0.003)
(0.165) (0.010 - 0.002)

1.080 ± 0.320
(0.043 ± 0.013) 0.635 ± 0.25
(0.025 ± 0.010)
0.635 ± 0.130 12° NOM.
2.54
(0.100) (0.025 ± 0.005)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
 4

Maximum Solder Reflow Thermal Profile

260
240
∆T = 145°C, 1°C/SEC
220
∆T = 115°C, 0.3°C/SEC
200
TEMPERATURE – °C

180
160
140
120
100
80
∆T = 100°C, 1.5°C/SEC
60
40
20
0
0 1 2 3 4 5 6 7 8 9 10 11 12
TIME – MINUTES

Note: Use of nonchlorine activated fluxes is highly recommended.

Regulatory Information
The HCPL-2200/2219 have been CSA
approved by the following Approved under CSA Component
organizations: Acceptance Notice #5, File CA
88324.
UL
Recognized under UL 1577, VDE
Component Recognition Approved according to VDE
Program, File E55361. 0884/06.92. (HCPL-2219 Option
060 Only)

Insulation and Safety Related Specifications

Parameter Symbol Value Units Conditions
Min. External Air Gap L(IO1) 7.1 mm Measured from input terminals to output terminals,
(External Clearance) shortest distance through air.
Min. External L(IO2) 7.4 mm Measured from input terminals to output terminals,
Tracking Path shortest distance path along body.
(External Creepage)
Minimum Internal 0.08 mm Through insulation distance, conductor to conductor,
Plastic Gap usually the direct distance between the photoemitter
(Internal Clearance) and photodetector inside the optocoupler cavity.
Tracking Resistance CTI 200 V DIN IEC 112/VDE 0303 Part 1
(Comparative
Tracking Index)
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
 5

VDE 0884 Insulation Related Characteristics (HCPL-2219 OPTION 060 ONLY)

Description Symbol Characteristic Units
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 V rms I-IV
for rated mains voltage ≤ 450 V rms I-III
Climatic Classification 55/85/21
Pollution Degree (DIN VDE 0110/1.89) 2
Maximum Working Insulation Voltage VIORM 630 V peak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with t m = 1 sec, VPR 1181 V peak
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test, VPR 945 V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec) VIOTM 6000 V peak
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 12, Thermal Derating curve.)
Case Temperature TS 175 °C
Input Current IS,INPUT 230 mA
Output Power PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS ≥ 109 Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, (VDE 0884), for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in
application.
 6

Absolute Maximum Ratings

(No Derating Required up to 70°C)
Parameter Symbol Min. Max. Units Note
Storage Temperature TS -55 125 °C
Operating Temperature TA -40 85 °C 1
Average Forward Input Current IF(AVG) 10 mA
Peak Transient Input Current IF(TRAN) 1.0 A
(≤ 1 µs Pulse Width, 300 pps)
Reverse Input Voltage VR 5 V
Average Output Current IO 25 mA
Supply Voltage VCC 0 20 V
Three State Enable Voltage VE -0.5 20 V
Output Voltage VO -0.5 20 V
Total Package Power Dissipation PT 210 mW 1
Lead Solder Temperature 260°C for 10 sec., 1.6 mm below seating plane
Solder Reflow Temperature Profile See Package Outline Drawings section

Recommended Operating Conditions

Parameter Symbol Min. Max. Units
Power Supply Voltage VCC 4.5 20 V
Enable Voltage High VEH 2.0 20 V
Enable Voltage Low VEL 0 0.8 V
Forward Input Current IF(ON) 1.6* 5 mA
Forward Input Current IF(OFF) – 0.1 mA
Operating Temperature TA 0 85[1] °C
Fan Out N 4 TTL Loads

*The initial switching threshold is 1.6 mA or less. It is recommended that 2.2 mA be

used to permit at least a 20% CTR degradation guardband.
 7

Electrical Specifications
For 0°C ≤ TA[1] ≤ 85°C, 4.5 V ≤ VCC ≤ 20 V, 1.6 mA ≤ IF(ON) ≤ 5 mA, 2.0 V ≤ VEH ≤ 20 V,
0.0 V ≤ VEL ≤ 0.8 V, 0 mA ≤ IF(OFF) ≤ 0.1 mA. All Typicals at TA = 25°C, VCC = 5 V, IF(ON) = 3 mA unless
otherwise specified. See Note 7.
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Logic Low VOL 0.5 V IOL = 6.4 mA (4 TTL Loads) 1
Output Voltage
Logic High VOH 2.4 * V IOH = -2.6 mA *VOH = VCC - 2.1 V 2
Output Voltage
Output Leakage IOHH 100 µA VO = 5.5 V IF = 5 mA
Current (VOUT > VCC) 500 µA V O = 20 V VCC = 4.5 V
Logic High Enable VEH 2.0 V
Voltage
Logic Low Enable VEL 0.8 V
Voltage
Logic High Enable IEH 20 µA VEN = 2.7 V
Current 100 µA VEN = 5.5 V
0.004 250 µA VEN = 20 V
Logic Low Enable IEL -0.32 mA VEN = 0.4 V
Current
Logic Low Supply ICCL 4.5 6.0 mA VCC = 5.5 V IF = 0 mA
Current IO = Open
5.25 7.5 mA VCC = 20 V VE = Don’t Care
Logic High Supply ICCH 2.7 4.5 mA VCC = 5.5 V IF = 5 mA
Current IO = Open
3.1 6.0 mA VCC = 20 V VE = Don’t Care
High Impedance IOZL -20 µA VO = 0.4 V VEN = 2 V,
State Output IF = 5 mA
Current IOZH 20 µA VO = 2.4 V VEN = 2 V,
100 µA VO = 5.5 V IF = 5 mA
500 µA VO = 20 V
Logic Low Short IOSL 25 mA VO = VCC = 5.5 V IF = 0 mA 2
Circuit Output
Current 40 mA VO = VCC = 20 V
Logic High Short IOSH -10 mA VCC = 5.5 V IF = 5 mA, 2
Circuit Output VO = GND
Current -25 mA VCC = 20 V
Input Current IHYS 0.12 mA VCC = 5 V 3
Hysteresis
Input Forward VF 1.5 1.7 V TA = 25°C IF = 5 mA 4
Voltage 1.75
Input Reverse BVR 5 V IR = 10 µA
Breakdown Voltage
Input Diode ∆VF -1.7 mV/°C IF = 5 mA
Temperature ∆TA
Coefficient
Input Capacitance CIN 60 pF f = 1 MHz, VF = 0 V, Pins 2 and 3
 8

Switching Specifications (AC)

For 0°C ≤ TA[1] ≤ 85°C, 4.5 V ≤ VCC ≤ 20 V, 1.6 mA ≤ IF(ON) ≤ 5 mA, 0.0 mA ≤ IF(OFF) ≤ 0.1 mA.
All Typicals at TA = 25°C, VCC = 5 V, I F(ON) = 3 mA unless otherwise specified.
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Propagation Delay Time to tPHL 210 ns Without Peaking Capacitor 5, 6 4, 5
Logic Low Output Level 160 300 With Peaking Capacitor
Propagation Delay Time to tPLH 170 ns Without Peaking Capacitor 5, 6 4, 5
Logic High Output Level 115 300 With Peaking Capacitor
Output Enable Time to tPZH 25 ns 7, 9
Logic High
Output Enable Time to tPZL 28 ns 7, 8
Logic Low
Output Disable Time from tPHZ 105 ns 7, 9
Logic High
Output Disable Time from tPLZ 60 ns 7, 8
Logic Low
Output Rise Time (10-90%) tr 55 ns 5, 10
Output Fall Time (90-10%) tf 15 ns 5, 10

Parameter Sym. Device Min. Units Test Conditions Fig. Note

Logic High |CMH| IF = 1.6 mA 11 6
HCPL-2200 1,000 V/µs |VCM| = 50 V
Common Mode VCC = 5 V
Transient TA = 25°C
Immunity HCPL-2219 2,500 V/µs |VCM| = 400 V
Logic Low |CML| VF = 0 V 11 6
Common Mode HCPL-2200 1,000 V/µs |VCM| = 50 V VCC = 5 V
Transient TA = 25°C
Immunity HCPL-2219 2,500 V/µs |VCM| = 400 V

Package Characteristics
Parameter Sym. Min. Typ. Max. Units Test Conditions Fig. Note
Input-Output Momentary VISO 2500 V rms RH ≤ 50%, t = 1 min., 3, 8
Withstand Voltage* TA = 25°C
Input-Output Resistance RI-O 1012 Ω VI-O = 500 VDC 3
Input-Output Capacitance CI-O 0.6 pF f = 1 MHz, VI-O = 0 VDC 3
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your equipment level
safety specification or Agilent Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication number 5963-
2203E.
 9

Notes: output pulse. The tPHL propagation sustained with the output voltage in the
1. Derate total package power dissipa- delay is measured from the 50% point logic high state (VO > 2.0 V).
tion, PT, linearly above 70°C free air on the trailing edge of the input pulse 7. Use of a 0.1 µF bypass capacitor
temperature at a rate of 4.5 mW/°C. to the 1.3 V point on the trailing edge connected between pins 5 and 8 is
2. Duration of output short circuit time of the output pulse. recommended.
should not exceed 10 ms. 5. When the peaking capacitor is omitted, 8. In accordance with UL1577, each
3. Device considered a two-terminal propagation delay times may increase optocoupler is proof tested by applying
device: pins 1, 2, 3, and 4 shorted by 100 ns. an insulation test voltage ≥ 3000 V rms
together and pins 5, 6, 7, and 8 6. CML is the maximum rate of rise of the for one second (leakage detection
shorted together. common mode voltage that can be current limit, II-O ≤ 5 µA). This test is
4. The tPLH propagation delay is sustained with the output voltage in the performed before the 100% production
measured from the 50% point on the logic low state (VO < 0.8 V). CM H is test for partial discharge (Method b)
leading edge of the input pulse to the the maximum rate of fall of the shown in the VDE 0884 Insulation
1.3 V point on the leading edge of the common mode voltage that can be
IOH – HIGH LEVEL OUTPUT CURRENT – mA
Characteristics Table, if applicable.
VOL – LOW LEVEL OUTPUT VOLTAGE – V

1.0 0 5
VCC = 4.5 V VCC = 4.5 V VCC = 4.5 V
0.9 -1
IF = 0 mA IF = 5 mA TA = 25 °C

VO – OUTPUT VOLTAGE – V
0.8 VO = 6.4 mA 4
-2
0.7 VO = 2.7 V
0.6 -3 3
0.5 -4 IOH = -2.6 mA

0.4 2
-5
0.3 VO = 2.4 V
-6
0.2 1
0.1 -7 IOL = 6.4 mA
0 -8 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 0 0.5 1.0 1.5 2.0
TA – TEMPERATURE – °C TA – TEMPERATURE – °C IF – INPUT CURRENT – mA

Figure 1. Typical Logic Low Output Figure 2. Typical Logic High Output Figure 3. Output Voltage vs. Forward
Voltage vs. Temperature. Current vs. Temperature. Input Current.

PULSE GEN. VCC

tr = tf = 5 ns
f = 100 kHz OUTPUT VO
10 % DUTY MONITORING
CYCLE HCPL-2200 NODE 5V
VO = 5 V
1 VCC 8
D1 619 Ω
IF
2 7
INPUT
MONITORING D2
6 C2 =
NODE 3
15 pF
D3
1000 R1 4 GND 5 5 kΩ
C1 =
TA = 25 °C 120 pF D4
IF – FORWARD CURRENT – mA

100
IF
+ THE PROBE AND JIG CAPACITANCES
10 VF
– ARE INCLUDED IN C1 AND C2.

1.0 RI 2.15 kΩ 1.10 kΩ 681 Ω

IF (ON) 1.6 mA 3 mA 5 mA
0.1 ALL DIODES ARE 1N916 OR 1N3064.

0.01 IF (ON)
INPUT IF 50 % IF (ON)
0 mA
0.001
1.1 1.2 1.3 1.4 1.5
tPLH tPHL
VF – FORWARD VOLTAGE – V VOH
OUTPUT 1.3 V
VO VOL
Figure 4. Typical Input Diode Forward
Characteristic. Figure 5. Test Circuit for t PLH, t PHL, tr, and tf.
 10

250
VCC = 5 V CL= 15 pF INCLUDING PROBE
C1 (120 pF) PEAKING IF (mA) PULSE AND JIG CAPACITANCES.
tP – PROPAGATION DELAY – ns

CAPACITOR IS USED. 5 GENERATOR +5 V

SEE FIGURE 5. 3 ZO = 50 Ω VCC
200 tr = tf = 5 ns
1.6 HCPL-2200 VO S1
1.6 1 VCC 8
150
tPHL 3 D1 619 Ω
5
IF 2 7

100 CL D2
3 6
tPLH 5 kΩ D3
4 GND 5
50
-60 -40 -20 0 20 40 60 80 100 INPUT VC D4
MONITORING
TA – TEMPERATURE – °C NODE
S2

Figure 6. Typical Propagation Delays D1-4 ARE 1N916 OR 1N3064.

vs. Temperature.

INPUT 3.0 V
1.3 V
VE 0V
tPZL tPLZ S1 AND
S2 CLOSED
OUTPUT S1 CLOSED 0.5 V
1.3 V
VO S2 OPEN VOL
tPZH 0.5 V
VOH
OUTPUT 1.3 V
VO ≈1.5 V
0V
S1 OPEN tPHZ S1 AND
S2 CLOSED S2 CLOSED

Figure 7. Test Circuit for tPHZ, tPZH, t PLZ, and tPZL .

Tp – ENABLE PROPAGATION DELAY – ns

tP – ENABLE PROPAGATION DELAY – ns

100 200 120

VCC CL = 15 pF VCC = 5 V
CL = 15 pF
20 V C2 = 15 pF
VCC
tr, tf – RISE, FALL TIME – ns

100
80
4.5 V 150
20 V
tPHZ 80
tPLZ
60
4.5 V
20 V 100 60
40 tr
4.5 V
tPZL 20 V 40
50
20 4.5 V
tPZH 20
tf
0 0 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C TA – TEMPERATURE – °C TA – TEMPERATURE – °C

Figure 8. Typical Logic Low Enable Figure 9. Typical Logic High Enable Figure 10. Typical Rise, Fall Time vs.
Propagation Delay vs. Temperature. Propagation Delay vs. Temperature. Temperature.
 11

VCC

OUTPUT POWER – PS, INPUT CURRENT – IS

HCPL-2200 HCPL-2219 OPTION 060 ONLY
800
1 VCC 8 OUTPUT VO PS (mW)
A
MONITORING 700 IS (mA)
NODE
B 2 7 600
RIN
3 6 0.1 µF 500
BYPASS
400
VFF 4 5
GND
300
VCM
PULSE GENERATOR + – 200

100

50 V 0
VCM 0 25 50 75 100 125 150 175 200
0V
SWITCH AT A: IF = 1.6 mA TS – CASE TEMPERATURE – °C
VOH
VO (MIN.)*
OUTPUT SWITCH AT B: IF = 0 mA Figure 12. Thermal Derating Curve,
VO VO (MAX.)* Dependence of Safety Limiting Value
VOL with Case Temperature per
VDE 0884.
* SEE NOTE 6.

Figure 11. Test Circuit for Common Mode Transient Immunity and Typical
Waveforms.

VCC1
VCC2
(+5 V) 120 pF (OPTIONAL*) (4.5 TO 20 V)
VCC1 VCC2
(+5 V) 120 pF (+5 V)
HCPL-2200
HCPL-2200 1.1
1.1 DATA kΩ
OUTPUT 1 VCC 8 RL
kΩ 1 VCC 8
CMOS
DATA
2 7 OUTPUT
2 7
UP TO 16 DATA
DATA LSTTL 3 6
3 6 INPUT
INPUT LOADS TTL OR
TTL OR OR 4 TTL LSTTL GND
LSTTL GND TOTEM 4 5
TOTEM 4 5 LOADS
POLE
POLE OUTPUT
OUTPUT GATE VCC2 RL
GATE 5V 1.1 K 2
1
1 10 V 2.37 K
15 V 3.83 K
2 20 V 5.11 K

Figure 13. Recommended LSTTL to LSTTL Circuit. Figure 14. LSTTL to CMOS Interface Circuit.

VCC (+5 V)
120 pF (OPTIONAL*)

HCPL-2200 1.1 HCPL-2200

VCC1 (+5 V) kΩ
1.1 kΩ
1 VCC 8 1 VCC 8

DATA
2 7 2 7
INPUT
D1 4.7 kΩ
TTL OR 3 6 DATA 3 6
LSTTL INPUT
TTL OR
GND LSTTL GND
4 5 OPEN 4 5
COLLECTOR
GATE

D1 (1N4150) REQUIRED FOR

ACTIVE PULL-UP DRIVER.

Figure 16. Series LED Drive with Open Collector Gate

Figure 15. Recommended LED Drive Circuit. (4.7 kΩ Resistor Shunts IOH from the LED).

*The 120 pF capacitor may be omitted in applications where 500 ns propagation delay is sufficient.
www.semiconductor.agilent.com
Data subject to change.
Copyright © 1999 Agilent Technologies
Obsoletes 5962-6298E
5965-3596E (11/99)