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Set No: 1: Code: V3218/R07 Digital Signal Processing Time: 3 Hours Max. Marks: 80

1. The document contains questions from a Digital Signal Processing exam. The questions cover topics like linearity, time invariance, and stability of systems; DFT and IDFT algorithms; filter design using bilinear transformation, FIR and IIR filters; decimation and interpolation; and features of the TMS320C54x DSP processor. 2. The questions test understanding of fundamental DSP concepts like properties of LTI systems, DFT/IDFT computation, filter design techniques, and applications of multirate signal processing. Filter design questions involve designing low pass, band pass, and other filters to meet given specifications. 3. The document provides practice questions on core DSP topics to help students prepare for
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© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
62 views

Set No: 1: Code: V3218/R07 Digital Signal Processing Time: 3 Hours Max. Marks: 80

1. The document contains questions from a Digital Signal Processing exam. The questions cover topics like linearity, time invariance, and stability of systems; DFT and IDFT algorithms; filter design using bilinear transformation, FIR and IIR filters; decimation and interpolation; and features of the TMS320C54x DSP processor. 2. The questions test understanding of fundamental DSP concepts like properties of LTI systems, DFT/IDFT computation, filter design techniques, and applications of multirate signal processing. Filter design questions involve designing low pass, band pass, and other filters to meet given specifications. 3. The document provides practice questions on core DSP topics to help students prepare for
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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Set No: 1

Code : V3218/R07 III B. Tech - II Semester Regular, Examinations, April/May 2011 DIGITAL SIGNAL PROCESSING (Common to EEE, ECE, EIE) Time: 3 Hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a)Determine whether each of the following systems defined below is (i) causal (ii) linear (iii) Dynamic (iv) time invariant (v) stable y[n] = x[n 2] y[n] = log 10 x [n] }

3. Draw the signal flow graph for 16-point DFT using DIT-FFT and DIF-FFT algorithms. 4. a) Determine the impulse response of the system described by the difference equation y[n] 3y[n 1] 4 y[n 2] = x[n] + 2x[n 1] using z-transforms. b) Obtain the direct form-II realization for the system described by 3 1 1 y[n] = y[n 1] y[n 2] + x[n] + x[n 1] 4 8 2 s +1 into a 5. a) Convert the following analog filter with transfer function H (S ) = (s + 1) 2 + 9 digital IIR filter by using bilinear transformation method. The digital IIR filter is having a resonant frequency of . b) Explain method of constructing Butterworth circle in the Z-plane using bilinear transformation method. 6. Design an ideal low pass filter with a frequency response : % % "#$ ' & & ! % "#$ ('( % & Find the values of h[n] for N=11. Find H(z) and also plot the magnitude response. 7. a) Describe the decimation process with a factor of M. Obtain necessary expression. b) Obtain the necessary expression for Interpolation process. 8. Explain the features of TMS320C54x DSP processor. 1 of 1

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where N is even. b) Compute the DFT of with T=0.5. Plot the DFT sequence suggest a method for improving frequency resolution.

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2. a) Compute the DFT of the square wave sequence

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b) Determine the response of the system with impulse response h[n] = a n u[n] input signal x[n] = u[n] u[n 10].

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Set No: 2
Code : V3218/R07 III B. Tech - II Semester Regular, Examinations, April/May 2011 DIGITAL SIGNAL PROCESSING (Common to EEE, ECE, EIE) Time: 3 Hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) Define causality and stability of LSI system and state the conditions for stability. b) Find the impulse and step responses for the given system: y[n] + y[n 1] = x[n] 2x[n 1] even and if then *

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2. a)If X(K) denotes the N-point DFT of N-Point sequence x[n] then show that with N

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3. a) Find the DFT of a sequence x[n] = {1, 2, 3, 4, 4, 3, 2,1}using DIT algorithm. b) Compute the IDFT of the sequence algorithm.

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b) Compute the DFT of a sequence

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for N=4.

4. a) Obtain the transposed direct form-II realization for the system described by 1 1 y[n] = y[n 1] y[n 2] + x[n] + x[n 1] 2 4 (z 1 a)(z 1 b) b) Determine the cascade realization of the system H (z) = with (1 az 1 )(1 bz 1 ) only three delay elements. 5. A digital low pass filter is required to meet the following specifications: Pass band attenuation 1db Pass band edge = 4kHz Stop band attenuation 40db Stop band edge = 8kHz Sample rate 24 KHz The filter is to be designed by performing a bilinear transformation on an analog system function. Design butter worth filter and realize it. 6. Design a filter with :
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X [k ] = {12, 0, 0, 0, 4, 0, 0, 0} using DIF

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Using a Hamming window with N=7. 7. a) Explain Multirate Digital Signal Processing.

b) Consider ramp sequence and sketch its interpolated and decimated versions with a factor of 3. 8. Discuss the on chip peripherals available on the TMS320C5X processor and explain their function. 1 of 1

Set No: 3
Code No: V3218/R07 III B. Tech - II Semester Regular, Examinations, April/May 2011 DIGITAL SIGNAL PROCESSING (Common to EEE, ECE, EIE) Time: 3 Hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a) For each of the following discrete-time signals, determine whether or not the system is linear, shift-invariant, causal and stable. . (i) 1 (ii) 1
4 1 3

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b) Determine the particular solution of the difference equation 1

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b) Derive the algorithm and draw N=8 flow graph for the DIT-FFT algorithm. 4. Determine the system function H(z), impulse response h[n], magnitude and phase response of the LSI system defined by the difference equation: y[n] = x[n] + 3x[n 1] + 2 y[n 1] y[n 2]. 5. a) Find the order and poles of a low pass Butterworth filter that has a 3dB bandwidth of 500 Hz and an attenuation of 40dB at 1KHz. b)Compare Butter worth and Chebyshev approximations.. 6. a) Distinguish between Infinite Impulse Response & Finite Impulse Response filters. b) Design a FIR filter approximating the ideal frequency response
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2. a) Explain how DFT can be obtained by sampling DFS for a given sequence. b) Compute the DFT of a three point sequence & & . Using the same sequence, compute the six point DFT and compare the two DFTs. 3. a) Compute the DFT of the sequence & 7 0 8 9 : using DIF algorithm.

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; when the forcing function is

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Determine the filter coefficients for N=13.

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7. Implement a two state interpolator to meet the following specifications: I=20, Pass band: 0 F 90 transition band: 90 F 100 Input sampling rate: 10,000Hz, Ripple: ;4 ; 8. Discuss various interrupt types supported by TMS320C5X processor.

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Set No: 4
Code No: V3218/R07 III B. Tech - II Semester Regular, Examinations, April/May 2011 DIGITAL SIGNAL PROCESSING (Common to EEE, ECE, EIE) Time: 3 Hours Max. Marks: 80 Answer any FIVE Questions All Questions carry equal marks ***** 1. a)Determine the stability and test the causality for the following functions: -3(,( (i) h &, 6 (ii) < 4 -, (iii) < 8, 6 7 (iv) < 6 . b) Determine the impulse and unit step response of the system described by the difference equation: 1 +:1 + 1 & 5& &. 2. a) Prove the modulation and time shifting properties of distribute time Fourier transform. "#$ & for N = 8 and also plot b) Find the DFT of a sequence: = #>< $'?@ the magnitude and phase spectrum of X(k). 3. a) Compute the eight point DFT of the sequence using DIT-FFT algorithms. b) Implement the DIF-FFT algorithm of N-point DFT where N=8. Also explain the steps involved in this algorithm. 4. a) Obtain the direct form I structure for the system described by 4 2 1 1 5 1 & 5 5 . 3 3 b) Determine H(z) and also discuss the stability of the system described by A1 91 51 & 5 . 5. Design a butter worth low pass filter satisfying the following specifications: " + C/ DB +8EF B " + 8 C/ DG 8EF/ H C+ G 6. Design a band pass filter to pass frequencies in the range 1 to 2 radians/second using Hanning window with N=5. Draw the filter structure and plot its spectrum. 7. Design a two stage Decimator for the following specifications: D=100, Pass band: 0 F 50 transition band: 50 F 55 -4 Input sampling rate: 10,000Hz, Ripple: ;4 ; 8. Explain the features of TMS320C54x DSP processor.

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