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Reliability-Aware Resource Allocation and Binding in High-Level Synthesis

Published: 28 January 2016 Publication History

Abstract

Soft error is nowadays a major reliability issue for nanoscale VLSI, and addressing it during high-level synthesis is essential to improve the efficiency of error mitigation. Motivated by the observation that for behavioral designs, especially control-flow intensive ones, variables and operations have non-uniform soft error vulnerabilities, we propose a novel reliability-aware allocation and binding technique to explore more effective soft error mitigation during high level synthesis. We first perform a comprehensive vulnerability analysis at the behavioral level by considering error propagation and masking in both control and data flows. Then the optimizations based on integer linear programming, as well as heuristic algorithm, are employed to incorporate the behavioral vulnerabilities into the register and functional unit binding phases to achieve cost-efficient error mitigation. The experimental results reveal that compared with the previous techniques which ignored behavioral vulnerabilities, the proposed approach can achieve up to 85% reliability improvement with the same amount of area budget in the RTL design.

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  • (2022)A High-Level Synthesis Methodology for Energy and Reliability-Oriented DesignsIEEE Transactions on Computers10.1109/TC.2020.304388571:1(161-174)Online publication date: 1-Jan-2022
  • (2022)Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS56730.2022.9897824(1-8)Online publication date: 12-Sep-2022
  • (2022)Integer linear programming-based optimization methodology for reliability and energy-aware high-level synthesisMicroelectronics Reliability10.1016/j.microrel.2022.114849139(114849)Online publication date: Dec-2022
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  1. Reliability-Aware Resource Allocation and Binding in High-Level Synthesis

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      Published In

      cover image ACM Transactions on Design Automation of Electronic Systems
      ACM Transactions on Design Automation of Electronic Systems  Volume 21, Issue 2
      January 2016
      422 pages
      ISSN:1084-4309
      EISSN:1557-7309
      DOI:10.1145/2888405
      • Editor:
      • Naehyuck Chang
      Issue’s Table of Contents
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 28 January 2016
      Accepted: 01 October 2015
      Revised: 01 September 2015
      Received: 01 March 2015
      Published in TODAES Volume 21, Issue 2

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      Author Tags

      1. Automatic synthesis
      2. binding
      3. high-level synthesis
      4. optimization
      5. redundant design
      6. soft error

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      • Research-article
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      • Refereed

      Funding Sources

      • German Research Foundation (DFG) as part of the national focal program “Dependable Embedded Systems” (SPP-1500, http://spp1500.itec.kit.edu)

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      Cited By

      View all
      • (2022)A High-Level Synthesis Methodology for Energy and Reliability-Oriented DesignsIEEE Transactions on Computers10.1109/TC.2020.304388571:1(161-174)Online publication date: 1-Jan-2022
      • (2022)Security and Reliability Evaluation of Countermeasures implemented using High-Level Synthesis2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS56730.2022.9897824(1-8)Online publication date: 12-Sep-2022
      • (2022)Integer linear programming-based optimization methodology for reliability and energy-aware high-level synthesisMicroelectronics Reliability10.1016/j.microrel.2022.114849139(114849)Online publication date: Dec-2022
      • (2021)Sensitivity of computational fluid dynamics simulations against soft errorsComputing10.1007/s00607-021-00976-0Online publication date: 13-Jul-2021
      • (2017)System level SEUs propagation analysis via data flow-based reduction and quantitative model checking2017 First International Conference on Embedded & Distributed Systems (EDiS)10.1109/EDIS.2017.8284025(1-6)Online publication date: Dec-2017
      • (2017)Improving combinational circuit resilience against soft errors via selective resource allocation2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)10.1109/DDECS.2017.7934576(12-15)Online publication date: Apr-2017

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