research-article

On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena: Sense and React

Authors:

Günhan Dündar,

Faík Başkaya,

Alí Emre Pusane,

Mustafa Berke YeltenAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 24, Issue 4

Article No.: 44, Pages 1 - 22

https://doi.org/10.1145/3325069

Published: 28 June 2019 Publication History

Abstract

Performance of analog circuits degrades over time due to several time-dependent degradation mechanisms. Due to the increased aging problems in ever-shrinking dimensions, reliability of complementary metal-oxide-semiconductor analog circuits has become a major concern. Overdesign is a popular aging-aware circuit design approach, where circuit operation is guardbanded by choosing the design point beyond the optimal region. For the sake of reliability, power consumption and chip area are sacrificed in this approach, which is undesirable considering strict energy limitations in modern applications. Conversely, Sense and React (S8R) approach serves the same purpose without any additional power consumption, in which degradation of circuit features is detected by online monitoring and recovered immediately. Furthermore, such systems enable remote control and healing of circuits. However, design of an S8R system is quite complicated. In particular, determination of efficient aging signatures and design of recovery strategy are highly challenging problems. This study thoroughly discusses the design process of S8R systems and proposes computer-aided-design-based design strategies that reduce the designer effort considerably. A novel design automation tool for S8R systems was developed, in which signature selection and recovery determination were integrated. To demonstrate proposed design strategies, two different S8R systems are implemented, simulated, and discussed in detail.

References

[1]

Engin Afacan et al. 2015. A deterministic aging simulator and an analog circuit sizing tool robust to aging phenomena. In Proceedings of the International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD’15). IEEE, 1--4.

[2]

Engin Afacan et al. 2016a. An analog circuit synthesis tool based on efficient and reliable yield estimation. Microelectron. J. 54 (2016), 14--22.

Digital Library

[3]

Engin Afacan et al. 2016b. Efficient signature selection tool for sense 8 react systems. In Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD’16). IEEE, 1--4.

[4]

Engin Afacan et al. 2016c. Semi-empirical aging model development via accelerated aging test. In Proceedings of the 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD’16). IEEE, 1--4.

[5]

Engin Afacan, Gunhan Dundar, and Faik Baskaya. 2014. Reliability assessment of CMOS differential cross-coupled LC oscillators and a novel on chip self-healing approach against aging phenomena. Microelectron. Reliabil. 54, 2 (2014), 397--403.

[6]

Syed Askari and Mehrdad Nourani. 2010. A design for reliability methodology based on selective overdesign. In Proceedings of the 5th International Design and Test Workshop. IEEE, 73--77.

[7]

Manuel J. Barragan and Gildas Leger. 2013. Efficient selection of signatures for analog/RF alternate test. In Proceedings of the 18th IEEE European Test Symposium (ETS’13). IEEE, 1--6.

[8]

Manuel J. Barragan and Gildas Leger. 2015. Feature selection for alternate test using wrappers: Application to an RF LNA case study. In Proceedings of the Design, Automation 8 Test in Europe Conference 8 Exhibition. EDA Consortium, 1229--1232.

Digital Library

[9]

Doohwang Chang, Sule Ozev, Bertan Bakkaloglu, Sayfe Kiaei, Engin Afacan, and Gunhan Dundar. 2014. Reliability enhancement using in-field monitoring and recovery for RF circuits. In Proceedings of the 32nd VLSI Test Symposium (VTS’14). IEEE, 1--6.

[10]

Pieter De Wit and Georges Gielen. 2012. Degradation-resilient design of a self-healing xDSL line driver in 90 nm CMOS. IEEE J. Solid-State Circ. 47, 7 (2012), 1757--1767.

[11]

Pietro Maris Ferreira et al. 2015. Automated system-level design for reliability: RF front-end application. In Computational Intelligence in Analog and Mixed-Signal and Radio-Frequency Circuit Design. Springer, 363--389.

[12]

Georges Gielen et al. 2008. Emerging yield and reliability challenges in nanometer CMOS technologies. In Proceedings of the Conference on Design, Automation and Test in Europe. ACM, 1322--1327.

Digital Library

[13]

Georges Gielen, Elie Maricau, and Pieter De Wit. 2012. Designing reliable analog circuits in an unreliable world. In Proceedings of the IEEE Custom Integrated Circuits Conference. IEEE, 1--4.

[14]

Guido Groeseneken, Robin Degraeve, Ben Kaczer, and Philippe Roussel. 2005. Recent trends in reliability assessment of advanced CMOS technologies. In Proceedings of the International Conference on Microelectronic Test Structures (ICMTS’05). IEEE, 81--88.

[15]

Yichuan Lu et al. 2015. A comparative study of one-shot statistical calibration methods for analog/RF ICs. In Proceedings of the IEEE International Test Conference (ITC’15). IEEE, 1--10.

[16]

Souvik Mahapatra. 2016. Fundamentals of Bias Temperature Instability in MOS Transistors. Springer.

[17]

Elie Maricau and Georges Gielen. 2011. Computer-aided analog circuit design for reliability in nanometer CMOS. IEEE J. Emerg. Select. Top. Circ. Syst. 1, 1 (2011), 50--58.

[18]

Satchidananda Mishra, Michael Pecht, and Douglas L. Goodman. 2002. In-situ sensors for product reliability monitoring. In Proceedings of the Conference on Design, Test, Integration, and Packaging of Micro-Opto-Electro-Mechanical Systems/Micro-Electro-Mechanical Systems (MEMS/MOEMS’02), Vol. 4755. International Society for Optics and Photonics, 10--20.

[19]

Ch. Mourrain, Ch. Tourniol, and M. J. Bouzid. 1998. Electrical parameters degradation law of MOSFET during ageing. Microelectron. Reliabil. 38, 6 (1998), 1115--1119.

[20]

Vishwanath Natarajan et al. 2010. Analog signature-driven postmanufacture multidimensional tuning of RF systems. IEEE Design Test Comput. 27, 6 (2010), 6--17.

Digital Library

[21]

Zhenyu Qi and Mircea R. Stan. 2008. NBTI resilient circuits using adaptive body biasing. In Proceedings of the 18th ACM Great Lakes Symposium on Very Large Scale Integration (VLSI’08). ACM, 285--290.

Digital Library

[22]

R. Radojcic. 1984. Hot-electron aging in p-channel MOSFET’s for VLSI CMOS. IEEE Trans. Electron. Devices 31, 12 (1984), 1896--1898.

[23]

Gábor J. Székely et al. 2009. Brownian distance covariance. Ann. Appl. Stat. 3, 4 (2009), 1236--1265.

[24]

James Tschanz, Nam Sung Kim, Saurabh Dighe, Jason Howard, Gregory Ruhl, Sriram Vangal, Siva Narendra, Yatin Hoskote, Howard Wilson, Carol Lam et al. 2007. Adaptive frequency and biasing techniques for tolerance to dynamic temperature-voltage variations and aging. In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC’07). IEEE, 292--604.

[25]

Rakesh Vattikonda, Wenping Wang, and Yu Cao. 2006. Modeling and minimization of PMOS NBTI effect for robust nanometer design. In Proceedings of the 43rd Annual Design Automation Conference. ACM, 1047--1052.

Digital Library

[26]

Miaomiao Wang, Zuoguang Liu, Tenko Yamashita, James H. Stathis, and Chia-yu Chen. 2015. Separation of interface states and electron trapping for hot carrier degradation in ultra-scaled replacement metal gate n-FinFET. In Proceedings of the IEEE International Reliability Physics Symposium (IRPS’15). IEEE, 4A--5.

[27]

Sufi Zafar et al. 2006. A comparative study of NBTI and PBTI (charge trapping) in SiO2/HfO2 stacks with FUSI, TiN, Re gates. In Proceedings of the Symposium on VLSI Technology. IEEE, 23--25.

[28]

Sufi Zafar, Arvind Kumar, Evgeni Gusev, and E. Cartier. 2005. Threshold voltage instabilities in high-k gate dielectric stacks. IEEE Trans. Device Mater. Reliabil. 5, 1 (2005), 45--64.

Cited By

Zhang JHu JJiang MXiao YLi TLu YZhang Q(2023)A HCI-hardened self-healing operational amplifier circuitMicroelectronics Reliability10.1016/j.microrel.2023.115251151(115251)Online publication date: Dec-2023
https://doi.org/10.1016/j.microrel.2023.115251
Shamshiri AGhaznavi-Ghoushchi MKariman A(2022)ML-Based Aging Monitoring and Lifetime Prediction of IoT Devices With Cost-Effective Embedded Tags for Edge and Cloud OperabilityIEEE Internet of Things Journal10.1109/JIOT.2021.31160659:10(7433-7445)Online publication date: 15-May-2022
https://doi.org/10.1109/JIOT.2021.3116065

Index Terms

On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena: Sense and React
1. Hardware
  1. Electronic design automation
    1. Methodologies for EDA
      1. Software tools for EDA
  2. Robustness
    1. Fault tolerance
      1. Failure recovery, maintenance and self-repair
    2. Hardware reliability
      1. Aging of circuits and systems

Recommendations

On-chip aging sensor circuits for reliable nanometer MOSFET digital circuits

Accurate performance-degradation monitoring of nanometer MOSFET digital circuits is one of the most critical issues in adaptive design techniques for overcoming the performance degradation due to aging phenomena such as negative bias temperature ...
An ultra-thin oxide sub-1 V CMOS bandgap voltage reference

This paper presents a sub-1 V CMOS bandgap voltage reference that accounts for the presence of direct tunneling-induced gate current. This current increases exponentially with decreasing oxide thickness and is especially prevalent in traditional non-...
Design and Simulation for NBTI Aware Logic Gates
Abstract
Reliability of the electronic circuits is one of the most prominent factor in the development of very large-scale integration (VLSI) industry. Huge demand for compact size and high performance of electronic devices leads the excessive scaling of ...

Comments

Information & Contributors

Information

Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 24, Issue 4

July 2019

258 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/3326461

Editor:
Naehyuck Chang
Korea Advanced Institute of Science and Technology, Korea

Issue’s Table of Contents

Copyright © 2019 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 28 June 2019

Accepted: 01 April 2019

Revised: 01 January 2019

Received: 01 July 2018

Published in TODAES Volume 24, Issue 4

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article
Research
Refereed

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

2
Total Citations
View Citations
208
Total Downloads

Downloads (Last 12 months)24
Downloads (Last 6 weeks)5

Reflects downloads up to 10 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

Zhang JHu JJiang MXiao YLi TLu YZhang Q(2023)A HCI-hardened self-healing operational amplifier circuitMicroelectronics Reliability10.1016/j.microrel.2023.115251151(115251)Online publication date: Dec-2023
https://doi.org/10.1016/j.microrel.2023.115251
Shamshiri AGhaznavi-Ghoushchi MKariman A(2022)ML-Based Aging Monitoring and Lifetime Prediction of IoT Devices With Cost-Effective Embedded Tags for Edge and Cloud OperabilityIEEE Internet of Things Journal10.1109/JIOT.2021.31160659:10(7433-7445)Online publication date: 15-May-2022
https://doi.org/10.1109/JIOT.2021.3116065

View Options

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Article

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

HTML Format

View this article in HTML Format.

Media

Figures

Other

Tables

View Issue’s Table of Contents