research-article

CASP: concurrent autonomous chip self-test using stored test patterns

Authors:

Subhasish MitraAuthors Info & Claims

DATE '08: Proceedings of the conference on Design, automation and test in Europe

Pages 885 - 890

https://doi.org/10.1145/1403375.1403590

Published: 10 March 2008 Publication History

Abstract

CASP, Concurrent Autonomous chip self-test using Stored test Patterns, is a special kind of self-test where a system tests itself concurrently during normal operation without any downtime visible to the end-user. CASP consists of two ideas: 1. Storage of very thorough test patterns in non-volatile memory; and, 2. Architectural and system-level support for autonomous testing of one or more cores in a multi-core system using stored patterns, concurrently with normal system operation, without bringing down the entire system. CASP enables design of robust systems with built-in features for circuit failure prediction, error detection, self-diagnosis and self-repair. Such systems are necessary to overcome major reliability challenges in scaled-CMOS technologies. Implementation of CASP in the OpenSPARC T1 multi-core processor demonstrates its effectiveness and practicality.

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Index Terms

CASP: concurrent autonomous chip self-test using stored test patterns
1. Hardware

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cover image ACM Conferences

DATE '08: Proceedings of the conference on Design, automation and test in Europe

March 2008

1575 pages

ISBN:9783981080131

DOI:10.1145/1403375

General Chair:
Donatella Sciuto
Politecnico di Milano, Italy

Copyright © 2008 ACM.

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Published: 10 March 2008

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DATE '08: Design, Automation and Test in Europe

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https://doi.org/10.1109/ETS56758.2023.10173972
Yassien EXu YJiang HNguyen TDworak JManikas TNepal K(2023)Harvesting Wasted Clock Cycles for Efficient Online Testing2023 IEEE European Test Symposium (ETS)10.1109/ETS56758.2023.10173955(1-6)Online publication date: 22-May-2023
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