Priority directed test generation for functional verification using neural networks
Authors: 
Hao Shen, Yuzhuo FuAuthors Info & Claims
Hao Shen, Yuzhuo FuAuthors Info & ClaimsPages 1052 - 1055
Abstract
Functional verification is the bottleneck in delivering today's highly integrated electronic systems and chips. We should notice the simulation times and computation resource challenge in the automatic pseudo-random test generation and a novel solution named Priority Directed test Generation (PDG) is proposed in this paper. With PDG, a test vector which hasn't been simulated is granted a priority attribute. The priority indicates the possibility of detecting new bugs by simulating this vector. We show how to apply Artificial Neural Networks (ANNs) learning algorithm to the PDG problem. Several experiments are given to exhibit how to achieve better result in this PDG method.
References
[1]
"OpenRISC 1000," http://www.opencores.org/projects/or1k/
[2]
"verisity," http://www.verisity.com/
[3]
Mike G. Bartley and Darren Galpin and Tim Blackmore, "A Comparison of Three Verification Techniques: Directed Testing, Pseudo-Random Testing and Property Checking," 39th Design Automation Conference, June 10--14, 2002.
[4]
Michael Behm and John Ludden and Yossi Lichtenstein and Michal Rimon and Michael Vinov, "Industrial Experience with Test Generation Languages for Processor Verification," 41th Design Automation Conference, pp. 36--40, June 7--11, 2004.
[5]
Mrinal Bose and Jongshin Shin and Elizabeth M. Rudnick and Todd Dukes and Magdy Abadir, "A genetic approach to automatic bias generation for biased random instruction generation," 2001 Congress on Evolutionary Computation CEC2001, pp. 442C448, May, 2001.
[6]
Alessandro Fin and Franco Fummi and Graziano Pravadelli, "AMLETO: A Multi-language Environment for Functional Test Generation," International Test Conference 2001
[7]
Shai Fine and Avi Ziv, "Coverage Directed Test Generation for Functional Verification using Bayesian Networks," "40th Design Automation Conference, pp. 286--291, June 2--6, 2003.
[8]
Simon Haykin, "Neural Networks A Comprehensive Foundation (Second Edition)," Prentice Hall, pp. 1--31.
[9]
Oded Lachish and Eitan Marcus and Shmuel Ur, Avi Ziv, "Hole Analysis for Functional Coverage Data," 39th Design Automation Conference, June 10--14, 2002.
[10]
Abraham Silberschatz and Henry F. Korth and S. Sudarshan, "Database System Concepts (Fourth Edition)," McGraw-Hill Companies, pp. 839.
- Priority directed test generation for functional verification using neural networks
Recommendations
Accelerating Coverage Directed Test Generation for Functional Verification: A Neural Network-based Framework
GLSVLSI '18: Proceedings of the 2018 Great Lakes Symposium on VLSIWith increasing design complexity, the correlation between test transactions and functional properties becomes non-intuitive, hence impacting the reliability of test generation. This paper presents a modified coverage directed test generation based on an ...
The Risks of Coverage-Directed Test Case Generation
A number of structural coverage criteria have been proposed to measure the adequacy of testing efforts. In the avionics and other critical systems domains, test suites satisfying structural coverage criteria are mandated by standards. With the advent of ...
Directed test generation for effective fault localization
ISSTA '10: Proceedings of the 19th international symposium on Software testing and analysisFault-localization techniques that apply statistical analyses to execution data gathered from multiple tests are quite effective when a large test suite is available. However, if no test suite is available, what is the best approach to generate one? ...
Comments
Information & Contributors
Information
Published In
Copyright © 2005 ACM.
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]
Sponsors
- IEEE SSCS Shanghai Chapter
- IEEE Beijing Section
- SIGDA: ACM Special Interest Group on Design Automation
- Fudan University
- IEEE CAS
- Chinese Institute of Electronics
- Shanghai IC Industry Association
Publisher
Association for Computing Machinery
New York, NY, United States
Publication History
Published: 18 January 2005
Check for updates
Qualifiers
- Article
Conference
ASPDAC05
Sponsor:
Acceptance Rates
Overall Acceptance Rate 466 of 1,454 submissions, 32%
Upcoming Conference
ASPDAC '25
- Sponsor:
- sigda
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 189Total Downloads
- Downloads (Last 12 months)1
- Downloads (Last 6 weeks)0
Reflects downloads up to 27 Jul 2024
Other Metrics
Citations
View Options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in