research-article

Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel

Authors:

Christophe Wolinski,

Krzysztof Kuchcinski,

Erwan RaffinAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 15, Issue 1

Article No.: 1, Pages 1 - 36

https://doi.org/10.1145/1640457.1640458

Published: 28 December 2009 Publication History

Abstract

This article presents a new tool for automatic design of application-specific reconfigurable processor extensions based on UPaK (Abstract Unified Patterns Based Synthesis Kernel for Hardware and Software Systems). We introduce a complete design flow that identifies new instructions, selects specific instructions and schedules a considered application on the newly created reconfigurable architecture. The identified extensions are implemented as specialized sequential or parallel instructions. These instructions are executed on a reconfigurable unit implementing all merged patterns. Our method uses specially developed algorithms for subgraph isomorphism that are implemented as graph matching constraints. These constraints together with separate algorithms are able to efficiently identify computational patterns and carry out application mapping and scheduling. Our methods can handle both time-constrained and resource-constrained scheduling. Experimental results show that the presented method provides high coverage of application graphs with small number of patterns and ensures high application execution speedup both for sequential and parallel application execution with reconfigurable processor extensions implementing selected patterns.

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Cited By

Kowaluk MLingas A(2022)A Multi-Dimensional Matrix Product—A Natural Tool for Parameterized Graph AlgorithmsAlgorithms10.3390/a1512044815:12(448)Online publication date: 28-Nov-2022
https://doi.org/10.3390/a15120448
Kowaluk MLingas A(2022)Rare Siblings Speed-Up Deterministic Detection and Counting of Small Pattern GraphsAlgorithmica10.1007/s00453-022-01063-285:4(976-991)Online publication date: 19-Nov-2022
https://dl.acm.org/doi/10.1007/s00453-022-01063-2
Kowaluk MLingas A(2019)Rare Siblings Speed-Up Deterministic Detection and Counting of Small Pattern GraphsFundamentals of Computation Theory10.1007/978-3-030-25027-0_22(322-334)Online publication date: 12-Aug-2019
https://dl.acm.org/doi/10.1007/978-3-030-25027-0_22
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Index Terms

Automatic design of application-specific reconfigurable processor extensions with UPaK synthesis kernel
1. Hardware
  1. Electronic design automation
    1. High-level and register-transfer level synthesis
      1. Datapath optimization
    2. Logic synthesis
      1. Circuit optimization
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language features
        Constraints

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 15, Issue 1

December 2009

188 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/1640457

Issue’s Table of Contents

Copyright © 2009 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 28 December 2009

Accepted: 01 August 2009

Revised: 01 May 2009

Received: 01 December 2008

Published in TODAES Volume 15, Issue 1

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Cited By

Kowaluk MLingas A(2022)A Multi-Dimensional Matrix Product—A Natural Tool for Parameterized Graph AlgorithmsAlgorithms10.3390/a1512044815:12(448)Online publication date: 28-Nov-2022
https://doi.org/10.3390/a15120448
Kowaluk MLingas A(2022)Rare Siblings Speed-Up Deterministic Detection and Counting of Small Pattern GraphsAlgorithmica10.1007/s00453-022-01063-285:4(976-991)Online publication date: 19-Nov-2022
https://dl.acm.org/doi/10.1007/s00453-022-01063-2
Kowaluk MLingas A(2019)Rare Siblings Speed-Up Deterministic Detection and Counting of Small Pattern GraphsFundamentals of Computation Theory10.1007/978-3-030-25027-0_22(322-334)Online publication date: 12-Aug-2019
https://dl.acm.org/doi/10.1007/978-3-030-25027-0_22
Kowaluk MLingas A(2018)A fast deterministic detection of small pattern graphs in graphs without large cliquesTheoretical Computer Science10.1016/j.tcs.2018.10.028Online publication date: Oct-2018
https://doi.org/10.1016/j.tcs.2018.10.028
Kowaluk MLingas A(2018)Are unique subgraphs not easier to find?Information Processing Letters10.1016/j.ipl.2018.02.010134:C(57-61)Online publication date: 1-Jun-2018
https://dl.acm.org/doi/10.1016/j.ipl.2018.02.010
Emeretlis ATheodoridis GAlefragis PVoros N(2017)Static Mapping of Applications on Heterogeneous Multi-Core Platforms Combining Logic-Based Benders Decomposition with Integer Linear ProgrammingACM Transactions on Design Automation of Electronic Systems10.1145/313321923:2(1-24)Online publication date: 21-Dec-2017
https://dl.acm.org/doi/10.1145/3133219
Emeretlis ATsakoulis TTheodoridis GAlefragis PVoros N(2017)Task graph mapping and scheduling on heterogeneous architectures under communication constraints2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)10.1109/SAMOS.2017.8344634(239-244)Online publication date: Jul-2017
https://doi.org/10.1109/SAMOS.2017.8344634
Kowaluk MLingas A(2017)A Fast Deterministic Detection of Small Pattern Graphs in Graphs Without Large CliquesWALCOM: Algorithms and Computation10.1007/978-3-319-53925-6_17(217-227)Online publication date: 21-Feb-2017
https://doi.org/10.1007/978-3-319-53925-6_17
Floderus PKowaluk MLingas ALundell E(2015)Detecting and Counting Small Pattern GraphsSIAM Journal on Discrete Mathematics10.1137/14097821129:3(1322-1339)Online publication date: Jan-2015
https://doi.org/10.1137/140978211
Sawano HKambe T(2014)A Circuit Design Method for Dynamic Reconfigurable CircuitsElectronics and Communications in Japan10.1002/ecj.1157797:2(44-51)Online publication date: 7-Feb-2014
https://doi.org/10.1002/ecj.11577
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