The impact of scaling in advanced RF/MS-CMOS has been extensively discussed but there has not been a publication that compares the RF characteristics of 28nm high-K metal gate HKMG and PolySiON technologies fabricated in the same... more
The impact of scaling in advanced RF/MS-CMOS has been extensively discussed but there has not been a publication that compares the RF characteristics of 28nm high-K metal gate HKMG and PolySiON technologies fabricated in the same facility. In this work, we show that HKMG improves transistor fT and increases varactor tunning range. However, it can actually decrease fmax. We examine how process features made to optimize cost and digital performance impact the RF performance. Process features which improve DC current and gm, including HKMG also give higher fT. However, fmax is sensitive to gate resistance and PolySiON has an advantage here.
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... Bo Zhang1,2,3, Yong-Zhong Xiong2, Lei Wang2, Sanming Hu2, Jinglin Shi2, Yi-Qi Zhuang1, Le-Wei Li3, Xiaojun Yuan2 1Xidian University Yanta District ... 8. Chee Chong Lim, Kiat Seng Yeo, Kok Wai Chew, Cabuk, A, Jiang-Min Gu, Suh Fei... more
... Bo Zhang1,2,3, Yong-Zhong Xiong2, Lei Wang2, Sanming Hu2, Jinglin Shi2, Yi-Qi Zhuang1, Le-Wei Li3, Xiaojun Yuan2 1Xidian University Yanta District ... 8. Chee Chong Lim, Kiat Seng Yeo, Kok Wai Chew, Cabuk, A, Jiang-Min Gu, Suh Fei Lim, Chirn Chye Boon, Manh Anh Do ...
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ABSTRACT On-chip transmission lines are basic components in millimeter-wave and terahertz circuits. As the frequency goes up, the transmission lines are more and more important to determine the performance of the circuits. In this paper,... more
ABSTRACT On-chip transmission lines are basic components in millimeter-wave and terahertz circuits. As the frequency goes up, the transmission lines are more and more important to determine the performance of the circuits. In this paper, CPW, slow wave CPW (SCPW) with different shielding layers and CPWG fabricated in a commercial 0.18 ¿m CMOS process have been characterized and analyzed. Based on measured two-port S-parameters up to 110 GHz, the attenuation and phase constants are compared. The relative dielectric permittivity is extracted and the relation with the reverse of the distance is shown which provides the hint for the choice of the shielding layers. However, the application frequency should be considered due to the attenuation is strongly frequency dependent.
This paper presents a simple scheme for estimating the digital switching noise at the sensitive RF nodes with the help of a lumped element model for the substrate network. The model parameters have been extracted from the 2-port RF... more
This paper presents a simple scheme for estimating the digital switching noise at the sensitive RF nodes with the help of a lumped element model for the substrate network. The model parameters have been extracted from the 2-port RF measurements. The efficacy of different isolation schemes such as grounded P+ guard bars and deep N-well has been investigated using phase
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Thin film microstrip (TFMS) lines have important applications in the design of CMOS microwave and millimeter wave circuits including on-chip filters and matching networks. In these circuits, the achievable passband insertion loss or the... more
Thin film microstrip (TFMS) lines have important applications in the design of CMOS microwave and millimeter wave circuits including on-chip filters and matching networks. In these circuits, the achievable passband insertion loss or the Q-factor of the matching networks are determined by the unloaded Q-factors of the TFMS lines. Since CMOS processes provide various possibilities for implementing TFMS lines due
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A 1.8 V, 1.5 mA fully integrated LC-tank voltage controlled oscillator fabricated in a 0.18 μm CMOS process is presented. VCO is tunable between 3.53 GHz and 4.0 GHz and displays a phase noise between -118dBc/Hz and $112dBc/Hz at 3 MHz... more
A 1.8 V, 1.5 mA fully integrated LC-tank voltage controlled oscillator fabricated in a 0.18 μm CMOS process is presented. VCO is tunable between 3.53 GHz and 4.0 GHz and displays a phase noise between -118dBc/Hz and $112dBc/Hz at 3 MHz offset frequency across the tuning frequency range. This low power consumption is achieved through optimized design of LC tank based on power constraints.
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ABSTRACT Long term evolution (LTE) is the next generation wireless communication network which is an all-IP based system. Nowadays, more and more kinds of services are being transmitted on wireless communication network with different... more
ABSTRACT Long term evolution (LTE) is the next generation wireless communication network which is an all-IP based system. Nowadays, more and more kinds of services are being transmitted on wireless communication network with different requirements. So, to satisfy the quality of service (QoS) of multi-service requirements is one of the key challenges that need to be dealt in the LTE system. In this paper, we propose a cross layer solution called token bucket scheduler (TBS) for real time service that allocates resource block (RB) for different services in order to meet their QoS requirements. TBS utilizes instantaneous downlink channel signal to interference plus noise ratio (SINR) and service QoS information when determining whether a RB allocates to a real time service. Through extensive simulations, the results show that TBS algorithm greatly improves throughput, delay and packet loss ratio compared with the maximum-largest weighted delay first (M-LWDF) scheduling algorithm and exponential/proportional fair (EXP/PF) scheduling algorithm in real time service.
Abstract Transmission lines (T-lines) and interconnects are fundamental components for the millimeter-wave (mmW) and terahertz (THz) circuits. Based on the through-silicon via (TSV) technology, three T-lines, four different interconnects,... more
Abstract Transmission lines (T-lines) and interconnects are fundamental components for the millimeter-wave (mmW) and terahertz (THz) circuits. Based on the through-silicon via (TSV) technology, three T-lines, four different interconnects, and one substrate integrated ...
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Abstract The 3-D integration using through silicon vias (TSVs) is expected to realize compact circuits and systems with high performance and multi-functionality. Based on the TSV technology, a hairpin bandpass filter and a microstrip... more
Abstract The 3-D integration using through silicon vias (TSVs) is expected to realize compact circuits and systems with high performance and multi-functionality. Based on the TSV technology, a hairpin bandpass filter and a microstrip patch antenna for millimeter-wave ( ...
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On-chip transmission lines are basic components in millimeter-wave and terahertz circuits. In this paper, slow-wave CPW with a simple mosfet switch, ie. controllable slow-wave CPW as a controllable phase delay line are designed,... more
On-chip transmission lines are basic components in millimeter-wave and terahertz circuits. In this paper, slow-wave CPW with a simple mosfet switch, ie. controllable slow-wave CPW as a controllable phase delay line are designed, characterized and analyzed in a commercial 0.18 μm CMOS process. Based on measured two-port S-parameters up to 110 GHz, the phase constants are compared at variation of
The through silicon via (TSV) technology provides a promising option to realize a compact millimeter-wave (mmW) and terahertz (THz) system with high performance. As the fun- damental elements in this system, transmission lines (T-lines)... more
The through silicon via (TSV) technology provides a promising option to realize a compact millimeter-wave (mmW) and terahertz (THz) system with high performance. As the fun- damental elements in this system, transmission lines (T-lines) and interconnects are very important and therefore studied in this paper. A TSV-based substrate integrated waveguide (SIW) is also characterized. The results show that, the T-lines and interconnects are viable at frequencies lower than 150 GHz whereas SIW can operate relatively well up to 300 GHz. In addition, two mmW com- ponents, i.e., a hairpin filter and a patch antenna, are designed by the TSV technology. Results of all the above passive components indicate that the low-resistivity silicon is the main cause of the total loss. Afterwards, two novel TSV-based topologies are proposed to efficiently integrate an antenna with active circuits for the mmW and THz applications.
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This paper presents a cavity-backed slot (CBS) antenna for millimeter-wave applications. The cavity of the antenna is fully filled by polymer material. This filling makes the fabrication of a silicon CBS antenna feasible, reduces the... more
This paper presents a cavity-backed slot (CBS) antenna for millimeter-wave applications. The cavity of the antenna is fully filled by polymer material. This filling makes the fabrication of a silicon CBS antenna feasible, reduces the cavity size by 76.8%, and also maintains the inherent high-gain and wide bandwidth. In addition, a through-silicon via-based architecture is proposed to integrate the 135-GHz CBS antenna with active circuits for a complete system-in-package. Results show that the proposed structure not only reduces the footprint size but also suppresses the electromagnetic interference.
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ABSTRACT Novel vertical tapered solenoidal inductors were designed, fabricated and analyzed in this paper. Due to vertical tapered solenoidal structure, the proposed inductor has small interwire capacitance between adjacent turns and... more
ABSTRACT Novel vertical tapered solenoidal inductors were designed, fabricated and analyzed in this paper. Due to vertical tapered solenoidal structure, the proposed inductor has small interwire capacitance between adjacent turns and overlap capacitance between the spiral and underpass, which can increase the self resonance frequency of the inductor significantly. The spacing between adjacent turns of this inductor can be minimized to zero, which can save precious physical area on IC boards. For a compact structure, the proposed inductor also has higher inductance as compared with the normal spiral inductor of the same outer and inner dimensions
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To meet the metal density and uniformity requirement, metal dummy fills are inserted on all metallization layers in modern CMOS technologies. These metal dummy fills can have a detrimental effect on the performance of IC components. In... more
To meet the metal density and uniformity requirement, metal dummy fills are inserted on all metallization layers in modern CMOS technologies. These metal dummy fills can have a detrimental effect on the performance of IC components. In this paper, the impact of metal dummy fills on the equivalent circuit and the performance of on-chip spiral inductors is presented based on
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In advanced CMOS technologies, the insertion of metal and the equivalent model parameters of the inductors were dummy fills is unavoidable due to stringent metal density presented. It was also found that the main impact is attributed... more
In advanced CMOS technologies, the insertion of metal and the equivalent model parameters of the inductors were dummy fills is unavoidable due to stringent metal density presented. It was also found that the main impact is attributed process requiremen. Theefoeeisto the ...
Abstract In modern CMOS technologies, metal dummy fills are required to maintain metal density uniformity and to planarize the layers. As frequency increases, the effect of the metal dummy fills on the CMOS integrated circuits or... more
Abstract In modern CMOS technologies, metal dummy fills are required to maintain metal density uniformity and to planarize the layers. As frequency increases, the effect of the metal dummy fills on the CMOS integrated circuits or components should be taken into account. ...
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ABSTRACT Electromagnetic and thermal analysis for conventional and differential spiral inductors on lossy silicon substrate is rigorously carried out in this paper. Accurate analytical expressions for calculating the frequency- and... more
ABSTRACT Electromagnetic and thermal analysis for conventional and differential spiral inductors on lossy silicon substrate is rigorously carried out in this paper. Accurate analytical expressions for calculating the frequency- and temperature-dependent inductances and substrate losses due to eddy currents are presented. The simulation results agree well with the measured data. These closed-form expressions offer the great insights into lossy substrate effects as a function of both the frequency and temperature on the performance of on-chip spiral inductors
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ABSTRACT
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... these multispiral stacked inductors over a wide frequency range exceeding the first self-resonant ... In our approach, mutual inductive couplings among all spirals have been treated appropriately ... REFERENCES [1] A. Zolfaghari, A.... more
... these multispiral stacked inductors over a wide frequency range exceeding the first self-resonant ... In our approach, mutual inductive couplings among all spirals have been treated appropriately ... REFERENCES [1] A. Zolfaghari, A. Chan, and B. Razavi, Stacked inductors and trans ...
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AbstractExtensive studies on the performance of on-chip CMOS transformers with and without patterned ground shields (PGSs) at different temperatures are carried out in this paper. These transformers are fabricated using 0.18-m RF CMOS... more
AbstractExtensive studies on the performance of on-chip CMOS transformers with and without patterned ground shields (PGSs) at different temperatures are carried out in this paper. These transformers are fabricated using 0.18-m RF CMOS pro-cesses and are designed to ...
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ABSTRACT This brief proposes a guard ring using through-silicon vias (TSVs) to isolate thermal coupling in a 3-D integrated circuit (3-D IC). To verify this idea, simulation and measurement are carried out. A ring oscillator (RO) is... more
ABSTRACT This brief proposes a guard ring using through-silicon vias (TSVs) to isolate thermal coupling in a 3-D integrated circuit (3-D IC). To verify this idea, simulation and measurement are carried out. A ring oscillator (RO) is implemented in a 65-nm CMOS and then measured in four different conditions. The results show that, without affecting the inherent electrical performance of the RO, the designed TSV ring shields the RO from high-temperature environments. The oscillation frequency shifting is mitigated from 5.96 MHz without TSV to 2.11 MHz with the proposed TSV ring. This TSV-based structure provides a good option to alleviate thermal coupling in a highly integrated 3-D IC.
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ABSTRACT Electrical evaluation of the impact of through-silicon via (TSV)-induced stress on 65-nm MOSFETs is presented in this letter. MOSFETs with varying widths and lengths were laid out at a minimum distance of 1.2 up to 16 μm from... more
ABSTRACT Electrical evaluation of the impact of through-silicon via (TSV)-induced stress on 65-nm MOSFETs is presented in this letter. MOSFETs with varying widths and lengths were laid out at a minimum distance of 1.2 up to 16 μm from TSVs at different orientations. The TSV diameter, height, and dielectric barrier thickness are 8, 60, and 1 μm, respectively. Measured change of saturation current (Ion) of devices at the minimum distance is less than 4% for all the cases. The reliability of the devices was also investigated up to 1000 thermal cycles, between -55°C and 125 °C. No significant change in MOSFET performance is observed in comparison with the measurements before thermal cycling.
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ABSTRACT A practical methodology for accurately modeling RF noise performance of deep submicron CMOS technologies using BSIM4 model is presented in this paper. The noise characterization parameters are extracted from measurements from 1.0... more
ABSTRACT A practical methodology for accurately modeling RF noise performance of deep submicron CMOS technologies using BSIM4 model is presented in this paper. The noise characterization parameters are extracted from measurements from 1.0 GHz to 18.0 GHz performed on 90 nm RF CMOS device. Based on the foundry provided model, RF and low frequency noise are fitted with slightly tuned BSIM4 parameters and extrinsic parasitics. Then accurate noise modeling performance is achieved by just one additional frequency dependent noise source using the van der Ziel configuration to fit accurately the four noise parameters over wide range of frequencies and bias conditions.