The Operating System (OS) is a major part of embedded software systems and its robustness has considerable influence on the robustness of the entire system. Thus, its robustness testing is critical for assessing the dependability of the... more
The Operating System (OS) is a major part of embedded software systems and its robustness has considerable influence on the robustness of the entire system. Thus, its robustness testing is critical for assessing the dependability of the system. In this paper, a state-aware approach is proposed to evaluate the robustness of components of embedded real-time OSs in the presence of different types of faulty inputs. This approach leads to identifying critical OS states, their criticality level, and the maximum and minimum level of the OS robustness. It also facilitates comparing the robustness level of OS's components and helps the system developers to select the most appropriate fault tolerance techniques by considering the robustness level and timing limitations. The experimental results demonstrate the ability of the proposed approach in providing more information about the robustness vulnerabilities in the states of the system.
Actual trends in the real-time system field consists of migration towards complex central processing unit (CPU) architectures with enhanced execution predictability and rapid CPU contexts switch, thus obtaining high-performant control... more
Actual trends in the real-time system field consists of migration towards complex central processing unit (CPU) architectures with enhanced execution predictability and rapid CPU contexts switch, thus obtaining high-performant control systems. The main objective of this paper is to present the results obtained following the implementation of real-time operating systems (RTOS) functions in hardware. Based on the CPU resource multiplication concept, actual researches has been focused on synthesizing in field-programmable gate array (FPGA) and implementing innovative solutions to improve RTOS performance. The results are materialized by validating an efficient hardware scheduler micro-architecture, from which a remarkable efficiency and a plus of performance and predictability are obtained. The experimental results, the FPGA resource requirements for implementation of the processor in different configurations, and the comparisons with other similar processor architectures are presented...
The current trend in real-time operating systems involves executing many tasks using a limited hardware platform. Thus, a single processor system has to execute multiple tasks with different priorities in different real-time system (RTS)... more
The current trend in real-time operating systems involves executing many tasks using a limited hardware platform. Thus, a single processor system has to execute multiple tasks with different priorities in different real-time system (RTS) work modes. Hardware schedulers can greatly reduce event trigger latency and successfully remove most of the scheduling overhead, providing more computing cycles for applications. In this paper, we present a hardware-accelerated RTOS based on the replication of resources such as program counters, general purpose registers (GPRs) and pipeline registers. The implementation of this new concept, based on real-time event handling implemented in hardware, is intended to meet the current rigorous requirements imposed by critical real-time systems. The most important attribute of this FPGA implementation is the time required for task context switching, which is only one clock cycle or three clock cycles when working with the atomic instructions used in the ...
In the context of real-time control systems, it has become possible to obtain temporal resolutions of microseconds due to the development of embedded systems and the Internet of Things (IoT), the optimization of the use of processor... more
In the context of real-time control systems, it has become possible to obtain temporal resolutions of microseconds due to the development of embedded systems and the Internet of Things (IoT), the optimization of the use of processor hardware, and the improvement of architectures and real-time operating systems (RTOSs). All of these factors, together with current technological developments, have led to efficient central processing unit (CPU) time usage, guaranteeing both the predictability of thread execution and the satisfaction of the timing constraints required by real-time systems (RTSs). This is mainly due to time sharing in embedded RTSs and the pseudo-parallel execution of tasks in single-processor and multi-processor systems. The non-deterministic behavior triggered by asynchronous external interrupts and events in general is due to the fact that, for most commercial RTOSs, the execution of the same instruction ends in a variable number of cycles, primarily due to hazards. Th...
The task context switch operation, the inter-task synchronization and communication mechanisms, as well as the jitter occurred in treating aperiodic events, are crucial factors in implementing real-time operating systems (RTOS). In... more
The task context switch operation, the inter-task synchronization and communication mechanisms, as well as the jitter occurred in treating aperiodic events, are crucial factors in implementing real-time operating systems (RTOS). In practice and literature, several solutions can be identified for improving the response speed and performance of real-time systems. Software implementations of RTOS-specific functions can generate significant delays, adversely affecting the deadlines required for certain applications. This paper presents an original implementation of a dedicated processor, based on multiple pipeline registers, and a hardware support for a dynamic scheduler with the following characteristics: performs unitary event management, provides access to architecture shared resources, prioritizes and executes the multiple events expected by the same task. The paper also presents a method through which interrupts are assigned to tasks. Through dedicated instructions, the integrated ...
The Open Group Future Airborne Capability Environment (FACE ™ ) Consortium has developed a reference architecture and standard for real-time embedded avionics systems. The FACE Technical Standard defines required capabilities for... more
The Open Group Future Airborne Capability Environment (FACE ™ ) Consortium has developed a reference architecture and standard for real-time embedded avionics systems. The FACE Technical Standard defines required capabilities for real-time operating systems (RTOS), portable components, and a shared data model to facilitate information exchange between components. FACE RTOS requirements are based on ARINC 653 and POSIX 1003.1b with tailoring to address the safety and security needs of avionics systems. Deos is a safety-certified RTOS that supports ARINC 653 but not POSIX. In contrast, RTEMS is an open source RTOS that supports POSIX but not ARINC 653. Integrating a paravirtualized RTEMS with Deos combines the strengths of both and provides a path to conformance with the FACE Safety Base operating system profile. This paper presents the FACE operating system profiles and discusses the technical challenges of the paravirtualization and integration effort.
Abstract. The exploration of space is a driving force for mankind for understanding the universe. However, due to limitations in exploration and due to requirements for prolonged life support, it has become only possible to explore deep... more
Abstract. The exploration of space is a driving force for mankind for understanding the universe. However, due to limitations in exploration and due to requirements for prolonged life support, it has become only possible to explore deep reaches of space through the use of robotic space probes. Through the efforts of NASA and ESA many robotic space probes have been launched to explore nearby asteroids' and comets. However, for these types of deep space missions, the robotic space probe is often far from Earth and requires ...
As artificial intelligence technology becomes less intensive and more accessible, it creates more opportunities for artificial intelligence applications within new hardware and software devices. This project explores the process of... more
As artificial intelligence technology becomes less intensive and more accessible, it creates more opportunities for artificial intelligence applications within new hardware and software devices. This project explores the process of integrating a large language model, GPT-2, onto a real-time operating system known as QNX within the hardware constraints of a Raspberry Pi. There were two attempts at implementing this model, the first was installing python on to the QNX operating system, while the second attempt was to utilize a cross-compiling feature in order to run the GPT-2 model. The results were unfortunate as the QNX Momentics IDE had a bug within its software that did not allow us to cross-compile in the way we had planned before, as a final result we had to shift the GPT-2 model onto Linux. These results showcase that the QNX operating system and IDE are not fully capable of integrating a GPT-2 model with python due to issues with the IDE.
In this contribution the existing relations between the imprecise computation and the fault tolerant control (FTC) are analyzed. From those relations one settles down like constructing FTC systems according to the model of imprecise... more
In this contribution the existing relations between the imprecise computation and the fault tolerant control (FTC) are analyzed. From those relations one settles down like constructing FTC systems according to the model of imprecise computation. The found relations establish that the ...
Medfield is Intel’s first smartphone SOC platform built on a 32 nm process and the platform implements several key innovations in hardware and software to accomplish aggressive power management. It has multiple logical and physical power... more
Medfield is Intel’s first smartphone SOC platform built on a 32 nm process and the platform implements several key innovations in hardware and software to accomplish aggressive power management. It has multiple logical and physical power partitions that enable software/firmware to selectively control power to functional components, and to the entire platform as well, with very low latencies. This paper describes the architecture, implementation and key experiences from enabling power management on the Intel Medfield phone platform. We describe how the standard Linux and Android power management architectures integrate with the capabilities provided by the platform to provide aggressive power management capabilities. We also present some of the key learning from our power management experiences that we believe will be useful to other Linux/Android-based platforms.
The Open Group Future Airborne Capability Environment (FACE ™ ) Consortium has developed a reference architecture and standard for real-time embedded avionics systems. The FACE Technical Standard defines required capabilities for... more
The Open Group Future Airborne Capability Environment (FACE ™ ) Consortium has developed a reference architecture and standard for real-time embedded avionics systems. The FACE Technical Standard defines required capabilities for real-time operating systems (RTOS), portable components, and a shared data model to facilitate information exchange between components. FACE RTOS requirements are based on ARINC 653 and POSIX 1003.1b with tailoring to address the safety and security needs of avionics systems. Deos is a safety-certified RTOS that supports ARINC 653 but not POSIX. In contrast, RTEMS is an open source RTOS that supports POSIX but not ARINC 653. Integrating a paravirtualized RTEMS with Deos combines the strengths of both and provides a path to conformance with the FACE Safety Base operating system profile. This paper presents the FACE operating system profiles and discusses the technical challenges of the paravirtualization and integration effort.
The goal of a real-time operating system (RTOS) is to support real-time and embedded system (RT/ES) application development, which differ from general-purpose applications because of the size, weight, and power (SWaP) and timing... more
The goal of a real-time operating system (RTOS) is to support real-time and embedded system (RT/ES) application development, which differ from general-purpose applications because of the size, weight, and power (SWaP) and timing constraints imposed by embedded applications. Useful RTOS features include real-time thread scheduling, thread communication, synchronization, interrupt handling, memory management, file systems, device drivers, networking, and debugging support. The Real-Time Executive for Multi-processor Systems (RTEMS) is a free and open-source RTOS that supports over a dozen processor architecture families and over 150 embedded system boards. RTEMS is designed to support embedded applications with stringent real-time requirements while being compatible with open standards such as POSIX. RTEMS includes optional services such as TCP/IP networking and file systems while still offering minimum executable sizes under 20 KB in useful configurations. One of the primary function...
ABSTRACT–A powerful onboard navigation processor dedicated to the GPS-based guidance, navigation, and control of satellite formations in real-time has been built up. The system features an industrial Power PC 823e processor supporting... more
ABSTRACT–A powerful onboard navigation processor dedicated to the GPS-based guidance, navigation, and control of satellite formations in real-time has been built up. The system features an industrial Power PC 823e processor supporting multiple Global ...